arch/sh/include/asm/processor.h

   1 #ifndef __ASM_SH_PROCESSOR_H
   2 #define __ASM_SH_PROCESSOR_H
   3
   4 #include <asm/cpu-features.h>
   5 #include <asm/segment.h>
   6 #include <asm/cache.h>
   7
   8 #ifndef __ASSEMBLY__
   9 /*
  10  *  CPU type and hardware bug flags. Kept separately for each CPU.
  11  *
  12  *  Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
  13  *  in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
  14  *  for parsing the subtype in get_cpu_subtype().
  15  */
  16 enum cpu_type {
  17         /* SH-2 types */
  18         CPU_SH7619,
  19
  20         /* SH-2A types */
  21         CPU_SH7201, CPU_SH7203, CPU_SH7206, CPU_SH7263, CPU_MXG,
  22
  23         /* SH-3 types */
  24         CPU_SH7705, CPU_SH7706, CPU_SH7707,
  25         CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
  26         CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
  27         CPU_SH7720, CPU_SH7721, CPU_SH7729,
  28
  29         /* SH-4 types */
  30         CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
  31         CPU_SH7760, CPU_SH4_202, CPU_SH4_501,
  32
  33         /* SH-4A types */
  34         CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SH7786,
  35         CPU_SH7723, CPU_SH7724, CPU_SH7757, CPU_SHX3,
  36
  37         /* SH4AL-DSP types */
  38         CPU_SH7343, CPU_SH7722, CPU_SH7366,
  39
  40         /* SH-5 types */
  41         CPU_SH5_101, CPU_SH5_103,
  42
  43         /* Unknown subtype */
  44         CPU_SH_NONE
  45 };
  46
  47 enum cpu_family {
  48         CPU_FAMILY_SH2,
  49         CPU_FAMILY_SH2A,
  50         CPU_FAMILY_SH3,
  51         CPU_FAMILY_SH4,
  52         CPU_FAMILY_SH4A,
  53         CPU_FAMILY_SH4AL_DSP,
  54         CPU_FAMILY_SH5,
  55         CPU_FAMILY_UNKNOWN,
  56 };
  57
  58 /*
  59  * TLB information structure
  60  *
  61  * Defined for both I and D tlb, per-processor.
  62  */
  63 struct tlb_info {
  64         unsigned long long next;
  65         unsigned long long first;
  66         unsigned long long last;
  67
  68         unsigned int entries;
  69         unsigned int step;
  70
  71         unsigned long flags;
  72 };
  73
  74 struct sh_cpuinfo {
  75         unsigned int type, family;
  76         int cut_major, cut_minor;
  77         unsigned long loops_per_jiffy;
  78         unsigned long asid_cache;
  79
  80         struct cache_info icache;       /* Primary I-cache */
  81         struct cache_info dcache;       /* Primary D-cache */
  82         struct cache_info scache;       /* Secondary cache */
  83
  84         /* TLB info */
  85         struct tlb_info itlb;
  86         struct tlb_info dtlb;
  87
  88         unsigned long flags;
  89 } __attribute__ ((aligned(L1_CACHE_BYTES)));
  90
  91 extern struct sh_cpuinfo cpu_data[];
  92 #define boot_cpu_data cpu_data[0]
  93 #define current_cpu_data cpu_data[smp_processor_id()]
  94 #define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
  95
  96 #define cpu_sleep()     __asm__ __volatile__ ("sleep" : : : "memory")
  97 #define cpu_relax()     barrier()
  98
  99 /* Forward decl */
 100 struct seq_operations;
 101 struct task_struct;
 102
 103 extern struct pt_regs fake_swapper_regs;
 104
 105 /* arch/sh/kernel/process.c */
 106 extern unsigned int xstate_size;
 107 extern void free_thread_xstate(struct task_struct *);
 108 extern struct kmem_cache *task_xstate_cachep;
 109
 110 /* arch/sh/mm/alignment.c */
 111 extern int get_unalign_ctl(struct task_struct *, unsigned long addr);
 112 extern int set_unalign_ctl(struct task_struct *, unsigned int val);
 113
 114 #define GET_UNALIGN_CTL(tsk, addr)      get_unalign_ctl((tsk), (addr))
 115 #define SET_UNALIGN_CTL(tsk, val)       set_unalign_ctl((tsk), (val))
 116
 117 /* arch/sh/mm/init.c */
 118 extern unsigned int mem_init_done;
 119
 120 /* arch/sh/kernel/setup.c */
 121 const char *get_cpu_subtype(struct sh_cpuinfo *c);
 122 extern const struct seq_operations cpuinfo_op;
 123
 124 /* thread_struct flags */
 125 #define SH_THREAD_UAC_NOPRINT   (1 << 0)
 126 #define SH_THREAD_UAC_SIGBUS    (1 << 1)
 127 #define SH_THREAD_UAC_MASK      (SH_THREAD_UAC_NOPRINT | SH_THREAD_UAC_SIGBUS)
 128
 129 /* processor boot mode configuration */
 130 #define MODE_PIN0 (1 << 0)
 131 #define MODE_PIN1 (1 << 1)
 132 #define MODE_PIN2 (1 << 2)
 133 #define MODE_PIN3 (1 << 3)
 134 #define MODE_PIN4 (1 << 4)
 135 #define MODE_PIN5 (1 << 5)
 136 #define MODE_PIN6 (1 << 6)
 137 #define MODE_PIN7 (1 << 7)
 138 #define MODE_PIN8 (1 << 8)
 139 #define MODE_PIN9 (1 << 9)
 140 #define MODE_PIN10 (1 << 10)
 141 #define MODE_PIN11 (1 << 11)
 142 #define MODE_PIN12 (1 << 12)
 143 #define MODE_PIN13 (1 << 13)
 144 #define MODE_PIN14 (1 << 14)
 145 #define MODE_PIN15 (1 << 15)
 146
 147 int generic_mode_pins(void);
 148 int test_mode_pin(int pin);
 149
 150 #ifdef CONFIG_VSYSCALL
 151 int vsyscall_init(void);
 152 #else
 153 #define vsyscall_init() do { } while (0)
 154 #endif
 155
 156 #endif /* __ASSEMBLY__ */
 157
 158 #ifdef CONFIG_SUPERH32
 159 # include "processor_32.h"
 160 #else
 161 # include "processor_64.h"
 162 #endif
 163
 164 #endif /* __ASM_SH_PROCESSOR_H */