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1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/kernel/hw_breakpoint.c
5 * Unified kernel/user-space hardware breakpoint facility for the on-chip UBC.
7 * Copyright (C) 2009 - 2010 Paul Mundt
9 #include <linux/init.h>
10 #include <linux/perf_event.h>
11 #include <linux/sched/signal.h>
12 #include <linux/hw_breakpoint.h>
13 #include <linux/percpu.h>
14 #include <linux/kallsyms.h>
15 #include <linux/notifier.h>
16 #include <linux/kprobes.h>
17 #include <linux/kdebug.h>
19 #include <linux/clk.h>
20 #include <asm/hw_breakpoint.h>
21 #include <asm/mmu_context.h>
22 #include <asm/ptrace.h>
23 #include <asm/traps.h>
26 * Stores the breakpoints currently in use on each breakpoint address
27 * register for each cpus
29 static DEFINE_PER_CPU(struct perf_event
*, bp_per_reg
[HBP_NUM
]);
32 * A dummy placeholder for early accesses until the CPUs get a chance to
33 * register their UBCs later in the boot process.
35 static struct sh_ubc ubc_dummy
= { .num_events
= 0 };
37 static struct sh_ubc
*sh_ubc __read_mostly
= &ubc_dummy
;
40 * Install a perf counter breakpoint.
42 * We seek a free UBC channel and use it for this breakpoint.
44 * Atomic: we hold the counter->ctx->lock and we only handle variables
45 * and registers local to this cpu.
47 int arch_install_hw_breakpoint(struct perf_event
*bp
)
49 struct arch_hw_breakpoint
*info
= counter_arch_bp(bp
);
52 for (i
= 0; i
< sh_ubc
->num_events
; i
++) {
53 struct perf_event
**slot
= this_cpu_ptr(&bp_per_reg
[i
]);
61 if (WARN_ONCE(i
== sh_ubc
->num_events
, "Can't find any breakpoint slot"))
64 clk_enable(sh_ubc
->clk
);
65 sh_ubc
->enable(info
, i
);
71 * Uninstall the breakpoint contained in the given counter.
73 * First we search the debug address register it uses and then we disable
76 * Atomic: we hold the counter->ctx->lock and we only handle variables
77 * and registers local to this cpu.
79 void arch_uninstall_hw_breakpoint(struct perf_event
*bp
)
81 struct arch_hw_breakpoint
*info
= counter_arch_bp(bp
);
84 for (i
= 0; i
< sh_ubc
->num_events
; i
++) {
85 struct perf_event
**slot
= this_cpu_ptr(&bp_per_reg
[i
]);
93 if (WARN_ONCE(i
== sh_ubc
->num_events
, "Can't find any breakpoint slot"))
96 sh_ubc
->disable(info
, i
);
97 clk_disable(sh_ubc
->clk
);
100 static int get_hbp_len(u16 hbp_len
)
102 unsigned int len_in_bytes
= 0;
105 case SH_BREAKPOINT_LEN_1
:
108 case SH_BREAKPOINT_LEN_2
:
111 case SH_BREAKPOINT_LEN_4
:
114 case SH_BREAKPOINT_LEN_8
:
122 * Check for virtual address in kernel space.
124 int arch_check_bp_in_kernelspace(struct arch_hw_breakpoint
*hw
)
130 len
= get_hbp_len(hw
->len
);
132 return (va
>= TASK_SIZE
) && ((va
+ len
- 1) >= TASK_SIZE
);
135 int arch_bp_generic_fields(int sh_len
, int sh_type
,
136 int *gen_len
, int *gen_type
)
140 case SH_BREAKPOINT_LEN_1
:
141 *gen_len
= HW_BREAKPOINT_LEN_1
;
143 case SH_BREAKPOINT_LEN_2
:
144 *gen_len
= HW_BREAKPOINT_LEN_2
;
146 case SH_BREAKPOINT_LEN_4
:
147 *gen_len
= HW_BREAKPOINT_LEN_4
;
149 case SH_BREAKPOINT_LEN_8
:
150 *gen_len
= HW_BREAKPOINT_LEN_8
;
158 case SH_BREAKPOINT_READ
:
159 *gen_type
= HW_BREAKPOINT_R
;
161 case SH_BREAKPOINT_WRITE
:
162 *gen_type
= HW_BREAKPOINT_W
;
164 case SH_BREAKPOINT_RW
:
165 *gen_type
= HW_BREAKPOINT_W
| HW_BREAKPOINT_R
;
174 static int arch_build_bp_info(struct perf_event
*bp
,
175 const struct perf_event_attr
*attr
,
176 struct arch_hw_breakpoint
*hw
)
178 hw
->address
= attr
->bp_addr
;
181 switch (attr
->bp_len
) {
182 case HW_BREAKPOINT_LEN_1
:
183 hw
->len
= SH_BREAKPOINT_LEN_1
;
185 case HW_BREAKPOINT_LEN_2
:
186 hw
->len
= SH_BREAKPOINT_LEN_2
;
188 case HW_BREAKPOINT_LEN_4
:
189 hw
->len
= SH_BREAKPOINT_LEN_4
;
191 case HW_BREAKPOINT_LEN_8
:
192 hw
->len
= SH_BREAKPOINT_LEN_8
;
199 switch (attr
->bp_type
) {
200 case HW_BREAKPOINT_R
:
201 hw
->type
= SH_BREAKPOINT_READ
;
203 case HW_BREAKPOINT_W
:
204 hw
->type
= SH_BREAKPOINT_WRITE
;
206 case HW_BREAKPOINT_W
| HW_BREAKPOINT_R
:
207 hw
->type
= SH_BREAKPOINT_RW
;
217 * Validate the arch-specific HW Breakpoint register settings
219 int hw_breakpoint_arch_parse(struct perf_event
*bp
,
220 const struct perf_event_attr
*attr
,
221 struct arch_hw_breakpoint
*hw
)
226 ret
= arch_build_bp_info(bp
, attr
, hw
);
233 case SH_BREAKPOINT_LEN_1
:
236 case SH_BREAKPOINT_LEN_2
:
239 case SH_BREAKPOINT_LEN_4
:
242 case SH_BREAKPOINT_LEN_8
:
250 * Check that the low-order bits of the address are appropriate
251 * for the alignment implied by len.
253 if (hw
->address
& align
)
260 * Release the user breakpoints used by ptrace
262 void flush_ptrace_hw_breakpoint(struct task_struct
*tsk
)
265 struct thread_struct
*t
= &tsk
->thread
;
267 for (i
= 0; i
< sh_ubc
->num_events
; i
++) {
268 unregister_hw_breakpoint(t
->ptrace_bps
[i
]);
269 t
->ptrace_bps
[i
] = NULL
;
273 static int __kprobes
hw_breakpoint_handler(struct die_args
*args
)
275 int cpu
, i
, rc
= NOTIFY_STOP
;
276 struct perf_event
*bp
;
277 unsigned int cmf
, resume_mask
;
280 * Do an early return if none of the channels triggered.
282 cmf
= sh_ubc
->triggered_mask();
287 * By default, resume all of the active channels.
289 resume_mask
= sh_ubc
->active_mask();
292 * Disable breakpoints during exception handling.
294 sh_ubc
->disable_all();
297 for (i
= 0; i
< sh_ubc
->num_events
; i
++) {
298 unsigned long event_mask
= (1 << i
);
300 if (likely(!(cmf
& event_mask
)))
304 * The counter may be concurrently released but that can only
305 * occur from a call_rcu() path. We can then safely fetch
306 * the breakpoint, use its callback, touch its counter
307 * while we are in an rcu_read_lock() path.
311 bp
= per_cpu(bp_per_reg
[i
], cpu
);
316 * Reset the condition match flag to denote completion of
317 * exception handling.
319 sh_ubc
->clear_triggered_mask(event_mask
);
322 * bp can be NULL due to concurrent perf counter
331 * Don't restore the channel if the breakpoint is from
332 * ptrace, as it always operates in one-shot mode.
334 if (bp
->overflow_handler
== ptrace_triggered
)
335 resume_mask
&= ~(1 << i
);
337 perf_bp_event(bp
, args
->regs
);
339 /* Deliver the signal to userspace */
340 if (!arch_check_bp_in_kernelspace(&bp
->hw
.info
)) {
341 force_sig_fault(SIGTRAP
, TRAP_HWBKPT
,
342 (void __user
*)NULL
);
351 sh_ubc
->enable_all(resume_mask
);
358 BUILD_TRAP_HANDLER(breakpoint
)
360 unsigned long ex
= lookup_exception_vector();
363 notify_die(DIE_BREAKPOINT
, "breakpoint", regs
, 0, ex
, SIGTRAP
);
367 * Handle debug exception notifications.
369 int __kprobes
hw_breakpoint_exceptions_notify(struct notifier_block
*unused
,
370 unsigned long val
, void *data
)
372 struct die_args
*args
= data
;
374 if (val
!= DIE_BREAKPOINT
)
378 * If the breakpoint hasn't been triggered by the UBC, it's
379 * probably from a debugger, so don't do anything more here.
381 * This also permits the UBC interface clock to remain off for
382 * non-UBC breakpoints, as we don't need to check the triggered
383 * or active channel masks.
385 if (args
->trapnr
!= sh_ubc
->trap_nr
)
388 return hw_breakpoint_handler(data
);
391 void hw_breakpoint_pmu_read(struct perf_event
*bp
)
396 int register_sh_ubc(struct sh_ubc
*ubc
)
398 /* Bail if it's already assigned */
399 if (sh_ubc
!= &ubc_dummy
)
403 pr_info("HW Breakpoints: %s UBC support registered\n", ubc
->name
);
405 WARN_ON(ubc
->num_events
> HBP_NUM
);