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1 /*
2 * arch/sh/mm/pmb.c
3 *
4 * Privileged Space Mapping Buffer (PMB) Support.
5 *
6 * Copyright (C) 2005 - 2010 Paul Mundt
7 * Copyright (C) 2010 Matt Fleming
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/sysdev.h>
16 #include <linux/cpu.h>
17 #include <linux/module.h>
18 #include <linux/slab.h>
19 #include <linux/bitops.h>
20 #include <linux/debugfs.h>
21 #include <linux/fs.h>
22 #include <linux/seq_file.h>
23 #include <linux/err.h>
24 #include <linux/io.h>
25 #include <linux/spinlock.h>
26 #include <linux/vmalloc.h>
27 #include <asm/cacheflush.h>
28 #include <asm/sizes.h>
29 #include <asm/system.h>
30 #include <asm/uaccess.h>
31 #include <asm/pgtable.h>
32 #include <asm/page.h>
33 #include <asm/mmu.h>
34 #include <asm/mmu_context.h>
35
36 struct pmb_entry;
37
38 struct pmb_entry {
39 unsigned long vpn;
40 unsigned long ppn;
41 unsigned long flags;
42 unsigned long size;
43
44 spinlock_t lock;
45
46 /*
47 * 0 .. NR_PMB_ENTRIES for specific entry selection, or
48 * PMB_NO_ENTRY to search for a free one
49 */
50 int entry;
51
52 /* Adjacent entry link for contiguous multi-entry mappings */
53 struct pmb_entry *link;
54 };
55
56 static struct {
57 unsigned long size;
58 int flag;
59 } pmb_sizes[] = {
60 { .size = SZ_512M, .flag = PMB_SZ_512M, },
61 { .size = SZ_128M, .flag = PMB_SZ_128M, },
62 { .size = SZ_64M, .flag = PMB_SZ_64M, },
63 { .size = SZ_16M, .flag = PMB_SZ_16M, },
64 };
65
66 static void pmb_unmap_entry(struct pmb_entry *, int depth);
67
68 static DEFINE_RWLOCK(pmb_rwlock);
69 static struct pmb_entry pmb_entry_list[NR_PMB_ENTRIES];
70 static DECLARE_BITMAP(pmb_map, NR_PMB_ENTRIES);
71
72 static unsigned int pmb_iomapping_enabled;
73
74 static __always_inline unsigned long mk_pmb_entry(unsigned int entry)
75 {
76 return (entry & PMB_E_MASK) << PMB_E_SHIFT;
77 }
78
79 static __always_inline unsigned long mk_pmb_addr(unsigned int entry)
80 {
81 return mk_pmb_entry(entry) | PMB_ADDR;
82 }
83
84 static __always_inline unsigned long mk_pmb_data(unsigned int entry)
85 {
86 return mk_pmb_entry(entry) | PMB_DATA;
87 }
88
89 static __always_inline unsigned int pmb_ppn_in_range(unsigned long ppn)
90 {
91 return ppn >= __pa(memory_start) && ppn < __pa(memory_end);
92 }
93
94 /*
95 * Ensure that the PMB entries match our cache configuration.
96 *
97 * When we are in 32-bit address extended mode, CCR.CB becomes
98 * invalid, so care must be taken to manually adjust cacheable
99 * translations.
100 */
101 static __always_inline unsigned long pmb_cache_flags(void)
102 {
103 unsigned long flags = 0;
104
105 #if defined(CONFIG_CACHE_OFF)
106 flags |= PMB_WT | PMB_UB;
107 #elif defined(CONFIG_CACHE_WRITETHROUGH)
108 flags |= PMB_C | PMB_WT | PMB_UB;
109 #elif defined(CONFIG_CACHE_WRITEBACK)
110 flags |= PMB_C;
111 #endif
112
113 return flags;
114 }
115
116 /*
117 * Convert typical pgprot value to the PMB equivalent
118 */
119 static inline unsigned long pgprot_to_pmb_flags(pgprot_t prot)
120 {
121 unsigned long pmb_flags = 0;
122 u64 flags = pgprot_val(prot);
123
124 if (flags & _PAGE_CACHABLE)
125 pmb_flags |= PMB_C;
126 if (flags & _PAGE_WT)
127 pmb_flags |= PMB_WT | PMB_UB;
128
129 return pmb_flags;
130 }
131
132 static inline bool pmb_can_merge(struct pmb_entry *a, struct pmb_entry *b)
133 {
134 return (b->vpn == (a->vpn + a->size)) &&
135 (b->ppn == (a->ppn + a->size)) &&
136 (b->flags == a->flags);
137 }
138
139 static bool pmb_mapping_exists(unsigned long vaddr, phys_addr_t phys,
140 unsigned long size)
141 {
142 int i;
143
144 read_lock(&pmb_rwlock);
145
146 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
147 struct pmb_entry *pmbe, *iter;
148 unsigned long span;
149
150 if (!test_bit(i, pmb_map))
151 continue;
152
153 pmbe = &pmb_entry_list[i];
154
155 /*
156 * See if VPN and PPN are bounded by an existing mapping.
157 */
158 if ((vaddr < pmbe->vpn) || (vaddr >= (pmbe->vpn + pmbe->size)))
159 continue;
160 if ((phys < pmbe->ppn) || (phys >= (pmbe->ppn + pmbe->size)))
161 continue;
162
163 /*
164 * Now see if we're in range of a simple mapping.
165 */
166 if (size <= pmbe->size) {
167 read_unlock(&pmb_rwlock);
168 return true;
169 }
170
171 span = pmbe->size;
172
173 /*
174 * Finally for sizes that involve compound mappings, walk
175 * the chain.
176 */
177 for (iter = pmbe->link; iter; iter = iter->link)
178 span += iter->size;
179
180 /*
181 * Nothing else to do if the range requirements are met.
182 */
183 if (size <= span) {
184 read_unlock(&pmb_rwlock);
185 return true;
186 }
187 }
188
189 read_unlock(&pmb_rwlock);
190 return false;
191 }
192
193 static bool pmb_size_valid(unsigned long size)
194 {
195 int i;
196
197 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
198 if (pmb_sizes[i].size == size)
199 return true;
200
201 return false;
202 }
203
204 static inline bool pmb_addr_valid(unsigned long addr, unsigned long size)
205 {
206 return (addr >= P1SEG && (addr + size - 1) < P3SEG);
207 }
208
209 static inline bool pmb_prot_valid(pgprot_t prot)
210 {
211 return (pgprot_val(prot) & _PAGE_USER) == 0;
212 }
213
214 static int pmb_size_to_flags(unsigned long size)
215 {
216 int i;
217
218 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
219 if (pmb_sizes[i].size == size)
220 return pmb_sizes[i].flag;
221
222 return 0;
223 }
224
225 static int pmb_alloc_entry(void)
226 {
227 int pos;
228
229 pos = find_first_zero_bit(pmb_map, NR_PMB_ENTRIES);
230 if (pos >= 0 && pos < NR_PMB_ENTRIES)
231 __set_bit(pos, pmb_map);
232 else
233 pos = -ENOSPC;
234
235 return pos;
236 }
237
238 static struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
239 unsigned long flags, int entry)
240 {
241 struct pmb_entry *pmbe;
242 unsigned long irqflags;
243 void *ret = NULL;
244 int pos;
245
246 write_lock_irqsave(&pmb_rwlock, irqflags);
247
248 if (entry == PMB_NO_ENTRY) {
249 pos = pmb_alloc_entry();
250 if (unlikely(pos < 0)) {
251 ret = ERR_PTR(pos);
252 goto out;
253 }
254 } else {
255 if (__test_and_set_bit(entry, pmb_map)) {
256 ret = ERR_PTR(-ENOSPC);
257 goto out;
258 }
259
260 pos = entry;
261 }
262
263 write_unlock_irqrestore(&pmb_rwlock, irqflags);
264
265 pmbe = &pmb_entry_list[pos];
266
267 memset(pmbe, 0, sizeof(struct pmb_entry));
268
269 spin_lock_init(&pmbe->lock);
270
271 pmbe->vpn = vpn;
272 pmbe->ppn = ppn;
273 pmbe->flags = flags;
274 pmbe->entry = pos;
275
276 return pmbe;
277
278 out:
279 write_unlock_irqrestore(&pmb_rwlock, irqflags);
280 return ret;
281 }
282
283 static void pmb_free(struct pmb_entry *pmbe)
284 {
285 __clear_bit(pmbe->entry, pmb_map);
286
287 pmbe->entry = PMB_NO_ENTRY;
288 pmbe->link = NULL;
289 }
290
291 /*
292 * Must be run uncached.
293 */
294 static void __set_pmb_entry(struct pmb_entry *pmbe)
295 {
296 unsigned long addr, data;
297
298 addr = mk_pmb_addr(pmbe->entry);
299 data = mk_pmb_data(pmbe->entry);
300
301 jump_to_uncached();
302
303 /* Set V-bit */
304 __raw_writel(pmbe->vpn | PMB_V, addr);
305 __raw_writel(pmbe->ppn | pmbe->flags | PMB_V, data);
306
307 back_to_cached();
308 }
309
310 static void __clear_pmb_entry(struct pmb_entry *pmbe)
311 {
312 unsigned long addr, data;
313 unsigned long addr_val, data_val;
314
315 addr = mk_pmb_addr(pmbe->entry);
316 data = mk_pmb_data(pmbe->entry);
317
318 addr_val = __raw_readl(addr);
319 data_val = __raw_readl(data);
320
321 /* Clear V-bit */
322 writel_uncached(addr_val & ~PMB_V, addr);
323 writel_uncached(data_val & ~PMB_V, data);
324 }
325
326 #ifdef CONFIG_PM
327 static void set_pmb_entry(struct pmb_entry *pmbe)
328 {
329 unsigned long flags;
330
331 spin_lock_irqsave(&pmbe->lock, flags);
332 __set_pmb_entry(pmbe);
333 spin_unlock_irqrestore(&pmbe->lock, flags);
334 }
335 #endif /* CONFIG_PM */
336
337 int pmb_bolt_mapping(unsigned long vaddr, phys_addr_t phys,
338 unsigned long size, pgprot_t prot)
339 {
340 struct pmb_entry *pmbp, *pmbe;
341 unsigned long orig_addr, orig_size;
342 unsigned long flags, pmb_flags;
343 int i, mapped;
344
345 if (!pmb_addr_valid(vaddr, size))
346 return -EFAULT;
347 if (pmb_mapping_exists(vaddr, phys, size))
348 return 0;
349
350 orig_addr = vaddr;
351 orig_size = size;
352
353 flush_tlb_kernel_range(vaddr, vaddr + size);
354
355 pmb_flags = pgprot_to_pmb_flags(prot);
356 pmbp = NULL;
357
358 do {
359 for (i = mapped = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
360 if (size < pmb_sizes[i].size)
361 continue;
362
363 pmbe = pmb_alloc(vaddr, phys, pmb_flags |
364 pmb_sizes[i].flag, PMB_NO_ENTRY);
365 if (IS_ERR(pmbe)) {
366 pmb_unmap_entry(pmbp, mapped);
367 return PTR_ERR(pmbe);
368 }
369
370 spin_lock_irqsave(&pmbe->lock, flags);
371
372 pmbe->size = pmb_sizes[i].size;
373
374 __set_pmb_entry(pmbe);
375
376 phys += pmbe->size;
377 vaddr += pmbe->size;
378 size -= pmbe->size;
379
380 /*
381 * Link adjacent entries that span multiple PMB
382 * entries for easier tear-down.
383 */
384 if (likely(pmbp)) {
385 spin_lock(&pmbp->lock);
386 pmbp->link = pmbe;
387 spin_unlock(&pmbp->lock);
388 }
389
390 pmbp = pmbe;
391
392 /*
393 * Instead of trying smaller sizes on every
394 * iteration (even if we succeed in allocating
395 * space), try using pmb_sizes[i].size again.
396 */
397 i--;
398 mapped++;
399
400 spin_unlock_irqrestore(&pmbe->lock, flags);
401 }
402 } while (size >= SZ_16M);
403
404 flush_cache_vmap(orig_addr, orig_addr + orig_size);
405
406 return 0;
407 }
408
409 void __iomem *pmb_remap_caller(phys_addr_t phys, unsigned long size,
410 pgprot_t prot, void *caller)
411 {
412 unsigned long vaddr;
413 phys_addr_t offset, last_addr;
414 phys_addr_t align_mask;
415 unsigned long aligned;
416 struct vm_struct *area;
417 int i, ret;
418
419 if (!pmb_iomapping_enabled)
420 return NULL;
421
422 /*
423 * Small mappings need to go through the TLB.
424 */
425 if (size < SZ_16M)
426 return ERR_PTR(-EINVAL);
427 if (!pmb_prot_valid(prot))
428 return ERR_PTR(-EINVAL);
429
430 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
431 if (size >= pmb_sizes[i].size)
432 break;
433
434 last_addr = phys + size;
435 align_mask = ~(pmb_sizes[i].size - 1);
436 offset = phys & ~align_mask;
437 phys &= align_mask;
438 aligned = ALIGN(last_addr, pmb_sizes[i].size) - phys;
439
440 /*
441 * XXX: This should really start from uncached_end, but this
442 * causes the MMU to reset, so for now we restrict it to the
443 * 0xb000...0xc000 range.
444 */
445 area = __get_vm_area_caller(aligned, VM_IOREMAP, 0xb0000000,
446 P3SEG, caller);
447 if (!area)
448 return NULL;
449
450 area->phys_addr = phys;
451 vaddr = (unsigned long)area->addr;
452
453 ret = pmb_bolt_mapping(vaddr, phys, size, prot);
454 if (unlikely(ret != 0))
455 return ERR_PTR(ret);
456
457 return (void __iomem *)(offset + (char *)vaddr);
458 }
459
460 int pmb_unmap(void __iomem *addr)
461 {
462 struct pmb_entry *pmbe = NULL;
463 unsigned long vaddr = (unsigned long __force)addr;
464 int i, found = 0;
465
466 read_lock(&pmb_rwlock);
467
468 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
469 if (test_bit(i, pmb_map)) {
470 pmbe = &pmb_entry_list[i];
471 if (pmbe->vpn == vaddr) {
472 found = 1;
473 break;
474 }
475 }
476 }
477
478 read_unlock(&pmb_rwlock);
479
480 if (found) {
481 pmb_unmap_entry(pmbe, NR_PMB_ENTRIES);
482 return 0;
483 }
484
485 return -EINVAL;
486 }
487
488 static void __pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
489 {
490 do {
491 struct pmb_entry *pmblink = pmbe;
492
493 /*
494 * We may be called before this pmb_entry has been
495 * entered into the PMB table via set_pmb_entry(), but
496 * that's OK because we've allocated a unique slot for
497 * this entry in pmb_alloc() (even if we haven't filled
498 * it yet).
499 *
500 * Therefore, calling __clear_pmb_entry() is safe as no
501 * other mapping can be using that slot.
502 */
503 __clear_pmb_entry(pmbe);
504
505 flush_cache_vunmap(pmbe->vpn, pmbe->vpn + pmbe->size);
506
507 pmbe = pmblink->link;
508
509 pmb_free(pmblink);
510 } while (pmbe && --depth);
511 }
512
513 static void pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
514 {
515 unsigned long flags;
516
517 if (unlikely(!pmbe))
518 return;
519
520 write_lock_irqsave(&pmb_rwlock, flags);
521 __pmb_unmap_entry(pmbe, depth);
522 write_unlock_irqrestore(&pmb_rwlock, flags);
523 }
524
525 static void __init pmb_notify(void)
526 {
527 int i;
528
529 pr_info("PMB: boot mappings:\n");
530
531 read_lock(&pmb_rwlock);
532
533 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
534 struct pmb_entry *pmbe;
535
536 if (!test_bit(i, pmb_map))
537 continue;
538
539 pmbe = &pmb_entry_list[i];
540
541 pr_info(" 0x%08lx -> 0x%08lx [ %4ldMB %2scached ]\n",
542 pmbe->vpn >> PAGE_SHIFT, pmbe->ppn >> PAGE_SHIFT,
543 pmbe->size >> 20, (pmbe->flags & PMB_C) ? "" : "un");
544 }
545
546 read_unlock(&pmb_rwlock);
547 }
548
549 /*
550 * Sync our software copy of the PMB mappings with those in hardware. The
551 * mappings in the hardware PMB were either set up by the bootloader or
552 * very early on by the kernel.
553 */
554 static void __init pmb_synchronize(void)
555 {
556 struct pmb_entry *pmbp = NULL;
557 int i, j;
558
559 /*
560 * Run through the initial boot mappings, log the established
561 * ones, and blow away anything that falls outside of the valid
562 * PPN range. Specifically, we only care about existing mappings
563 * that impact the cached/uncached sections.
564 *
565 * Note that touching these can be a bit of a minefield; the boot
566 * loader can establish multi-page mappings with the same caching
567 * attributes, so we need to ensure that we aren't modifying a
568 * mapping that we're presently executing from, or may execute
569 * from in the case of straddling page boundaries.
570 *
571 * In the future we will have to tidy up after the boot loader by
572 * jumping between the cached and uncached mappings and tearing
573 * down alternating mappings while executing from the other.
574 */
575 for (i = 0; i < NR_PMB_ENTRIES; i++) {
576 unsigned long addr, data;
577 unsigned long addr_val, data_val;
578 unsigned long ppn, vpn, flags;
579 unsigned long irqflags;
580 unsigned int size;
581 struct pmb_entry *pmbe;
582
583 addr = mk_pmb_addr(i);
584 data = mk_pmb_data(i);
585
586 addr_val = __raw_readl(addr);
587 data_val = __raw_readl(data);
588
589 /*
590 * Skip over any bogus entries
591 */
592 if (!(data_val & PMB_V) || !(addr_val & PMB_V))
593 continue;
594
595 ppn = data_val & PMB_PFN_MASK;
596 vpn = addr_val & PMB_PFN_MASK;
597
598 /*
599 * Only preserve in-range mappings.
600 */
601 if (!pmb_ppn_in_range(ppn)) {
602 /*
603 * Invalidate anything out of bounds.
604 */
605 writel_uncached(addr_val & ~PMB_V, addr);
606 writel_uncached(data_val & ~PMB_V, data);
607 continue;
608 }
609
610 /*
611 * Update the caching attributes if necessary
612 */
613 if (data_val & PMB_C) {
614 data_val &= ~PMB_CACHE_MASK;
615 data_val |= pmb_cache_flags();
616
617 writel_uncached(data_val, data);
618 }
619
620 size = data_val & PMB_SZ_MASK;
621 flags = size | (data_val & PMB_CACHE_MASK);
622
623 pmbe = pmb_alloc(vpn, ppn, flags, i);
624 if (IS_ERR(pmbe)) {
625 WARN_ON_ONCE(1);
626 continue;
627 }
628
629 spin_lock_irqsave(&pmbe->lock, irqflags);
630
631 for (j = 0; j < ARRAY_SIZE(pmb_sizes); j++)
632 if (pmb_sizes[j].flag == size)
633 pmbe->size = pmb_sizes[j].size;
634
635 if (pmbp) {
636 spin_lock(&pmbp->lock);
637
638 /*
639 * Compare the previous entry against the current one to
640 * see if the entries span a contiguous mapping. If so,
641 * setup the entry links accordingly. Compound mappings
642 * are later coalesced.
643 */
644 if (pmb_can_merge(pmbp, pmbe))
645 pmbp->link = pmbe;
646
647 spin_unlock(&pmbp->lock);
648 }
649
650 pmbp = pmbe;
651
652 spin_unlock_irqrestore(&pmbe->lock, irqflags);
653 }
654 }
655
656 static void __init pmb_merge(struct pmb_entry *head)
657 {
658 unsigned long span, newsize;
659 struct pmb_entry *tail;
660 int i = 1, depth = 0;
661
662 span = newsize = head->size;
663
664 tail = head->link;
665 while (tail) {
666 span += tail->size;
667
668 if (pmb_size_valid(span)) {
669 newsize = span;
670 depth = i;
671 }
672
673 /* This is the end of the line.. */
674 if (!tail->link)
675 break;
676
677 tail = tail->link;
678 i++;
679 }
680
681 /*
682 * The merged page size must be valid.
683 */
684 if (!pmb_size_valid(newsize))
685 return;
686
687 head->flags &= ~PMB_SZ_MASK;
688 head->flags |= pmb_size_to_flags(newsize);
689
690 head->size = newsize;
691
692 __pmb_unmap_entry(head->link, depth);
693 __set_pmb_entry(head);
694 }
695
696 static void __init pmb_coalesce(void)
697 {
698 unsigned long flags;
699 int i;
700
701 write_lock_irqsave(&pmb_rwlock, flags);
702
703 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
704 struct pmb_entry *pmbe;
705
706 if (!test_bit(i, pmb_map))
707 continue;
708
709 pmbe = &pmb_entry_list[i];
710
711 /*
712 * We're only interested in compound mappings
713 */
714 if (!pmbe->link)
715 continue;
716
717 /*
718 * Nothing to do if it already uses the largest possible
719 * page size.
720 */
721 if (pmbe->size == SZ_512M)
722 continue;
723
724 pmb_merge(pmbe);
725 }
726
727 write_unlock_irqrestore(&pmb_rwlock, flags);
728 }
729
730 #ifdef CONFIG_UNCACHED_MAPPING
731 static void __init pmb_resize(void)
732 {
733 int i;
734
735 /*
736 * If the uncached mapping was constructed by the kernel, it will
737 * already be a reasonable size.
738 */
739 if (uncached_size == SZ_16M)
740 return;
741
742 read_lock(&pmb_rwlock);
743
744 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
745 struct pmb_entry *pmbe;
746 unsigned long flags;
747
748 if (!test_bit(i, pmb_map))
749 continue;
750
751 pmbe = &pmb_entry_list[i];
752
753 if (pmbe->vpn != uncached_start)
754 continue;
755
756 /*
757 * Found it, now resize it.
758 */
759 spin_lock_irqsave(&pmbe->lock, flags);
760
761 pmbe->size = SZ_16M;
762 pmbe->flags &= ~PMB_SZ_MASK;
763 pmbe->flags |= pmb_size_to_flags(pmbe->size);
764
765 uncached_resize(pmbe->size);
766
767 __set_pmb_entry(pmbe);
768
769 spin_unlock_irqrestore(&pmbe->lock, flags);
770 }
771
772 read_lock(&pmb_rwlock);
773 }
774 #endif
775
776 static int __init early_pmb(char *p)
777 {
778 if (!p)
779 return 0;
780
781 if (strstr(p, "iomap"))
782 pmb_iomapping_enabled = 1;
783
784 return 0;
785 }
786 early_param("pmb", early_pmb);
787
788 void __init pmb_init(void)
789 {
790 /* Synchronize software state */
791 pmb_synchronize();
792
793 /* Attempt to combine compound mappings */
794 pmb_coalesce();
795
796 #ifdef CONFIG_UNCACHED_MAPPING
797 /* Resize initial mappings, if necessary */
798 pmb_resize();
799 #endif
800
801 /* Log them */
802 pmb_notify();
803
804 writel_uncached(0, PMB_IRMCR);
805
806 /* Flush out the TLB */
807 local_flush_tlb_all();
808 ctrl_barrier();
809 }
810
811 bool __in_29bit_mode(void)
812 {
813 return (__raw_readl(PMB_PASCR) & PASCR_SE) == 0;
814 }
815
816 static int pmb_seq_show(struct seq_file *file, void *iter)
817 {
818 int i;
819
820 seq_printf(file, "V: Valid, C: Cacheable, WT: Write-Through\n"
821 "CB: Copy-Back, B: Buffered, UB: Unbuffered\n");
822 seq_printf(file, "ety vpn ppn size flags\n");
823
824 for (i = 0; i < NR_PMB_ENTRIES; i++) {
825 unsigned long addr, data;
826 unsigned int size;
827 char *sz_str = NULL;
828
829 addr = __raw_readl(mk_pmb_addr(i));
830 data = __raw_readl(mk_pmb_data(i));
831
832 size = data & PMB_SZ_MASK;
833 sz_str = (size == PMB_SZ_16M) ? " 16MB":
834 (size == PMB_SZ_64M) ? " 64MB":
835 (size == PMB_SZ_128M) ? "128MB":
836 "512MB";
837
838 /* 02: V 0x88 0x08 128MB C CB B */
839 seq_printf(file, "%02d: %c 0x%02lx 0x%02lx %s %c %s %s\n",
840 i, ((addr & PMB_V) && (data & PMB_V)) ? 'V' : ' ',
841 (addr >> 24) & 0xff, (data >> 24) & 0xff,
842 sz_str, (data & PMB_C) ? 'C' : ' ',
843 (data & PMB_WT) ? "WT" : "CB",
844 (data & PMB_UB) ? "UB" : " B");
845 }
846
847 return 0;
848 }
849
850 static int pmb_debugfs_open(struct inode *inode, struct file *file)
851 {
852 return single_open(file, pmb_seq_show, NULL);
853 }
854
855 static const struct file_operations pmb_debugfs_fops = {
856 .owner = THIS_MODULE,
857 .open = pmb_debugfs_open,
858 .read = seq_read,
859 .llseek = seq_lseek,
860 .release = single_release,
861 };
862
863 static int __init pmb_debugfs_init(void)
864 {
865 struct dentry *dentry;
866
867 dentry = debugfs_create_file("pmb", S_IFREG | S_IRUGO,
868 sh_debugfs_root, NULL, &pmb_debugfs_fops);
869 if (!dentry)
870 return -ENOMEM;
871 if (IS_ERR(dentry))
872 return PTR_ERR(dentry);
873
874 return 0;
875 }
876 subsys_initcall(pmb_debugfs_init);
877
878 #ifdef CONFIG_PM
879 static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state)
880 {
881 static pm_message_t prev_state;
882 int i;
883
884 /* Restore the PMB after a resume from hibernation */
885 if (state.event == PM_EVENT_ON &&
886 prev_state.event == PM_EVENT_FREEZE) {
887 struct pmb_entry *pmbe;
888
889 read_lock(&pmb_rwlock);
890
891 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
892 if (test_bit(i, pmb_map)) {
893 pmbe = &pmb_entry_list[i];
894 set_pmb_entry(pmbe);
895 }
896 }
897
898 read_unlock(&pmb_rwlock);
899 }
900
901 prev_state = state;
902
903 return 0;
904 }
905
906 static int pmb_sysdev_resume(struct sys_device *dev)
907 {
908 return pmb_sysdev_suspend(dev, PMSG_ON);
909 }
910
911 static struct sysdev_driver pmb_sysdev_driver = {
912 .suspend = pmb_sysdev_suspend,
913 .resume = pmb_sysdev_resume,
914 };
915
916 static int __init pmb_sysdev_init(void)
917 {
918 return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver);
919 }
920 subsys_initcall(pmb_sysdev_init);
921 #endif