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1 /*
2 * arch/sh/mm/pmb.c
3 *
4 * Privileged Space Mapping Buffer (PMB) Support.
5 *
6 * Copyright (C) 2005 - 2010 Paul Mundt
7 * Copyright (C) 2010 Matt Fleming
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13 #include <linux/init.h>
14 #include <linux/kernel.h>
15 #include <linux/sysdev.h>
16 #include <linux/cpu.h>
17 #include <linux/module.h>
18 #include <linux/slab.h>
19 #include <linux/bitops.h>
20 #include <linux/debugfs.h>
21 #include <linux/fs.h>
22 #include <linux/seq_file.h>
23 #include <linux/err.h>
24 #include <linux/io.h>
25 #include <linux/spinlock.h>
26 #include <linux/vmalloc.h>
27 #include <asm/cacheflush.h>
28 #include <asm/sizes.h>
29 #include <asm/system.h>
30 #include <asm/uaccess.h>
31 #include <asm/pgtable.h>
32 #include <asm/page.h>
33 #include <asm/mmu.h>
34 #include <asm/mmu_context.h>
35
36 struct pmb_entry;
37
38 struct pmb_entry {
39 unsigned long vpn;
40 unsigned long ppn;
41 unsigned long flags;
42 unsigned long size;
43
44 spinlock_t lock;
45
46 /*
47 * 0 .. NR_PMB_ENTRIES for specific entry selection, or
48 * PMB_NO_ENTRY to search for a free one
49 */
50 int entry;
51
52 /* Adjacent entry link for contiguous multi-entry mappings */
53 struct pmb_entry *link;
54 };
55
56 static struct {
57 unsigned long size;
58 int flag;
59 } pmb_sizes[] = {
60 { .size = SZ_512M, .flag = PMB_SZ_512M, },
61 { .size = SZ_128M, .flag = PMB_SZ_128M, },
62 { .size = SZ_64M, .flag = PMB_SZ_64M, },
63 { .size = SZ_16M, .flag = PMB_SZ_16M, },
64 };
65
66 static void pmb_unmap_entry(struct pmb_entry *, int depth);
67
68 static DEFINE_RWLOCK(pmb_rwlock);
69 static struct pmb_entry pmb_entry_list[NR_PMB_ENTRIES];
70 static DECLARE_BITMAP(pmb_map, NR_PMB_ENTRIES);
71
72 static unsigned int pmb_iomapping_enabled;
73
74 static __always_inline unsigned long mk_pmb_entry(unsigned int entry)
75 {
76 return (entry & PMB_E_MASK) << PMB_E_SHIFT;
77 }
78
79 static __always_inline unsigned long mk_pmb_addr(unsigned int entry)
80 {
81 return mk_pmb_entry(entry) | PMB_ADDR;
82 }
83
84 static __always_inline unsigned long mk_pmb_data(unsigned int entry)
85 {
86 return mk_pmb_entry(entry) | PMB_DATA;
87 }
88
89 static __always_inline unsigned int pmb_ppn_in_range(unsigned long ppn)
90 {
91 return ppn >= __pa(memory_start) && ppn < __pa(memory_end);
92 }
93
94 /*
95 * Ensure that the PMB entries match our cache configuration.
96 *
97 * When we are in 32-bit address extended mode, CCR.CB becomes
98 * invalid, so care must be taken to manually adjust cacheable
99 * translations.
100 */
101 static __always_inline unsigned long pmb_cache_flags(void)
102 {
103 unsigned long flags = 0;
104
105 #if defined(CONFIG_CACHE_OFF)
106 flags |= PMB_WT | PMB_UB;
107 #elif defined(CONFIG_CACHE_WRITETHROUGH)
108 flags |= PMB_C | PMB_WT | PMB_UB;
109 #elif defined(CONFIG_CACHE_WRITEBACK)
110 flags |= PMB_C;
111 #endif
112
113 return flags;
114 }
115
116 /*
117 * Convert typical pgprot value to the PMB equivalent
118 */
119 static inline unsigned long pgprot_to_pmb_flags(pgprot_t prot)
120 {
121 unsigned long pmb_flags = 0;
122 u64 flags = pgprot_val(prot);
123
124 if (flags & _PAGE_CACHABLE)
125 pmb_flags |= PMB_C;
126 if (flags & _PAGE_WT)
127 pmb_flags |= PMB_WT | PMB_UB;
128
129 return pmb_flags;
130 }
131
132 static inline bool pmb_can_merge(struct pmb_entry *a, struct pmb_entry *b)
133 {
134 return (b->vpn == (a->vpn + a->size)) &&
135 (b->ppn == (a->ppn + a->size)) &&
136 (b->flags == a->flags);
137 }
138
139 static bool pmb_mapping_exists(unsigned long vaddr, phys_addr_t phys,
140 unsigned long size)
141 {
142 int i;
143
144 read_lock(&pmb_rwlock);
145
146 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
147 struct pmb_entry *pmbe, *iter;
148 unsigned long span;
149
150 if (!test_bit(i, pmb_map))
151 continue;
152
153 pmbe = &pmb_entry_list[i];
154
155 /*
156 * See if VPN and PPN are bounded by an existing mapping.
157 */
158 if ((vaddr < pmbe->vpn) || (vaddr >= (pmbe->vpn + pmbe->size)))
159 continue;
160 if ((phys < pmbe->ppn) || (phys >= (pmbe->ppn + pmbe->size)))
161 continue;
162
163 /*
164 * Now see if we're in range of a simple mapping.
165 */
166 if (size <= pmbe->size) {
167 read_unlock(&pmb_rwlock);
168 return true;
169 }
170
171 span = pmbe->size;
172
173 /*
174 * Finally for sizes that involve compound mappings, walk
175 * the chain.
176 */
177 for (iter = pmbe->link; iter; iter = iter->link)
178 span += iter->size;
179
180 /*
181 * Nothing else to do if the range requirements are met.
182 */
183 if (size <= span) {
184 read_unlock(&pmb_rwlock);
185 return true;
186 }
187 }
188
189 read_unlock(&pmb_rwlock);
190 return false;
191 }
192
193 static bool pmb_size_valid(unsigned long size)
194 {
195 int i;
196
197 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
198 if (pmb_sizes[i].size == size)
199 return true;
200
201 return false;
202 }
203
204 static inline bool pmb_addr_valid(unsigned long addr, unsigned long size)
205 {
206 return (addr >= P1SEG && (addr + size - 1) < P3SEG);
207 }
208
209 static inline bool pmb_prot_valid(pgprot_t prot)
210 {
211 return (pgprot_val(prot) & _PAGE_USER) == 0;
212 }
213
214 static int pmb_size_to_flags(unsigned long size)
215 {
216 int i;
217
218 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
219 if (pmb_sizes[i].size == size)
220 return pmb_sizes[i].flag;
221
222 return 0;
223 }
224
225 static int pmb_alloc_entry(void)
226 {
227 int pos;
228
229 pos = find_first_zero_bit(pmb_map, NR_PMB_ENTRIES);
230 if (pos >= 0 && pos < NR_PMB_ENTRIES)
231 __set_bit(pos, pmb_map);
232 else
233 pos = -ENOSPC;
234
235 return pos;
236 }
237
238 static struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
239 unsigned long flags, int entry)
240 {
241 struct pmb_entry *pmbe;
242 unsigned long irqflags;
243 void *ret = NULL;
244 int pos;
245
246 write_lock_irqsave(&pmb_rwlock, irqflags);
247
248 if (entry == PMB_NO_ENTRY) {
249 pos = pmb_alloc_entry();
250 if (unlikely(pos < 0)) {
251 ret = ERR_PTR(pos);
252 goto out;
253 }
254 } else {
255 if (__test_and_set_bit(entry, pmb_map)) {
256 ret = ERR_PTR(-ENOSPC);
257 goto out;
258 }
259
260 pos = entry;
261 }
262
263 write_unlock_irqrestore(&pmb_rwlock, irqflags);
264
265 pmbe = &pmb_entry_list[pos];
266
267 memset(pmbe, 0, sizeof(struct pmb_entry));
268
269 spin_lock_init(&pmbe->lock);
270
271 pmbe->vpn = vpn;
272 pmbe->ppn = ppn;
273 pmbe->flags = flags;
274 pmbe->entry = pos;
275
276 return pmbe;
277
278 out:
279 write_unlock_irqrestore(&pmb_rwlock, irqflags);
280 return ret;
281 }
282
283 static void pmb_free(struct pmb_entry *pmbe)
284 {
285 __clear_bit(pmbe->entry, pmb_map);
286
287 pmbe->entry = PMB_NO_ENTRY;
288 pmbe->link = NULL;
289 }
290
291 /*
292 * Must be run uncached.
293 */
294 static void __set_pmb_entry(struct pmb_entry *pmbe)
295 {
296 unsigned long addr, data;
297
298 addr = mk_pmb_addr(pmbe->entry);
299 data = mk_pmb_data(pmbe->entry);
300
301 jump_to_uncached();
302
303 /* Set V-bit */
304 __raw_writel(pmbe->vpn | PMB_V, addr);
305 __raw_writel(pmbe->ppn | pmbe->flags | PMB_V, data);
306
307 back_to_cached();
308 }
309
310 static void __clear_pmb_entry(struct pmb_entry *pmbe)
311 {
312 unsigned long addr, data;
313 unsigned long addr_val, data_val;
314
315 addr = mk_pmb_addr(pmbe->entry);
316 data = mk_pmb_data(pmbe->entry);
317
318 addr_val = __raw_readl(addr);
319 data_val = __raw_readl(data);
320
321 /* Clear V-bit */
322 writel_uncached(addr_val & ~PMB_V, addr);
323 writel_uncached(data_val & ~PMB_V, data);
324 }
325
326 static void set_pmb_entry(struct pmb_entry *pmbe)
327 {
328 unsigned long flags;
329
330 spin_lock_irqsave(&pmbe->lock, flags);
331 __set_pmb_entry(pmbe);
332 spin_unlock_irqrestore(&pmbe->lock, flags);
333 }
334
335 int pmb_bolt_mapping(unsigned long vaddr, phys_addr_t phys,
336 unsigned long size, pgprot_t prot)
337 {
338 struct pmb_entry *pmbp, *pmbe;
339 unsigned long orig_addr, orig_size;
340 unsigned long flags, pmb_flags;
341 int i, mapped;
342
343 if (!pmb_addr_valid(vaddr, size))
344 return -EFAULT;
345 if (pmb_mapping_exists(vaddr, phys, size))
346 return 0;
347
348 orig_addr = vaddr;
349 orig_size = size;
350
351 flush_tlb_kernel_range(vaddr, vaddr + size);
352
353 pmb_flags = pgprot_to_pmb_flags(prot);
354 pmbp = NULL;
355
356 do {
357 for (i = mapped = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
358 if (size < pmb_sizes[i].size)
359 continue;
360
361 pmbe = pmb_alloc(vaddr, phys, pmb_flags |
362 pmb_sizes[i].flag, PMB_NO_ENTRY);
363 if (IS_ERR(pmbe)) {
364 pmb_unmap_entry(pmbp, mapped);
365 return PTR_ERR(pmbe);
366 }
367
368 spin_lock_irqsave(&pmbe->lock, flags);
369
370 pmbe->size = pmb_sizes[i].size;
371
372 __set_pmb_entry(pmbe);
373
374 phys += pmbe->size;
375 vaddr += pmbe->size;
376 size -= pmbe->size;
377
378 /*
379 * Link adjacent entries that span multiple PMB
380 * entries for easier tear-down.
381 */
382 if (likely(pmbp)) {
383 spin_lock(&pmbp->lock);
384 pmbp->link = pmbe;
385 spin_unlock(&pmbp->lock);
386 }
387
388 pmbp = pmbe;
389
390 /*
391 * Instead of trying smaller sizes on every
392 * iteration (even if we succeed in allocating
393 * space), try using pmb_sizes[i].size again.
394 */
395 i--;
396 mapped++;
397
398 spin_unlock_irqrestore(&pmbe->lock, flags);
399 }
400 } while (size >= SZ_16M);
401
402 flush_cache_vmap(orig_addr, orig_addr + orig_size);
403
404 return 0;
405 }
406
407 void __iomem *pmb_remap_caller(phys_addr_t phys, unsigned long size,
408 pgprot_t prot, void *caller)
409 {
410 unsigned long vaddr;
411 phys_addr_t offset, last_addr;
412 phys_addr_t align_mask;
413 unsigned long aligned;
414 struct vm_struct *area;
415 int i, ret;
416
417 if (!pmb_iomapping_enabled)
418 return NULL;
419
420 /*
421 * Small mappings need to go through the TLB.
422 */
423 if (size < SZ_16M)
424 return ERR_PTR(-EINVAL);
425 if (!pmb_prot_valid(prot))
426 return ERR_PTR(-EINVAL);
427
428 for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++)
429 if (size >= pmb_sizes[i].size)
430 break;
431
432 last_addr = phys + size;
433 align_mask = ~(pmb_sizes[i].size - 1);
434 offset = phys & ~align_mask;
435 phys &= align_mask;
436 aligned = ALIGN(last_addr, pmb_sizes[i].size) - phys;
437
438 /*
439 * XXX: This should really start from uncached_end, but this
440 * causes the MMU to reset, so for now we restrict it to the
441 * 0xb000...0xc000 range.
442 */
443 area = __get_vm_area_caller(aligned, VM_IOREMAP, 0xb0000000,
444 P3SEG, caller);
445 if (!area)
446 return NULL;
447
448 area->phys_addr = phys;
449 vaddr = (unsigned long)area->addr;
450
451 ret = pmb_bolt_mapping(vaddr, phys, size, prot);
452 if (unlikely(ret != 0))
453 return ERR_PTR(ret);
454
455 return (void __iomem *)(offset + (char *)vaddr);
456 }
457
458 int pmb_unmap(void __iomem *addr)
459 {
460 struct pmb_entry *pmbe = NULL;
461 unsigned long vaddr = (unsigned long __force)addr;
462 int i, found = 0;
463
464 read_lock(&pmb_rwlock);
465
466 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
467 if (test_bit(i, pmb_map)) {
468 pmbe = &pmb_entry_list[i];
469 if (pmbe->vpn == vaddr) {
470 found = 1;
471 break;
472 }
473 }
474 }
475
476 read_unlock(&pmb_rwlock);
477
478 if (found) {
479 pmb_unmap_entry(pmbe, NR_PMB_ENTRIES);
480 return 0;
481 }
482
483 return -EINVAL;
484 }
485
486 static void __pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
487 {
488 do {
489 struct pmb_entry *pmblink = pmbe;
490
491 /*
492 * We may be called before this pmb_entry has been
493 * entered into the PMB table via set_pmb_entry(), but
494 * that's OK because we've allocated a unique slot for
495 * this entry in pmb_alloc() (even if we haven't filled
496 * it yet).
497 *
498 * Therefore, calling __clear_pmb_entry() is safe as no
499 * other mapping can be using that slot.
500 */
501 __clear_pmb_entry(pmbe);
502
503 flush_cache_vunmap(pmbe->vpn, pmbe->vpn + pmbe->size);
504
505 pmbe = pmblink->link;
506
507 pmb_free(pmblink);
508 } while (pmbe && --depth);
509 }
510
511 static void pmb_unmap_entry(struct pmb_entry *pmbe, int depth)
512 {
513 unsigned long flags;
514
515 if (unlikely(!pmbe))
516 return;
517
518 write_lock_irqsave(&pmb_rwlock, flags);
519 __pmb_unmap_entry(pmbe, depth);
520 write_unlock_irqrestore(&pmb_rwlock, flags);
521 }
522
523 static void __init pmb_notify(void)
524 {
525 int i;
526
527 pr_info("PMB: boot mappings:\n");
528
529 read_lock(&pmb_rwlock);
530
531 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
532 struct pmb_entry *pmbe;
533
534 if (!test_bit(i, pmb_map))
535 continue;
536
537 pmbe = &pmb_entry_list[i];
538
539 pr_info(" 0x%08lx -> 0x%08lx [ %4ldMB %2scached ]\n",
540 pmbe->vpn >> PAGE_SHIFT, pmbe->ppn >> PAGE_SHIFT,
541 pmbe->size >> 20, (pmbe->flags & PMB_C) ? "" : "un");
542 }
543
544 read_unlock(&pmb_rwlock);
545 }
546
547 /*
548 * Sync our software copy of the PMB mappings with those in hardware. The
549 * mappings in the hardware PMB were either set up by the bootloader or
550 * very early on by the kernel.
551 */
552 static void __init pmb_synchronize(void)
553 {
554 struct pmb_entry *pmbp = NULL;
555 int i, j;
556
557 /*
558 * Run through the initial boot mappings, log the established
559 * ones, and blow away anything that falls outside of the valid
560 * PPN range. Specifically, we only care about existing mappings
561 * that impact the cached/uncached sections.
562 *
563 * Note that touching these can be a bit of a minefield; the boot
564 * loader can establish multi-page mappings with the same caching
565 * attributes, so we need to ensure that we aren't modifying a
566 * mapping that we're presently executing from, or may execute
567 * from in the case of straddling page boundaries.
568 *
569 * In the future we will have to tidy up after the boot loader by
570 * jumping between the cached and uncached mappings and tearing
571 * down alternating mappings while executing from the other.
572 */
573 for (i = 0; i < NR_PMB_ENTRIES; i++) {
574 unsigned long addr, data;
575 unsigned long addr_val, data_val;
576 unsigned long ppn, vpn, flags;
577 unsigned long irqflags;
578 unsigned int size;
579 struct pmb_entry *pmbe;
580
581 addr = mk_pmb_addr(i);
582 data = mk_pmb_data(i);
583
584 addr_val = __raw_readl(addr);
585 data_val = __raw_readl(data);
586
587 /*
588 * Skip over any bogus entries
589 */
590 if (!(data_val & PMB_V) || !(addr_val & PMB_V))
591 continue;
592
593 ppn = data_val & PMB_PFN_MASK;
594 vpn = addr_val & PMB_PFN_MASK;
595
596 /*
597 * Only preserve in-range mappings.
598 */
599 if (!pmb_ppn_in_range(ppn)) {
600 /*
601 * Invalidate anything out of bounds.
602 */
603 writel_uncached(addr_val & ~PMB_V, addr);
604 writel_uncached(data_val & ~PMB_V, data);
605 continue;
606 }
607
608 /*
609 * Update the caching attributes if necessary
610 */
611 if (data_val & PMB_C) {
612 data_val &= ~PMB_CACHE_MASK;
613 data_val |= pmb_cache_flags();
614
615 writel_uncached(data_val, data);
616 }
617
618 size = data_val & PMB_SZ_MASK;
619 flags = size | (data_val & PMB_CACHE_MASK);
620
621 pmbe = pmb_alloc(vpn, ppn, flags, i);
622 if (IS_ERR(pmbe)) {
623 WARN_ON_ONCE(1);
624 continue;
625 }
626
627 spin_lock_irqsave(&pmbe->lock, irqflags);
628
629 for (j = 0; j < ARRAY_SIZE(pmb_sizes); j++)
630 if (pmb_sizes[j].flag == size)
631 pmbe->size = pmb_sizes[j].size;
632
633 if (pmbp) {
634 spin_lock(&pmbp->lock);
635
636 /*
637 * Compare the previous entry against the current one to
638 * see if the entries span a contiguous mapping. If so,
639 * setup the entry links accordingly. Compound mappings
640 * are later coalesced.
641 */
642 if (pmb_can_merge(pmbp, pmbe))
643 pmbp->link = pmbe;
644
645 spin_unlock(&pmbp->lock);
646 }
647
648 pmbp = pmbe;
649
650 spin_unlock_irqrestore(&pmbe->lock, irqflags);
651 }
652 }
653
654 static void __init pmb_merge(struct pmb_entry *head)
655 {
656 unsigned long span, newsize;
657 struct pmb_entry *tail;
658 int i = 1, depth = 0;
659
660 span = newsize = head->size;
661
662 tail = head->link;
663 while (tail) {
664 span += tail->size;
665
666 if (pmb_size_valid(span)) {
667 newsize = span;
668 depth = i;
669 }
670
671 /* This is the end of the line.. */
672 if (!tail->link)
673 break;
674
675 tail = tail->link;
676 i++;
677 }
678
679 /*
680 * The merged page size must be valid.
681 */
682 if (!pmb_size_valid(newsize))
683 return;
684
685 head->flags &= ~PMB_SZ_MASK;
686 head->flags |= pmb_size_to_flags(newsize);
687
688 head->size = newsize;
689
690 __pmb_unmap_entry(head->link, depth);
691 __set_pmb_entry(head);
692 }
693
694 static void __init pmb_coalesce(void)
695 {
696 unsigned long flags;
697 int i;
698
699 write_lock_irqsave(&pmb_rwlock, flags);
700
701 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
702 struct pmb_entry *pmbe;
703
704 if (!test_bit(i, pmb_map))
705 continue;
706
707 pmbe = &pmb_entry_list[i];
708
709 /*
710 * We're only interested in compound mappings
711 */
712 if (!pmbe->link)
713 continue;
714
715 /*
716 * Nothing to do if it already uses the largest possible
717 * page size.
718 */
719 if (pmbe->size == SZ_512M)
720 continue;
721
722 pmb_merge(pmbe);
723 }
724
725 write_unlock_irqrestore(&pmb_rwlock, flags);
726 }
727
728 #ifdef CONFIG_UNCACHED_MAPPING
729 static void __init pmb_resize(void)
730 {
731 int i;
732
733 /*
734 * If the uncached mapping was constructed by the kernel, it will
735 * already be a reasonable size.
736 */
737 if (uncached_size == SZ_16M)
738 return;
739
740 read_lock(&pmb_rwlock);
741
742 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
743 struct pmb_entry *pmbe;
744 unsigned long flags;
745
746 if (!test_bit(i, pmb_map))
747 continue;
748
749 pmbe = &pmb_entry_list[i];
750
751 if (pmbe->vpn != uncached_start)
752 continue;
753
754 /*
755 * Found it, now resize it.
756 */
757 spin_lock_irqsave(&pmbe->lock, flags);
758
759 pmbe->size = SZ_16M;
760 pmbe->flags &= ~PMB_SZ_MASK;
761 pmbe->flags |= pmb_size_to_flags(pmbe->size);
762
763 uncached_resize(pmbe->size);
764
765 __set_pmb_entry(pmbe);
766
767 spin_unlock_irqrestore(&pmbe->lock, flags);
768 }
769
770 read_lock(&pmb_rwlock);
771 }
772 #endif
773
774 static int __init early_pmb(char *p)
775 {
776 if (!p)
777 return 0;
778
779 if (strstr(p, "iomap"))
780 pmb_iomapping_enabled = 1;
781
782 return 0;
783 }
784 early_param("pmb", early_pmb);
785
786 void __init pmb_init(void)
787 {
788 /* Synchronize software state */
789 pmb_synchronize();
790
791 /* Attempt to combine compound mappings */
792 pmb_coalesce();
793
794 #ifdef CONFIG_UNCACHED_MAPPING
795 /* Resize initial mappings, if necessary */
796 pmb_resize();
797 #endif
798
799 /* Log them */
800 pmb_notify();
801
802 writel_uncached(0, PMB_IRMCR);
803
804 /* Flush out the TLB */
805 __raw_writel(__raw_readl(MMUCR) | MMUCR_TI, MMUCR);
806 ctrl_barrier();
807 }
808
809 bool __in_29bit_mode(void)
810 {
811 return (__raw_readl(PMB_PASCR) & PASCR_SE) == 0;
812 }
813
814 static int pmb_seq_show(struct seq_file *file, void *iter)
815 {
816 int i;
817
818 seq_printf(file, "V: Valid, C: Cacheable, WT: Write-Through\n"
819 "CB: Copy-Back, B: Buffered, UB: Unbuffered\n");
820 seq_printf(file, "ety vpn ppn size flags\n");
821
822 for (i = 0; i < NR_PMB_ENTRIES; i++) {
823 unsigned long addr, data;
824 unsigned int size;
825 char *sz_str = NULL;
826
827 addr = __raw_readl(mk_pmb_addr(i));
828 data = __raw_readl(mk_pmb_data(i));
829
830 size = data & PMB_SZ_MASK;
831 sz_str = (size == PMB_SZ_16M) ? " 16MB":
832 (size == PMB_SZ_64M) ? " 64MB":
833 (size == PMB_SZ_128M) ? "128MB":
834 "512MB";
835
836 /* 02: V 0x88 0x08 128MB C CB B */
837 seq_printf(file, "%02d: %c 0x%02lx 0x%02lx %s %c %s %s\n",
838 i, ((addr & PMB_V) && (data & PMB_V)) ? 'V' : ' ',
839 (addr >> 24) & 0xff, (data >> 24) & 0xff,
840 sz_str, (data & PMB_C) ? 'C' : ' ',
841 (data & PMB_WT) ? "WT" : "CB",
842 (data & PMB_UB) ? "UB" : " B");
843 }
844
845 return 0;
846 }
847
848 static int pmb_debugfs_open(struct inode *inode, struct file *file)
849 {
850 return single_open(file, pmb_seq_show, NULL);
851 }
852
853 static const struct file_operations pmb_debugfs_fops = {
854 .owner = THIS_MODULE,
855 .open = pmb_debugfs_open,
856 .read = seq_read,
857 .llseek = seq_lseek,
858 .release = single_release,
859 };
860
861 static int __init pmb_debugfs_init(void)
862 {
863 struct dentry *dentry;
864
865 dentry = debugfs_create_file("pmb", S_IFREG | S_IRUGO,
866 sh_debugfs_root, NULL, &pmb_debugfs_fops);
867 if (!dentry)
868 return -ENOMEM;
869 if (IS_ERR(dentry))
870 return PTR_ERR(dentry);
871
872 return 0;
873 }
874 subsys_initcall(pmb_debugfs_init);
875
876 #ifdef CONFIG_PM
877 static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state)
878 {
879 static pm_message_t prev_state;
880 int i;
881
882 /* Restore the PMB after a resume from hibernation */
883 if (state.event == PM_EVENT_ON &&
884 prev_state.event == PM_EVENT_FREEZE) {
885 struct pmb_entry *pmbe;
886
887 read_lock(&pmb_rwlock);
888
889 for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
890 if (test_bit(i, pmb_map)) {
891 pmbe = &pmb_entry_list[i];
892 set_pmb_entry(pmbe);
893 }
894 }
895
896 read_unlock(&pmb_rwlock);
897 }
898
899 prev_state = state;
900
901 return 0;
902 }
903
904 static int pmb_sysdev_resume(struct sys_device *dev)
905 {
906 return pmb_sysdev_suspend(dev, PMSG_ON);
907 }
908
909 static struct sysdev_driver pmb_sysdev_driver = {
910 .suspend = pmb_sysdev_suspend,
911 .resume = pmb_sysdev_resume,
912 };
913
914 static int __init pmb_sysdev_init(void)
915 {
916 return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver);
917 }
918 subsys_initcall(pmb_sysdev_init);
919 #endif