arch/sh64/Kconfig

   1 #
   2 # For a description of the syntax of this configuration file,
   3 # see Documentation/kbuild/config-language.txt.
   4 #
   5
   6 mainmenu "Linux/SH64 Kernel Configuration"
   7
   8 config SUPERH
   9         bool
  10         default y
  11
  12 config SUPERH64
  13         bool
  14         default y
  15
  16 config MMU
  17         bool
  18         default y
  19
  20 config UID16
  21         bool
  22         default y
  23
  24 config RWSEM_GENERIC_SPINLOCK
  25         bool
  26         default y
  27
  28 config GENERIC_CALIBRATE_DELAY
  29         bool
  30         default y
  31
  32 config RWSEM_XCHGADD_ALGORITHM
  33         bool
  34
  35 config GENERIC_ISA_DMA
  36         bool
  37
  38 source init/Kconfig
  39
  40 menu "System type"
  41
  42 choice
  43         prompt "SuperH system type"
  44         default SH_SIMULATOR
  45
  46 config SH_GENERIC
  47         bool "Generic"
  48
  49 config SH_SIMULATOR
  50         bool "Simulator"
  51
  52 config SH_CAYMAN
  53         bool "Cayman"
  54
  55 config SH_ROMRAM
  56         bool "ROM/RAM"
  57
  58 config SH_HARP
  59         bool "ST50-Harp"
  60
  61 endchoice
  62
  63 choice
  64         prompt "Processor family"
  65         default CPU_SH5
  66
  67 config CPU_SH5
  68         bool "SH-5"
  69
  70 endchoice
  71
  72 choice
  73         prompt "Processor type"
  74
  75 config CPU_SUBTYPE_SH5_101
  76         bool "SH5-101"
  77         depends on CPU_SH5
  78
  79 config CPU_SUBTYPE_SH5_103
  80         bool "SH5-103"
  81         depends on CPU_SH5
  82
  83 endchoice
  84
  85 choice
  86         prompt "Endianness"
  87         default LITTLE_ENDIAN
  88
  89 config LITTLE_ENDIAN
  90         bool "Little-Endian"
  91
  92 config BIG_ENDIAN
  93         bool "Big-Endian"
  94
  95 endchoice
  96
  97 config SH_FPU
  98         bool "FPU support"
  99         default y
 100
 101 config SH64_FPU_DENORM_FLUSH
 102         depends on SH_FPU
 103         bool "Flush floating point denorms to zero"
 104
 105 choice
 106         prompt "Page table levels"
 107         default SH64_PGTABLE_2_LEVEL
 108
 109 config SH64_PGTABLE_2_LEVEL
 110         bool "2"
 111
 112 config SH64_PGTABLE_3_LEVEL
 113         bool "3"
 114
 115 endchoice
 116
 117 choice
 118         prompt "HugeTLB page size"
 119         depends on HUGETLB_PAGE && MMU
 120         default HUGETLB_PAGE_SIZE_64K
 121
 122 config HUGETLB_PAGE_SIZE_64K
 123         bool "64K"
 124
 125 config HUGETLB_PAGE_SIZE_1MB
 126         bool "1MB"
 127
 128 config HUGETLB_PAGE_SIZE_512MB
 129         bool "512MB"
 130
 131 endchoice
 132
 133 config SH64_USER_MISALIGNED_FIXUP
 134         bool "Fixup misaligned loads/stores occurring in user mode"
 135
 136 comment "Memory options"
 137
 138 config CACHED_MEMORY_OFFSET
 139         hex "Cached Area Offset"
 140         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 141         default "20000000"
 142
 143 config MEMORY_START
 144         hex "Physical memory start address"
 145         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 146         default "80000000"
 147
 148 config MEMORY_SIZE_IN_MB
 149         int "Memory size (in MB)" if SH_HARP || SH_CAYMAN || SH_SIMULATOR
 150         default "64" if SH_HARP || SH_CAYMAN
 151         default "8" if SH_SIMULATOR
 152
 153 comment "Cache options"
 154
 155 config DCACHE_DISABLED
 156         bool "DCache Disabling"
 157         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 158
 159 choice
 160         prompt "DCache mode"
 161         depends on !DCACHE_DISABLED && !SH_SIMULATOR
 162         default DCACHE_WRITE_BACK
 163
 164 config DCACHE_WRITE_BACK
 165         bool "Write-back"
 166
 167 config DCACHE_WRITE_THROUGH
 168         bool "Write-through"
 169
 170 endchoice
 171
 172 config ICACHE_DISABLED
 173         bool "ICache Disabling"
 174         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 175
 176 config PCIDEVICE_MEMORY_START
 177         hex
 178         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 179         default "C0000000"
 180
 181 config DEVICE_MEMORY_START
 182         hex
 183         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 184         default "E0000000"
 185
 186 config FLASH_MEMORY_START
 187         hex "Flash memory/on-chip devices start address"
 188         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 189         default "00000000"
 190
 191 config PCI_BLOCK_START
 192         hex "PCI block start address"
 193         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 194         default "40000000"
 195
 196 comment "CPU Subtype specific options"
 197
 198 config SH64_ID2815_WORKAROUND
 199         bool "Include workaround for SH5-101 cut2 silicon defect ID2815"
 200
 201 comment "Misc options"
 202 config HEARTBEAT
 203         bool "Heartbeat LED"
 204
 205 config HDSP253_LED
 206         bool "Support for HDSP-253 LED"
 207         depends on SH_CAYMAN
 208
 209 config SH_DMA
 210         tristate "DMA controller (DMAC) support"
 211
 212 config PREEMPT
 213         bool "Preemptible Kernel (EXPERIMENTAL)"
 214         depends on EXPERIMENTAL
 215
 216 source "mm/Kconfig"
 217
 218 endmenu
 219
 220 menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
 221
 222 config ISA
 223         bool
 224
 225 config SBUS
 226         bool
 227
 228 config PCI
 229         bool "PCI support"
 230         help
 231           Find out whether you have a PCI motherboard. PCI is the name of a
 232           bus system, i.e. the way the CPU talks to the other stuff inside
 233           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
 234           VESA. If you have PCI, say Y, otherwise N.
 235
 236           The PCI-HOWTO, available from
 237           <http://www.tldp.org/docs.html#howto>, contains valuable
 238           information about which PCI hardware does work under Linux and which
 239           doesn't.
 240
 241 config SH_PCIDMA_NONCOHERENT
 242         bool "Cache and PCI noncoherent"
 243         depends on PCI
 244         default y
 245         help
 246           Enable this option if your platform does not have a CPU cache which
 247           remains coherent with PCI DMA. It is safest to say 'Y', although you
 248           will see better performance if you can say 'N', because the PCI DMA
 249           code will not have to flush the CPU's caches. If you have a PCI host
 250           bridge integrated with your SH CPU, refer carefully to the chip specs
 251           to see if you can say 'N' here. Otherwise, leave it as 'Y'.
 252
 253 source "drivers/pci/Kconfig"
 254
 255 source "drivers/pcmcia/Kconfig"
 256
 257 source "drivers/pci/hotplug/Kconfig"
 258
 259 endmenu
 260
 261 menu "Executable file formats"
 262
 263 source "fs/Kconfig.binfmt"
 264
 265 endmenu
 266
 267 source "net/Kconfig"
 268
 269 source "drivers/Kconfig"
 270
 271 source "fs/Kconfig"
 272
 273 source "arch/sh64/oprofile/Kconfig"
 274
 275 source "arch/sh64/Kconfig.debug"
 276
 277 source "security/Kconfig"
 278
 279 source "crypto/Kconfig"
 280
 281 source "lib/Kconfig"
 282
 283 #
 284 # Use the generic interrupt handling code in kernel/irq/:
 285 #
 286 config GENERIC_HARDIRQS
 287         bool
 288         default y
 289
 290 config GENERIC_IRQ_PROBE
 291         bool
 292         default y
 293