arch/sh64/Kconfig

   1 #
   2 # For a description of the syntax of this configuration file,
   3 # see Documentation/kbuild/config-language.txt.
   4 #
   5
   6 mainmenu "Linux/SH64 Kernel Configuration"
   7
   8 config SUPERH
   9         bool
  10         default y
  11
  12 config SUPERH64
  13         bool
  14         default y
  15
  16 config MMU
  17         bool
  18         default y
  19
  20 config RWSEM_GENERIC_SPINLOCK
  21         bool
  22         default y
  23
  24 config GENERIC_FIND_NEXT_BIT
  25         bool
  26         default y
  27
  28 config GENERIC_HWEIGHT
  29         bool
  30         default y
  31
  32 config GENERIC_CALIBRATE_DELAY
  33         bool
  34         default y
  35
  36 config RWSEM_XCHGADD_ALGORITHM
  37         bool
  38
  39 config GENERIC_ISA_DMA
  40         bool
  41
  42 config ARCH_HAS_ILOG2_U32
  43         bool
  44         default n
  45
  46 config ARCH_HAS_ILOG2_U64
  47         bool
  48         default n
  49
  50 source init/Kconfig
  51
  52 menu "System type"
  53
  54 choice
  55         prompt "SuperH system type"
  56         default SH_SIMULATOR
  57
  58 config SH_GENERIC
  59         bool "Generic"
  60
  61 config SH_SIMULATOR
  62         bool "Simulator"
  63
  64 config SH_CAYMAN
  65         bool "Cayman"
  66
  67 config SH_ROMRAM
  68         bool "ROM/RAM"
  69
  70 config SH_HARP
  71         bool "ST50-Harp"
  72
  73 endchoice
  74
  75 choice
  76         prompt "Processor family"
  77         default CPU_SH5
  78
  79 config CPU_SH5
  80         bool "SH-5"
  81
  82 endchoice
  83
  84 choice
  85         prompt "Processor type"
  86
  87 config CPU_SUBTYPE_SH5_101
  88         bool "SH5-101"
  89         depends on CPU_SH5
  90
  91 config CPU_SUBTYPE_SH5_103
  92         bool "SH5-103"
  93         depends on CPU_SH5
  94
  95 endchoice
  96
  97 choice
  98         prompt "Endianness"
  99         default LITTLE_ENDIAN
 100
 101 config LITTLE_ENDIAN
 102         bool "Little-Endian"
 103
 104 config BIG_ENDIAN
 105         bool "Big-Endian"
 106
 107 endchoice
 108
 109 config SH_FPU
 110         bool "FPU support"
 111         default y
 112
 113 config SH64_FPU_DENORM_FLUSH
 114         depends on SH_FPU
 115         bool "Flush floating point denorms to zero"
 116
 117 choice
 118         prompt "Page table levels"
 119         default SH64_PGTABLE_2_LEVEL
 120
 121 config SH64_PGTABLE_2_LEVEL
 122         bool "2"
 123
 124 config SH64_PGTABLE_3_LEVEL
 125         bool "3"
 126
 127 endchoice
 128
 129 choice
 130         prompt "HugeTLB page size"
 131         depends on HUGETLB_PAGE && MMU
 132         default HUGETLB_PAGE_SIZE_64K
 133
 134 config HUGETLB_PAGE_SIZE_64K
 135         bool "64K"
 136
 137 config HUGETLB_PAGE_SIZE_1MB
 138         bool "1MB"
 139
 140 config HUGETLB_PAGE_SIZE_512MB
 141         bool "512MB"
 142
 143 endchoice
 144
 145 config SH64_USER_MISALIGNED_FIXUP
 146         bool "Fixup misaligned loads/stores occurring in user mode"
 147
 148 comment "Memory options"
 149
 150 config CACHED_MEMORY_OFFSET
 151         hex "Cached Area Offset"
 152         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 153         default "20000000"
 154
 155 config MEMORY_START
 156         hex "Physical memory start address"
 157         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 158         default "80000000"
 159
 160 config MEMORY_SIZE_IN_MB
 161         int "Memory size (in MB)" if SH_HARP || SH_CAYMAN || SH_SIMULATOR
 162         default "64" if SH_HARP || SH_CAYMAN
 163         default "8" if SH_SIMULATOR
 164
 165 comment "Cache options"
 166
 167 config DCACHE_DISABLED
 168         bool "DCache Disabling"
 169         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 170
 171 choice
 172         prompt "DCache mode"
 173         depends on !DCACHE_DISABLED && !SH_SIMULATOR
 174         default DCACHE_WRITE_BACK
 175
 176 config DCACHE_WRITE_BACK
 177         bool "Write-back"
 178
 179 config DCACHE_WRITE_THROUGH
 180         bool "Write-through"
 181
 182 endchoice
 183
 184 config ICACHE_DISABLED
 185         bool "ICache Disabling"
 186         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 187
 188 config PCIDEVICE_MEMORY_START
 189         hex
 190         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 191         default "C0000000"
 192
 193 config DEVICE_MEMORY_START
 194         hex
 195         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 196         default "E0000000"
 197
 198 config FLASH_MEMORY_START
 199         hex "Flash memory/on-chip devices start address"
 200         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 201         default "00000000"
 202
 203 config PCI_BLOCK_START
 204         hex "PCI block start address"
 205         depends on SH_HARP || SH_CAYMAN || SH_SIMULATOR
 206         default "40000000"
 207
 208 comment "CPU Subtype specific options"
 209
 210 config SH64_ID2815_WORKAROUND
 211         bool "Include workaround for SH5-101 cut2 silicon defect ID2815"
 212
 213 comment "Misc options"
 214 config HEARTBEAT
 215         bool "Heartbeat LED"
 216
 217 config HDSP253_LED
 218         bool "Support for HDSP-253 LED"
 219         depends on SH_CAYMAN
 220
 221 config SH_DMA
 222         tristate "DMA controller (DMAC) support"
 223
 224 config PREEMPT
 225         bool "Preemptible Kernel (EXPERIMENTAL)"
 226         depends on EXPERIMENTAL
 227
 228 source "mm/Kconfig"
 229
 230 endmenu
 231
 232 menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
 233
 234 config ISA
 235         bool
 236
 237 config SBUS
 238         bool
 239
 240 config PCI
 241         bool "PCI support"
 242         help
 243           Find out whether you have a PCI motherboard. PCI is the name of a
 244           bus system, i.e. the way the CPU talks to the other stuff inside
 245           your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
 246           VESA. If you have PCI, say Y, otherwise N.
 247
 248           The PCI-HOWTO, available from
 249           <http://www.tldp.org/docs.html#howto>, contains valuable
 250           information about which PCI hardware does work under Linux and which
 251           doesn't.
 252
 253 config SH_PCIDMA_NONCOHERENT
 254         bool "Cache and PCI noncoherent"
 255         depends on PCI
 256         default y
 257         help
 258           Enable this option if your platform does not have a CPU cache which
 259           remains coherent with PCI DMA. It is safest to say 'Y', although you
 260           will see better performance if you can say 'N', because the PCI DMA
 261           code will not have to flush the CPU's caches. If you have a PCI host
 262           bridge integrated with your SH CPU, refer carefully to the chip specs
 263           to see if you can say 'N' here. Otherwise, leave it as 'Y'.
 264
 265 source "drivers/pci/Kconfig"
 266
 267 source "drivers/pcmcia/Kconfig"
 268
 269 source "drivers/pci/hotplug/Kconfig"
 270
 271 endmenu
 272
 273 menu "Executable file formats"
 274
 275 source "fs/Kconfig.binfmt"
 276
 277 endmenu
 278
 279 source "net/Kconfig"
 280
 281 source "drivers/Kconfig"
 282
 283 source "fs/Kconfig"
 284
 285 source "arch/sh64/oprofile/Kconfig"
 286
 287 source "arch/sh64/Kconfig.debug"
 288
 289 source "security/Kconfig"
 290
 291 source "crypto/Kconfig"
 292
 293 source "lib/Kconfig"
 294
 295 #
 296 # Use the generic interrupt handling code in kernel/irq/:
 297 #
 298 config GENERIC_HARDIRQS
 299         bool
 300         default y
 301
 302 config GENERIC_IRQ_PROBE
 303         bool
 304         default y
 305