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1 /*
2 * include/asm/processor.h
3 *
4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
5 */
6
7 #ifndef __ASM_SPARC64_PROCESSOR_H
8 #define __ASM_SPARC64_PROCESSOR_H
9
10 /*
11 * Sparc64 implementation of macro that returns current
12 * instruction pointer ("program counter").
13 */
14 #define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; })
15
16 #include <asm/asi.h>
17 #include <asm/pstate.h>
18 #include <asm/ptrace.h>
19 #include <asm/page.h>
20
21 /*
22 * User lives in his very own context, and cannot reference us. Note
23 * that TASK_SIZE is a misnomer, it really gives maximum user virtual
24 * address that the kernel will allocate out.
25 *
26 * XXX No longer using virtual page tables, kill this upper limit...
27 */
28 #define VA_BITS 44
29 #ifndef __ASSEMBLY__
30 #define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3))
31 #else
32 #define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3))
33 #endif
34
35 #define TASK_SIZE_OF(tsk) \
36 (test_tsk_thread_flag(tsk,TIF_32BIT) ? \
37 (1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
38 #define TASK_SIZE \
39 (test_thread_flag(TIF_32BIT) ? \
40 (1UL << 32UL) : ((unsigned long)-VPTE_SIZE))
41 #ifdef __KERNEL__
42
43 #define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE)
44 #define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL))
45
46 #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
47 STACK_TOP32 : STACK_TOP64)
48
49 #define STACK_TOP_MAX STACK_TOP64
50
51 #endif
52
53 #ifndef __ASSEMBLY__
54
55 typedef struct {
56 unsigned char seg;
57 } mm_segment_t;
58
59 /* The Sparc processor specific thread struct. */
60 /* XXX This should die, everything can go into thread_info now. */
61 struct thread_struct {
62 #ifdef CONFIG_DEBUG_SPINLOCK
63 /* How many spinlocks held by this thread.
64 * Used with spin lock debugging to catch tasks
65 * sleeping illegally with locks held.
66 */
67 int smp_lock_count;
68 unsigned int smp_lock_pc;
69 #else
70 int dummy; /* f'in gcc bug... */
71 #endif
72 };
73
74 #endif /* !(__ASSEMBLY__) */
75
76 #ifndef CONFIG_DEBUG_SPINLOCK
77 #define INIT_THREAD { \
78 0, \
79 }
80 #else /* CONFIG_DEBUG_SPINLOCK */
81 #define INIT_THREAD { \
82 /* smp_lock_count, smp_lock_pc, */ \
83 0, 0, \
84 }
85 #endif /* !(CONFIG_DEBUG_SPINLOCK) */
86
87 #ifndef __ASSEMBLY__
88
89 #include <linux/types.h>
90 #include <asm/fpumacro.h>
91
92 struct task_struct;
93
94 /* On Uniprocessor, even in RMO processes see TSO semantics */
95 #ifdef CONFIG_SMP
96 #define TSTATE_INITIAL_MM TSTATE_TSO
97 #else
98 #define TSTATE_INITIAL_MM TSTATE_RMO
99 #endif
100
101 /* Do necessary setup to start up a newly executed thread. */
102 #define start_thread(regs, pc, sp) \
103 do { \
104 unsigned long __asi = ASI_PNF; \
105 regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \
106 regs->tpc = ((pc & (~3)) - 4); \
107 regs->tnpc = regs->tpc + 4; \
108 regs->y = 0; \
109 set_thread_wstate(1 << 3); \
110 if (current_thread_info()->utraps) { \
111 if (*(current_thread_info()->utraps) < 2) \
112 kfree(current_thread_info()->utraps); \
113 else \
114 (*(current_thread_info()->utraps))--; \
115 current_thread_info()->utraps = NULL; \
116 } \
117 __asm__ __volatile__( \
118 "stx %%g0, [%0 + %2 + 0x00]\n\t" \
119 "stx %%g0, [%0 + %2 + 0x08]\n\t" \
120 "stx %%g0, [%0 + %2 + 0x10]\n\t" \
121 "stx %%g0, [%0 + %2 + 0x18]\n\t" \
122 "stx %%g0, [%0 + %2 + 0x20]\n\t" \
123 "stx %%g0, [%0 + %2 + 0x28]\n\t" \
124 "stx %%g0, [%0 + %2 + 0x30]\n\t" \
125 "stx %%g0, [%0 + %2 + 0x38]\n\t" \
126 "stx %%g0, [%0 + %2 + 0x40]\n\t" \
127 "stx %%g0, [%0 + %2 + 0x48]\n\t" \
128 "stx %%g0, [%0 + %2 + 0x50]\n\t" \
129 "stx %%g0, [%0 + %2 + 0x58]\n\t" \
130 "stx %%g0, [%0 + %2 + 0x60]\n\t" \
131 "stx %%g0, [%0 + %2 + 0x68]\n\t" \
132 "stx %1, [%0 + %2 + 0x70]\n\t" \
133 "stx %%g0, [%0 + %2 + 0x78]\n\t" \
134 "wrpr %%g0, (1 << 3), %%wstate\n\t" \
135 : \
136 : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \
137 "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
138 fprs_write(0); \
139 current_thread_info()->xfsr[0] = 0; \
140 current_thread_info()->fpsaved[0] = 0; \
141 regs->tstate &= ~TSTATE_PEF; \
142 } while (0)
143
144 #define start_thread32(regs, pc, sp) \
145 do { \
146 unsigned long __asi = ASI_PNF; \
147 pc &= 0x00000000ffffffffUL; \
148 sp &= 0x00000000ffffffffUL; \
149 regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \
150 regs->tpc = ((pc & (~3)) - 4); \
151 regs->tnpc = regs->tpc + 4; \
152 regs->y = 0; \
153 set_thread_wstate(2 << 3); \
154 if (current_thread_info()->utraps) { \
155 if (*(current_thread_info()->utraps) < 2) \
156 kfree(current_thread_info()->utraps); \
157 else \
158 (*(current_thread_info()->utraps))--; \
159 current_thread_info()->utraps = NULL; \
160 } \
161 __asm__ __volatile__( \
162 "stx %%g0, [%0 + %2 + 0x00]\n\t" \
163 "stx %%g0, [%0 + %2 + 0x08]\n\t" \
164 "stx %%g0, [%0 + %2 + 0x10]\n\t" \
165 "stx %%g0, [%0 + %2 + 0x18]\n\t" \
166 "stx %%g0, [%0 + %2 + 0x20]\n\t" \
167 "stx %%g0, [%0 + %2 + 0x28]\n\t" \
168 "stx %%g0, [%0 + %2 + 0x30]\n\t" \
169 "stx %%g0, [%0 + %2 + 0x38]\n\t" \
170 "stx %%g0, [%0 + %2 + 0x40]\n\t" \
171 "stx %%g0, [%0 + %2 + 0x48]\n\t" \
172 "stx %%g0, [%0 + %2 + 0x50]\n\t" \
173 "stx %%g0, [%0 + %2 + 0x58]\n\t" \
174 "stx %%g0, [%0 + %2 + 0x60]\n\t" \
175 "stx %%g0, [%0 + %2 + 0x68]\n\t" \
176 "stx %1, [%0 + %2 + 0x70]\n\t" \
177 "stx %%g0, [%0 + %2 + 0x78]\n\t" \
178 "wrpr %%g0, (2 << 3), %%wstate\n\t" \
179 : \
180 : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \
181 "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \
182 fprs_write(0); \
183 current_thread_info()->xfsr[0] = 0; \
184 current_thread_info()->fpsaved[0] = 0; \
185 regs->tstate &= ~TSTATE_PEF; \
186 } while (0)
187
188 /* Free all resources held by a thread. */
189 #define release_thread(tsk) do { } while (0)
190
191 unsigned long get_wchan(struct task_struct *task);
192
193 #define task_pt_regs(tsk) (task_thread_info(tsk)->kregs)
194 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc)
195 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP])
196
197 /* Please see the commentary in asm/backoff.h for a description of
198 * what these instructions are doing and how they have been chosen.
199 * To make a long story short, we are trying to yield the current cpu
200 * strand during busy loops.
201 */
202 #define cpu_relax() asm volatile("\n99:\n\t" \
203 "rd %%ccr, %%g0\n\t" \
204 "rd %%ccr, %%g0\n\t" \
205 "rd %%ccr, %%g0\n\t" \
206 ".section .pause_3insn_patch,\"ax\"\n\t"\
207 ".word 99b\n\t" \
208 "wr %%g0, 128, %%asr27\n\t" \
209 "nop\n\t" \
210 "nop\n\t" \
211 ".previous" \
212 ::: "memory")
213
214 /* Prefetch support. This is tuned for UltraSPARC-III and later.
215 * UltraSPARC-I will treat these as nops, and UltraSPARC-II has
216 * a shallower prefetch queue than later chips.
217 */
218 #define ARCH_HAS_PREFETCH
219 #define ARCH_HAS_PREFETCHW
220 #define ARCH_HAS_SPINLOCK_PREFETCH
221
222 static inline void prefetch(const void *x)
223 {
224 /* We do not use the read prefetch mnemonic because that
225 * prefetches into the prefetch-cache which only is accessible
226 * by floating point operations in UltraSPARC-III and later.
227 * By contrast, "#one_write" prefetches into the L2 cache
228 * in shared state.
229 */
230 __asm__ __volatile__("prefetch [%0], #one_write"
231 : /* no outputs */
232 : "r" (x));
233 }
234
235 static inline void prefetchw(const void *x)
236 {
237 /* The most optimal prefetch to use for writes is
238 * "#n_writes". This brings the cacheline into the
239 * L2 cache in "owned" state.
240 */
241 __asm__ __volatile__("prefetch [%0], #n_writes"
242 : /* no outputs */
243 : "r" (x));
244 }
245
246 #define spin_lock_prefetch(x) prefetchw(x)
247
248 #define HAVE_ARCH_PICK_MMAP_LAYOUT
249
250 int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap);
251
252 #endif /* !(__ASSEMBLY__) */
253
254 #endif /* !(__ASM_SPARC64_PROCESSOR_H) */