arch/tile/include/asm/pgtable_32.h

   1 /*
   2  * Copyright 2010 Tilera Corporation. All Rights Reserved.
   3  *
   4  *   This program is free software; you can redistribute it and/or
   5  *   modify it under the terms of the GNU General Public License
   6  *   as published by the Free Software Foundation, version 2.
   7  *
   8  *   This program is distributed in the hope that it will be useful, but
   9  *   WITHOUT ANY WARRANTY; without even the implied warranty of
  10  *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11  *   NON INFRINGEMENT.  See the GNU General Public License for
  12  *   more details.
  13  *
  14  */
  15
  16 #ifndef _ASM_TILE_PGTABLE_32_H
  17 #define _ASM_TILE_PGTABLE_32_H
  18
  19 /*
  20  * The level-1 index is defined by the huge page size.  A PGD is composed
  21  * of PTRS_PER_PGD pgd_t's and is the top level of the page table.
  22  */
  23 #define PGDIR_SHIFT     HPAGE_SHIFT
  24 #define PGDIR_SIZE      HPAGE_SIZE
  25 #define PGDIR_MASK      (~(PGDIR_SIZE-1))
  26 #define PTRS_PER_PGD    _HV_L1_ENTRIES(HPAGE_SHIFT)
  27 #define PGD_INDEX(va)   _HV_L1_INDEX(va, HPAGE_SHIFT)
  28 #define SIZEOF_PGD      _HV_L1_SIZE(HPAGE_SHIFT)
  29
  30 /*
  31  * The level-2 index is defined by the difference between the huge
  32  * page size and the normal page size.  A PTE is composed of
  33  * PTRS_PER_PTE pte_t's and is the bottom level of the page table.
  34  * Note that the hypervisor docs use PTE for what we call pte_t, so
  35  * this nomenclature is somewhat confusing.
  36  */
  37 #define PTRS_PER_PTE    _HV_L2_ENTRIES(HPAGE_SHIFT, PAGE_SHIFT)
  38 #define PTE_INDEX(va)   _HV_L2_INDEX(va, HPAGE_SHIFT, PAGE_SHIFT)
  39 #define SIZEOF_PTE      _HV_L2_SIZE(HPAGE_SHIFT, PAGE_SHIFT)
  40
  41 #ifndef __ASSEMBLY__
  42
  43 /*
  44  * Right now we initialize only a single pte table. It can be extended
  45  * easily, subsequent pte tables have to be allocated in one physical
  46  * chunk of RAM.
  47  *
  48  * HOWEVER, if we are using an allocation scheme with slop after the
  49  * end of the page table (e.g. where our L2 page tables are 2KB but
  50  * our pages are 64KB and we are allocating via the page allocator)
  51  * we can't extend it easily.
  52  */
  53 #define LAST_PKMAP PTRS_PER_PTE
  54
  55 #define PKMAP_BASE   ((FIXADDR_BOOT_START - PAGE_SIZE*LAST_PKMAP) & PGDIR_MASK)
  56
  57 #ifdef CONFIG_HIGHMEM
  58 # define _VMALLOC_END   (PKMAP_BASE & ~(HPAGE_SIZE-1))
  59 #else
  60 # define _VMALLOC_END   (FIXADDR_START & ~(HPAGE_SIZE-1))
  61 #endif
  62
  63 /*
  64  * Align the vmalloc area to an L2 page table, and leave a guard page
  65  * at the beginning and end.  The vmalloc code also puts in an internal
  66  * guard page between each allocation.
  67  */
  68 #define VMALLOC_END     (_VMALLOC_END - PAGE_SIZE)
  69 extern unsigned long VMALLOC_RESERVE /* = CONFIG_VMALLOC_RESERVE */;
  70 #define _VMALLOC_START  (_VMALLOC_END - VMALLOC_RESERVE)
  71 #define VMALLOC_START   (_VMALLOC_START + PAGE_SIZE)
  72
  73 /* This is the maximum possible amount of lowmem. */
  74 #define MAXMEM          (_VMALLOC_START - PAGE_OFFSET)
  75
  76 /* We have no pmd or pud since we are strictly a two-level page table */
  77 #define __ARCH_USE_5LEVEL_HACK
  78 #include <asm-generic/pgtable-nopmd.h>
  79
  80 static inline int pud_huge_page(pud_t pud)      { return 0; }
  81
  82 /* We don't define any pgds for these addresses. */
  83 static inline int pgd_addr_invalid(unsigned long addr)
  84 {
  85         return addr >= MEM_HV_START;
  86 }
  87
  88 /*
  89  * Provide versions of these routines that can be used safely when
  90  * the hypervisor may be asynchronously modifying dirty/accessed bits.
  91  * ptep_get_and_clear() matches the generic one but we provide it to
  92  * be parallel with the 64-bit code.
  93  */
  94 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
  95 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
  96
  97 extern int ptep_test_and_clear_young(struct vm_area_struct *,
  98                                      unsigned long addr, pte_t *);
  99 extern void ptep_set_wrprotect(struct mm_struct *,
 100                                unsigned long addr, pte_t *);
 101
 102 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
 103 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
 104                                        unsigned long addr, pte_t *ptep)
 105 {
 106         pte_t pte = *ptep;
 107         pte_clear(_mm, addr, ptep);
 108         return pte;
 109 }
 110
 111 /*
 112  * pmds are wrappers around pgds, which are the same as ptes.
 113  * It's often convenient to "cast" back and forth and use the pte methods,
 114  * which are the methods supplied by the hypervisor.
 115  */
 116 #define pmd_pte(pmd) ((pmd).pud.pgd)
 117 #define pmdp_ptep(pmdp) (&(pmdp)->pud.pgd)
 118 #define pte_pmd(pte) ((pmd_t){ { (pte) } })
 119
 120 #endif /* __ASSEMBLY__ */
 121
 122 #endif /* _ASM_TILE_PGTABLE_32_H */