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1 /*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 */
14
15 #include <linux/sched.h>
16 #include <linux/sched/debug.h>
17 #include <linux/preempt.h>
18 #include <linux/module.h>
19 #include <linux/fs.h>
20 #include <linux/kprobes.h>
21 #include <linux/elfcore.h>
22 #include <linux/tick.h>
23 #include <linux/init.h>
24 #include <linux/mm.h>
25 #include <linux/compat.h>
26 #include <linux/nmi.h>
27 #include <linux/syscalls.h>
28 #include <linux/kernel.h>
29 #include <linux/tracehook.h>
30 #include <linux/signal.h>
31 #include <linux/delay.h>
32 #include <linux/context_tracking.h>
33 #include <asm/stack.h>
34 #include <asm/switch_to.h>
35 #include <asm/homecache.h>
36 #include <asm/syscalls.h>
37 #include <asm/traps.h>
38 #include <asm/setup.h>
39 #include <linux/uaccess.h>
40 #ifdef CONFIG_HARDWALL
41 #include <asm/hardwall.h>
42 #endif
43 #include <arch/chip.h>
44 #include <arch/abi.h>
45 #include <arch/sim_def.h>
46
47 /*
48 * Use the (x86) "idle=poll" option to prefer low latency when leaving the
49 * idle loop over low power while in the idle loop, e.g. if we have
50 * one thread per core and we want to get threads out of futex waits fast.
51 */
52 static int __init idle_setup(char *str)
53 {
54 if (!str)
55 return -EINVAL;
56
57 if (!strcmp(str, "poll")) {
58 pr_info("using polling idle threads\n");
59 cpu_idle_poll_ctrl(true);
60 return 0;
61 } else if (!strcmp(str, "halt")) {
62 return 0;
63 }
64 return -1;
65 }
66 early_param("idle", idle_setup);
67
68 void arch_cpu_idle(void)
69 {
70 __this_cpu_write(irq_stat.idle_timestamp, jiffies);
71 _cpu_idle();
72 }
73
74 /*
75 * Release a thread_info structure
76 */
77 void arch_release_thread_stack(unsigned long *stack)
78 {
79 struct thread_info *info = (void *)stack;
80 struct single_step_state *step_state = info->step_state;
81
82 if (step_state) {
83
84 /*
85 * FIXME: we don't munmap step_state->buffer
86 * because the mm_struct for this process (info->task->mm)
87 * has already been zeroed in exit_mm(). Keeping a
88 * reference to it here seems like a bad move, so this
89 * means we can't munmap() the buffer, and therefore if we
90 * ptrace multiple threads in a process, we will slowly
91 * leak user memory. (Note that as soon as the last
92 * thread in a process dies, we will reclaim all user
93 * memory including single-step buffers in the usual way.)
94 * We should either assign a kernel VA to this buffer
95 * somehow, or we should associate the buffer(s) with the
96 * mm itself so we can clean them up that way.
97 */
98 kfree(step_state);
99 }
100 }
101
102 static void save_arch_state(struct thread_struct *t);
103
104 int copy_thread(unsigned long clone_flags, unsigned long sp,
105 unsigned long arg, struct task_struct *p)
106 {
107 struct pt_regs *childregs = task_pt_regs(p);
108 unsigned long ksp;
109 unsigned long *callee_regs;
110
111 /*
112 * Set up the stack and stack pointer appropriately for the
113 * new child to find itself woken up in __switch_to().
114 * The callee-saved registers must be on the stack to be read;
115 * the new task will then jump to assembly support to handle
116 * calling schedule_tail(), etc., and (for userspace tasks)
117 * returning to the context set up in the pt_regs.
118 */
119 ksp = (unsigned long) childregs;
120 ksp -= C_ABI_SAVE_AREA_SIZE; /* interrupt-entry save area */
121 ((long *)ksp)[0] = ((long *)ksp)[1] = 0;
122 ksp -= CALLEE_SAVED_REGS_COUNT * sizeof(unsigned long);
123 callee_regs = (unsigned long *)ksp;
124 ksp -= C_ABI_SAVE_AREA_SIZE; /* __switch_to() save area */
125 ((long *)ksp)[0] = ((long *)ksp)[1] = 0;
126 p->thread.ksp = ksp;
127
128 /* Record the pid of the task that created this one. */
129 p->thread.creator_pid = current->pid;
130
131 if (unlikely(p->flags & PF_KTHREAD)) {
132 /* kernel thread */
133 memset(childregs, 0, sizeof(struct pt_regs));
134 memset(&callee_regs[2], 0,
135 (CALLEE_SAVED_REGS_COUNT - 2) * sizeof(unsigned long));
136 callee_regs[0] = sp; /* r30 = function */
137 callee_regs[1] = arg; /* r31 = arg */
138 p->thread.pc = (unsigned long) ret_from_kernel_thread;
139 return 0;
140 }
141
142 /*
143 * Start new thread in ret_from_fork so it schedules properly
144 * and then return from interrupt like the parent.
145 */
146 p->thread.pc = (unsigned long) ret_from_fork;
147
148 /*
149 * Do not clone step state from the parent; each thread
150 * must make its own lazily.
151 */
152 task_thread_info(p)->step_state = NULL;
153
154 #ifdef __tilegx__
155 /*
156 * Do not clone unalign jit fixup from the parent; each thread
157 * must allocate its own on demand.
158 */
159 task_thread_info(p)->unalign_jit_base = NULL;
160 #endif
161
162 /*
163 * Copy the registers onto the kernel stack so the
164 * return-from-interrupt code will reload it into registers.
165 */
166 *childregs = *current_pt_regs();
167 childregs->regs[0] = 0; /* return value is zero */
168 if (sp)
169 childregs->sp = sp; /* override with new user stack pointer */
170 memcpy(callee_regs, &childregs->regs[CALLEE_SAVED_FIRST_REG],
171 CALLEE_SAVED_REGS_COUNT * sizeof(unsigned long));
172
173 /* Save user stack top pointer so we can ID the stack vm area later. */
174 p->thread.usp0 = childregs->sp;
175
176 /*
177 * If CLONE_SETTLS is set, set "tp" in the new task to "r4",
178 * which is passed in as arg #5 to sys_clone().
179 */
180 if (clone_flags & CLONE_SETTLS)
181 childregs->tp = childregs->regs[4];
182
183
184 #if CHIP_HAS_TILE_DMA()
185 /*
186 * No DMA in the new thread. We model this on the fact that
187 * fork() clears the pending signals, alarms, and aio for the child.
188 */
189 memset(&p->thread.tile_dma_state, 0, sizeof(struct tile_dma_state));
190 memset(&p->thread.dma_async_tlb, 0, sizeof(struct async_tlb));
191 #endif
192
193 /* New thread has its miscellaneous processor state bits clear. */
194 p->thread.proc_status = 0;
195
196 #ifdef CONFIG_HARDWALL
197 /* New thread does not own any networks. */
198 memset(&p->thread.hardwall[0], 0,
199 sizeof(struct hardwall_task) * HARDWALL_TYPES);
200 #endif
201
202
203 /*
204 * Start the new thread with the current architecture state
205 * (user interrupt masks, etc.).
206 */
207 save_arch_state(&p->thread);
208
209 return 0;
210 }
211
212 int set_unalign_ctl(struct task_struct *tsk, unsigned int val)
213 {
214 task_thread_info(tsk)->align_ctl = val;
215 return 0;
216 }
217
218 int get_unalign_ctl(struct task_struct *tsk, unsigned long adr)
219 {
220 return put_user(task_thread_info(tsk)->align_ctl,
221 (unsigned int __user *)adr);
222 }
223
224 static struct task_struct corrupt_current = { .comm = "<corrupt>" };
225
226 /*
227 * Return "current" if it looks plausible, or else a pointer to a dummy.
228 * This can be helpful if we are just trying to emit a clean panic.
229 */
230 struct task_struct *validate_current(void)
231 {
232 struct task_struct *tsk = current;
233 if (unlikely((unsigned long)tsk < PAGE_OFFSET ||
234 (high_memory && (void *)tsk > high_memory) ||
235 ((unsigned long)tsk & (__alignof__(*tsk) - 1)) != 0)) {
236 pr_err("Corrupt 'current' %p (sp %#lx)\n", tsk, stack_pointer);
237 tsk = &corrupt_current;
238 }
239 return tsk;
240 }
241
242 /* Take and return the pointer to the previous task, for schedule_tail(). */
243 struct task_struct *sim_notify_fork(struct task_struct *prev)
244 {
245 struct task_struct *tsk = current;
246 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_FORK_PARENT |
247 (tsk->thread.creator_pid << _SIM_CONTROL_OPERATOR_BITS));
248 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_FORK |
249 (tsk->pid << _SIM_CONTROL_OPERATOR_BITS));
250 return prev;
251 }
252
253 int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
254 {
255 struct pt_regs *ptregs = task_pt_regs(tsk);
256 elf_core_copy_regs(regs, ptregs);
257 return 1;
258 }
259
260 #if CHIP_HAS_TILE_DMA()
261
262 /* Allow user processes to access the DMA SPRs */
263 void grant_dma_mpls(void)
264 {
265 #if CONFIG_KERNEL_PL == 2
266 __insn_mtspr(SPR_MPL_DMA_CPL_SET_1, 1);
267 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_1, 1);
268 #else
269 __insn_mtspr(SPR_MPL_DMA_CPL_SET_0, 1);
270 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_0, 1);
271 #endif
272 }
273
274 /* Forbid user processes from accessing the DMA SPRs */
275 void restrict_dma_mpls(void)
276 {
277 #if CONFIG_KERNEL_PL == 2
278 __insn_mtspr(SPR_MPL_DMA_CPL_SET_2, 1);
279 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_2, 1);
280 #else
281 __insn_mtspr(SPR_MPL_DMA_CPL_SET_1, 1);
282 __insn_mtspr(SPR_MPL_DMA_NOTIFY_SET_1, 1);
283 #endif
284 }
285
286 /* Pause the DMA engine, then save off its state registers. */
287 static void save_tile_dma_state(struct tile_dma_state *dma)
288 {
289 unsigned long state = __insn_mfspr(SPR_DMA_USER_STATUS);
290 unsigned long post_suspend_state;
291
292 /* If we're running, suspend the engine. */
293 if ((state & DMA_STATUS_MASK) == SPR_DMA_STATUS__RUNNING_MASK)
294 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__SUSPEND_MASK);
295
296 /*
297 * Wait for the engine to idle, then save regs. Note that we
298 * want to record the "running" bit from before suspension,
299 * and the "done" bit from after, so that we can properly
300 * distinguish a case where the user suspended the engine from
301 * the case where the kernel suspended as part of the context
302 * swap.
303 */
304 do {
305 post_suspend_state = __insn_mfspr(SPR_DMA_USER_STATUS);
306 } while (post_suspend_state & SPR_DMA_STATUS__BUSY_MASK);
307
308 dma->src = __insn_mfspr(SPR_DMA_SRC_ADDR);
309 dma->src_chunk = __insn_mfspr(SPR_DMA_SRC_CHUNK_ADDR);
310 dma->dest = __insn_mfspr(SPR_DMA_DST_ADDR);
311 dma->dest_chunk = __insn_mfspr(SPR_DMA_DST_CHUNK_ADDR);
312 dma->strides = __insn_mfspr(SPR_DMA_STRIDE);
313 dma->chunk_size = __insn_mfspr(SPR_DMA_CHUNK_SIZE);
314 dma->byte = __insn_mfspr(SPR_DMA_BYTE);
315 dma->status = (state & SPR_DMA_STATUS__RUNNING_MASK) |
316 (post_suspend_state & SPR_DMA_STATUS__DONE_MASK);
317 }
318
319 /* Restart a DMA that was running before we were context-switched out. */
320 static void restore_tile_dma_state(struct thread_struct *t)
321 {
322 const struct tile_dma_state *dma = &t->tile_dma_state;
323
324 /*
325 * The only way to restore the done bit is to run a zero
326 * length transaction.
327 */
328 if ((dma->status & SPR_DMA_STATUS__DONE_MASK) &&
329 !(__insn_mfspr(SPR_DMA_USER_STATUS) & SPR_DMA_STATUS__DONE_MASK)) {
330 __insn_mtspr(SPR_DMA_BYTE, 0);
331 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__REQUEST_MASK);
332 while (__insn_mfspr(SPR_DMA_USER_STATUS) &
333 SPR_DMA_STATUS__BUSY_MASK)
334 ;
335 }
336
337 __insn_mtspr(SPR_DMA_SRC_ADDR, dma->src);
338 __insn_mtspr(SPR_DMA_SRC_CHUNK_ADDR, dma->src_chunk);
339 __insn_mtspr(SPR_DMA_DST_ADDR, dma->dest);
340 __insn_mtspr(SPR_DMA_DST_CHUNK_ADDR, dma->dest_chunk);
341 __insn_mtspr(SPR_DMA_STRIDE, dma->strides);
342 __insn_mtspr(SPR_DMA_CHUNK_SIZE, dma->chunk_size);
343 __insn_mtspr(SPR_DMA_BYTE, dma->byte);
344
345 /*
346 * Restart the engine if we were running and not done.
347 * Clear a pending async DMA fault that we were waiting on return
348 * to user space to execute, since we expect the DMA engine
349 * to regenerate those faults for us now. Note that we don't
350 * try to clear the TIF_ASYNC_TLB flag, since it's relatively
351 * harmless if set, and it covers both DMA and the SN processor.
352 */
353 if ((dma->status & DMA_STATUS_MASK) == SPR_DMA_STATUS__RUNNING_MASK) {
354 t->dma_async_tlb.fault_num = 0;
355 __insn_mtspr(SPR_DMA_CTR, SPR_DMA_CTR__REQUEST_MASK);
356 }
357 }
358
359 #endif
360
361 static void save_arch_state(struct thread_struct *t)
362 {
363 #if CHIP_HAS_SPLIT_INTR_MASK()
364 t->interrupt_mask = __insn_mfspr(SPR_INTERRUPT_MASK_0_0) |
365 ((u64)__insn_mfspr(SPR_INTERRUPT_MASK_0_1) << 32);
366 #else
367 t->interrupt_mask = __insn_mfspr(SPR_INTERRUPT_MASK_0);
368 #endif
369 t->ex_context[0] = __insn_mfspr(SPR_EX_CONTEXT_0_0);
370 t->ex_context[1] = __insn_mfspr(SPR_EX_CONTEXT_0_1);
371 t->system_save[0] = __insn_mfspr(SPR_SYSTEM_SAVE_0_0);
372 t->system_save[1] = __insn_mfspr(SPR_SYSTEM_SAVE_0_1);
373 t->system_save[2] = __insn_mfspr(SPR_SYSTEM_SAVE_0_2);
374 t->system_save[3] = __insn_mfspr(SPR_SYSTEM_SAVE_0_3);
375 t->intctrl_0 = __insn_mfspr(SPR_INTCTRL_0_STATUS);
376 t->proc_status = __insn_mfspr(SPR_PROC_STATUS);
377 #if !CHIP_HAS_FIXED_INTVEC_BASE()
378 t->interrupt_vector_base = __insn_mfspr(SPR_INTERRUPT_VECTOR_BASE_0);
379 #endif
380 t->tile_rtf_hwm = __insn_mfspr(SPR_TILE_RTF_HWM);
381 #if CHIP_HAS_DSTREAM_PF()
382 t->dstream_pf = __insn_mfspr(SPR_DSTREAM_PF);
383 #endif
384 }
385
386 static void restore_arch_state(const struct thread_struct *t)
387 {
388 #if CHIP_HAS_SPLIT_INTR_MASK()
389 __insn_mtspr(SPR_INTERRUPT_MASK_0_0, (u32) t->interrupt_mask);
390 __insn_mtspr(SPR_INTERRUPT_MASK_0_1, t->interrupt_mask >> 32);
391 #else
392 __insn_mtspr(SPR_INTERRUPT_MASK_0, t->interrupt_mask);
393 #endif
394 __insn_mtspr(SPR_EX_CONTEXT_0_0, t->ex_context[0]);
395 __insn_mtspr(SPR_EX_CONTEXT_0_1, t->ex_context[1]);
396 __insn_mtspr(SPR_SYSTEM_SAVE_0_0, t->system_save[0]);
397 __insn_mtspr(SPR_SYSTEM_SAVE_0_1, t->system_save[1]);
398 __insn_mtspr(SPR_SYSTEM_SAVE_0_2, t->system_save[2]);
399 __insn_mtspr(SPR_SYSTEM_SAVE_0_3, t->system_save[3]);
400 __insn_mtspr(SPR_INTCTRL_0_STATUS, t->intctrl_0);
401 __insn_mtspr(SPR_PROC_STATUS, t->proc_status);
402 #if !CHIP_HAS_FIXED_INTVEC_BASE()
403 __insn_mtspr(SPR_INTERRUPT_VECTOR_BASE_0, t->interrupt_vector_base);
404 #endif
405 __insn_mtspr(SPR_TILE_RTF_HWM, t->tile_rtf_hwm);
406 #if CHIP_HAS_DSTREAM_PF()
407 __insn_mtspr(SPR_DSTREAM_PF, t->dstream_pf);
408 #endif
409 }
410
411
412 void _prepare_arch_switch(struct task_struct *next)
413 {
414 #if CHIP_HAS_TILE_DMA()
415 struct tile_dma_state *dma = &current->thread.tile_dma_state;
416 if (dma->enabled)
417 save_tile_dma_state(dma);
418 #endif
419 }
420
421
422 struct task_struct *__sched _switch_to(struct task_struct *prev,
423 struct task_struct *next)
424 {
425 /* DMA state is already saved; save off other arch state. */
426 save_arch_state(&prev->thread);
427
428 #if CHIP_HAS_TILE_DMA()
429 /*
430 * Restore DMA in new task if desired.
431 * Note that it is only safe to restart here since interrupts
432 * are disabled, so we can't take any DMATLB miss or access
433 * interrupts before we have finished switching stacks.
434 */
435 if (next->thread.tile_dma_state.enabled) {
436 restore_tile_dma_state(&next->thread);
437 grant_dma_mpls();
438 } else {
439 restrict_dma_mpls();
440 }
441 #endif
442
443 /* Restore other arch state. */
444 restore_arch_state(&next->thread);
445
446 #ifdef CONFIG_HARDWALL
447 /* Enable or disable access to the network registers appropriately. */
448 hardwall_switch_tasks(prev, next);
449 #endif
450
451 /* Notify the simulator of task exit. */
452 if (unlikely(prev->state == TASK_DEAD))
453 __insn_mtspr(SPR_SIM_CONTROL, SIM_CONTROL_OS_EXIT |
454 (prev->pid << _SIM_CONTROL_OPERATOR_BITS));
455
456 /*
457 * Switch kernel SP, PC, and callee-saved registers.
458 * In the context of the new task, return the old task pointer
459 * (i.e. the task that actually called __switch_to).
460 * Pass the value to use for SYSTEM_SAVE_K_0 when we reset our sp.
461 */
462 return __switch_to(prev, next, next_current_ksp0(next));
463 }
464
465 /*
466 * This routine is called on return from interrupt if any of the
467 * TIF_ALLWORK_MASK flags are set in thread_info->flags. It is
468 * entered with interrupts disabled so we don't miss an event that
469 * modified the thread_info flags. We loop until all the tested flags
470 * are clear. Note that the function is called on certain conditions
471 * that are not listed in the loop condition here (e.g. SINGLESTEP)
472 * which guarantees we will do those things once, and redo them if any
473 * of the other work items is re-done, but won't continue looping if
474 * all the other work is done.
475 */
476 void prepare_exit_to_usermode(struct pt_regs *regs, u32 thread_info_flags)
477 {
478 if (WARN_ON(!user_mode(regs)))
479 return;
480
481 do {
482 local_irq_enable();
483
484 if (thread_info_flags & _TIF_NEED_RESCHED)
485 schedule();
486
487 #if CHIP_HAS_TILE_DMA()
488 if (thread_info_flags & _TIF_ASYNC_TLB)
489 do_async_page_fault(regs);
490 #endif
491
492 if (thread_info_flags & _TIF_SIGPENDING)
493 do_signal(regs);
494
495 if (thread_info_flags & _TIF_NOTIFY_RESUME) {
496 clear_thread_flag(TIF_NOTIFY_RESUME);
497 tracehook_notify_resume(regs);
498 }
499
500 local_irq_disable();
501 thread_info_flags = READ_ONCE(current_thread_info()->flags);
502
503 } while (thread_info_flags & _TIF_WORK_MASK);
504
505 if (thread_info_flags & _TIF_SINGLESTEP) {
506 single_step_once(regs);
507 #ifndef __tilegx__
508 /*
509 * FIXME: on tilepro, since we enable interrupts in
510 * this routine, it's possible that we miss a signal
511 * or other asynchronous event.
512 */
513 local_irq_disable();
514 #endif
515 }
516
517 user_enter();
518 }
519
520 unsigned long get_wchan(struct task_struct *p)
521 {
522 struct KBacktraceIterator kbt;
523
524 if (!p || p == current || p->state == TASK_RUNNING)
525 return 0;
526
527 for (KBacktraceIterator_init(&kbt, p, NULL);
528 !KBacktraceIterator_end(&kbt);
529 KBacktraceIterator_next(&kbt)) {
530 if (!in_sched_functions(kbt.it.pc))
531 return kbt.it.pc;
532 }
533
534 return 0;
535 }
536
537 /* Flush thread state. */
538 void flush_thread(void)
539 {
540 /* Nothing */
541 }
542
543 /*
544 * Free current thread data structures etc..
545 */
546 void exit_thread(struct task_struct *tsk)
547 {
548 #ifdef CONFIG_HARDWALL
549 /*
550 * Remove the task from the list of tasks that are associated
551 * with any live hardwalls. (If the task that is exiting held
552 * the last reference to a hardwall fd, it would already have
553 * been released and deactivated at this point.)
554 */
555 hardwall_deactivate_all(tsk);
556 #endif
557 }
558
559 void tile_show_regs(struct pt_regs *regs)
560 {
561 int i;
562 #ifdef __tilegx__
563 for (i = 0; i < 17; i++)
564 pr_err(" r%-2d: "REGFMT" r%-2d: "REGFMT" r%-2d: "REGFMT"\n",
565 i, regs->regs[i], i+18, regs->regs[i+18],
566 i+36, regs->regs[i+36]);
567 pr_err(" r17: "REGFMT" r35: "REGFMT" tp : "REGFMT"\n",
568 regs->regs[17], regs->regs[35], regs->tp);
569 pr_err(" sp : "REGFMT" lr : "REGFMT"\n", regs->sp, regs->lr);
570 #else
571 for (i = 0; i < 13; i++)
572 pr_err(" r%-2d: "REGFMT" r%-2d: "REGFMT
573 " r%-2d: "REGFMT" r%-2d: "REGFMT"\n",
574 i, regs->regs[i], i+14, regs->regs[i+14],
575 i+27, regs->regs[i+27], i+40, regs->regs[i+40]);
576 pr_err(" r13: "REGFMT" tp : "REGFMT" sp : "REGFMT" lr : "REGFMT"\n",
577 regs->regs[13], regs->tp, regs->sp, regs->lr);
578 #endif
579 pr_err(" pc : "REGFMT" ex1: %ld faultnum: %ld flags:%s%s%s%s\n",
580 regs->pc, regs->ex1, regs->faultnum,
581 is_compat_task() ? " compat" : "",
582 (regs->flags & PT_FLAGS_DISABLE_IRQ) ? " noirq" : "",
583 !(regs->flags & PT_FLAGS_CALLER_SAVES) ? " nocallersave" : "",
584 (regs->flags & PT_FLAGS_RESTORE_REGS) ? " restoreregs" : "");
585 }
586
587 void show_regs(struct pt_regs *regs)
588 {
589 struct KBacktraceIterator kbt;
590
591 show_regs_print_info(KERN_DEFAULT);
592 tile_show_regs(regs);
593
594 KBacktraceIterator_init(&kbt, NULL, regs);
595 tile_show_stack(&kbt);
596 }
597
598 #ifdef __tilegx__
599 void nmi_raise_cpu_backtrace(struct cpumask *in_mask)
600 {
601 struct cpumask mask;
602 HV_Coord tile;
603 unsigned int timeout;
604 int cpu;
605 HV_NMI_Info info[NR_CPUS];
606
607 /* Tentatively dump stack on remote tiles via NMI. */
608 timeout = 100;
609 cpumask_copy(&mask, in_mask);
610 while (!cpumask_empty(&mask) && timeout) {
611 for_each_cpu(cpu, &mask) {
612 tile.x = cpu_x(cpu);
613 tile.y = cpu_y(cpu);
614 info[cpu] = hv_send_nmi(tile, TILE_NMI_DUMP_STACK, 0);
615 if (info[cpu].result == HV_NMI_RESULT_OK)
616 cpumask_clear_cpu(cpu, &mask);
617 }
618
619 mdelay(10);
620 touch_softlockup_watchdog();
621 timeout--;
622 }
623
624 /* Warn about cpus stuck in ICS. */
625 if (!cpumask_empty(&mask)) {
626 for_each_cpu(cpu, &mask) {
627
628 /* Clear the bit as if nmi_cpu_backtrace() ran. */
629 cpumask_clear_cpu(cpu, in_mask);
630
631 switch (info[cpu].result) {
632 case HV_NMI_RESULT_FAIL_ICS:
633 pr_warn("Skipping stack dump of cpu %d in ICS at pc %#llx\n",
634 cpu, info[cpu].pc);
635 break;
636 case HV_NMI_RESULT_FAIL_HV:
637 pr_warn("Skipping stack dump of cpu %d in hypervisor\n",
638 cpu);
639 break;
640 case HV_ENOSYS:
641 WARN_ONCE(1, "Hypervisor too old to allow remote stack dumps.\n");
642 break;
643 default: /* should not happen */
644 pr_warn("Skipping stack dump of cpu %d [%d,%#llx]\n",
645 cpu, info[cpu].result, info[cpu].pc);
646 break;
647 }
648 }
649 }
650 }
651
652 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
653 {
654 nmi_trigger_cpumask_backtrace(mask, exclude_self,
655 nmi_raise_cpu_backtrace);
656 }
657 #endif /* __tilegx_ */