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1 /*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 */
14
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/mmzone.h>
18 #include <linux/bootmem.h>
19 #include <linux/module.h>
20 #include <linux/node.h>
21 #include <linux/cpu.h>
22 #include <linux/ioport.h>
23 #include <linux/irq.h>
24 #include <linux/kexec.h>
25 #include <linux/pci.h>
26 #include <linux/swiotlb.h>
27 #include <linux/initrd.h>
28 #include <linux/io.h>
29 #include <linux/highmem.h>
30 #include <linux/smp.h>
31 #include <linux/timex.h>
32 #include <linux/hugetlb.h>
33 #include <linux/start_kernel.h>
34 #include <linux/screen_info.h>
35 #include <asm/setup.h>
36 #include <asm/sections.h>
37 #include <asm/cacheflush.h>
38 #include <asm/pgalloc.h>
39 #include <asm/mmu_context.h>
40 #include <hv/hypervisor.h>
41 #include <arch/interrupts.h>
42
43 /* <linux/smp.h> doesn't provide this definition. */
44 #ifndef CONFIG_SMP
45 #define setup_max_cpus 1
46 #endif
47
48 static inline int ABS(int x) { return x >= 0 ? x : -x; }
49
50 /* Chip information */
51 char chip_model[64] __write_once;
52
53 #ifdef CONFIG_VT
54 struct screen_info screen_info;
55 #endif
56
57 struct pglist_data node_data[MAX_NUMNODES] __read_mostly;
58 EXPORT_SYMBOL(node_data);
59
60 /* Information on the NUMA nodes that we compute early */
61 unsigned long node_start_pfn[MAX_NUMNODES];
62 unsigned long node_end_pfn[MAX_NUMNODES];
63 unsigned long __initdata node_memmap_pfn[MAX_NUMNODES];
64 unsigned long __initdata node_percpu_pfn[MAX_NUMNODES];
65 unsigned long __initdata node_free_pfn[MAX_NUMNODES];
66
67 static unsigned long __initdata node_percpu[MAX_NUMNODES];
68
69 /*
70 * per-CPU stack and boot info.
71 */
72 DEFINE_PER_CPU(unsigned long, boot_sp) =
73 (unsigned long)init_stack + THREAD_SIZE;
74
75 #ifdef CONFIG_SMP
76 DEFINE_PER_CPU(unsigned long, boot_pc) = (unsigned long)start_kernel;
77 #else
78 /*
79 * The variable must be __initdata since it references __init code.
80 * With CONFIG_SMP it is per-cpu data, which is exempt from validation.
81 */
82 unsigned long __initdata boot_pc = (unsigned long)start_kernel;
83 #endif
84
85 #ifdef CONFIG_HIGHMEM
86 /* Page frame index of end of lowmem on each controller. */
87 unsigned long node_lowmem_end_pfn[MAX_NUMNODES];
88
89 /* Number of pages that can be mapped into lowmem. */
90 static unsigned long __initdata mappable_physpages;
91 #endif
92
93 /* Data on which physical memory controller corresponds to which NUMA node */
94 int node_controller[MAX_NUMNODES] = { [0 ... MAX_NUMNODES-1] = -1 };
95
96 #ifdef CONFIG_HIGHMEM
97 /* Map information from VAs to PAs */
98 unsigned long pbase_map[1 << (32 - HPAGE_SHIFT)]
99 __write_once __attribute__((aligned(L2_CACHE_BYTES)));
100 EXPORT_SYMBOL(pbase_map);
101
102 /* Map information from PAs to VAs */
103 void *vbase_map[NR_PA_HIGHBIT_VALUES]
104 __write_once __attribute__((aligned(L2_CACHE_BYTES)));
105 EXPORT_SYMBOL(vbase_map);
106 #endif
107
108 /* Node number as a function of the high PA bits */
109 int highbits_to_node[NR_PA_HIGHBIT_VALUES] __write_once;
110 EXPORT_SYMBOL(highbits_to_node);
111
112 static unsigned int __initdata maxmem_pfn = -1U;
113 static unsigned int __initdata maxnodemem_pfn[MAX_NUMNODES] = {
114 [0 ... MAX_NUMNODES-1] = -1U
115 };
116 static nodemask_t __initdata isolnodes;
117
118 #if defined(CONFIG_PCI) && !defined(__tilegx__)
119 enum { DEFAULT_PCI_RESERVE_MB = 64 };
120 static unsigned int __initdata pci_reserve_mb = DEFAULT_PCI_RESERVE_MB;
121 unsigned long __initdata pci_reserve_start_pfn = -1U;
122 unsigned long __initdata pci_reserve_end_pfn = -1U;
123 #endif
124
125 static int __init setup_maxmem(char *str)
126 {
127 unsigned long long maxmem;
128 if (str == NULL || (maxmem = memparse(str, NULL)) == 0)
129 return -EINVAL;
130
131 maxmem_pfn = (maxmem >> HPAGE_SHIFT) << (HPAGE_SHIFT - PAGE_SHIFT);
132 pr_info("Forcing RAM used to no more than %dMB\n",
133 maxmem_pfn >> (20 - PAGE_SHIFT));
134 return 0;
135 }
136 early_param("maxmem", setup_maxmem);
137
138 static int __init setup_maxnodemem(char *str)
139 {
140 char *endp;
141 unsigned long long maxnodemem;
142 long node;
143
144 node = str ? simple_strtoul(str, &endp, 0) : INT_MAX;
145 if (node >= MAX_NUMNODES || *endp != ':')
146 return -EINVAL;
147
148 maxnodemem = memparse(endp+1, NULL);
149 maxnodemem_pfn[node] = (maxnodemem >> HPAGE_SHIFT) <<
150 (HPAGE_SHIFT - PAGE_SHIFT);
151 pr_info("Forcing RAM used on node %ld to no more than %dMB\n",
152 node, maxnodemem_pfn[node] >> (20 - PAGE_SHIFT));
153 return 0;
154 }
155 early_param("maxnodemem", setup_maxnodemem);
156
157 struct memmap_entry {
158 u64 addr; /* start of memory segment */
159 u64 size; /* size of memory segment */
160 };
161 static struct memmap_entry memmap_map[64];
162 static int memmap_nr;
163
164 static void add_memmap_region(u64 addr, u64 size)
165 {
166 if (memmap_nr >= ARRAY_SIZE(memmap_map)) {
167 pr_err("Ooops! Too many entries in the memory map!\n");
168 return;
169 }
170 memmap_map[memmap_nr].addr = addr;
171 memmap_map[memmap_nr].size = size;
172 memmap_nr++;
173 }
174
175 static int __init setup_memmap(char *p)
176 {
177 char *oldp;
178 u64 start_at, mem_size;
179
180 if (!p)
181 return -EINVAL;
182
183 if (!strncmp(p, "exactmap", 8)) {
184 pr_err("\"memmap=exactmap\" not valid on tile\n");
185 return 0;
186 }
187
188 oldp = p;
189 mem_size = memparse(p, &p);
190 if (p == oldp)
191 return -EINVAL;
192
193 if (*p == '@') {
194 pr_err("\"memmap=nn@ss\" (force RAM) invalid on tile\n");
195 } else if (*p == '#') {
196 pr_err("\"memmap=nn#ss\" (force ACPI data) invalid on tile\n");
197 } else if (*p == '$') {
198 start_at = memparse(p+1, &p);
199 add_memmap_region(start_at, mem_size);
200 } else {
201 if (mem_size == 0)
202 return -EINVAL;
203 maxmem_pfn = (mem_size >> HPAGE_SHIFT) <<
204 (HPAGE_SHIFT - PAGE_SHIFT);
205 }
206 return *p == '\0' ? 0 : -EINVAL;
207 }
208 early_param("memmap", setup_memmap);
209
210 static int __init setup_mem(char *str)
211 {
212 return setup_maxmem(str);
213 }
214 early_param("mem", setup_mem); /* compatibility with x86 */
215
216 static int __init setup_isolnodes(char *str)
217 {
218 char buf[MAX_NUMNODES * 5];
219 if (str == NULL || nodelist_parse(str, isolnodes) != 0)
220 return -EINVAL;
221
222 nodelist_scnprintf(buf, sizeof(buf), isolnodes);
223 pr_info("Set isolnodes value to '%s'\n", buf);
224 return 0;
225 }
226 early_param("isolnodes", setup_isolnodes);
227
228 #if defined(CONFIG_PCI) && !defined(__tilegx__)
229 static int __init setup_pci_reserve(char* str)
230 {
231 unsigned long mb;
232
233 if (str == NULL || strict_strtoul(str, 0, &mb) != 0 ||
234 mb > 3 * 1024)
235 return -EINVAL;
236
237 pci_reserve_mb = mb;
238 pr_info("Reserving %dMB for PCIE root complex mappings\n",
239 pci_reserve_mb);
240 return 0;
241 }
242 early_param("pci_reserve", setup_pci_reserve);
243 #endif
244
245 #ifndef __tilegx__
246 /*
247 * vmalloc=size forces the vmalloc area to be exactly 'size' bytes.
248 * This can be used to increase (or decrease) the vmalloc area.
249 */
250 static int __init parse_vmalloc(char *arg)
251 {
252 if (!arg)
253 return -EINVAL;
254
255 VMALLOC_RESERVE = (memparse(arg, &arg) + PGDIR_SIZE - 1) & PGDIR_MASK;
256
257 /* See validate_va() for more on this test. */
258 if ((long)_VMALLOC_START >= 0)
259 early_panic("\"vmalloc=%#lx\" value too large: maximum %#lx\n",
260 VMALLOC_RESERVE, _VMALLOC_END - 0x80000000UL);
261
262 return 0;
263 }
264 early_param("vmalloc", parse_vmalloc);
265 #endif
266
267 #ifdef CONFIG_HIGHMEM
268 /*
269 * Determine for each controller where its lowmem is mapped and how much of
270 * it is mapped there. On controller zero, the first few megabytes are
271 * already mapped in as code at MEM_SV_START, so in principle we could
272 * start our data mappings higher up, but for now we don't bother, to avoid
273 * additional confusion.
274 *
275 * One question is whether, on systems with more than 768 Mb and
276 * controllers of different sizes, to map in a proportionate amount of
277 * each one, or to try to map the same amount from each controller.
278 * (E.g. if we have three controllers with 256MB, 1GB, and 256MB
279 * respectively, do we map 256MB from each, or do we map 128 MB, 512
280 * MB, and 128 MB respectively?) For now we use a proportionate
281 * solution like the latter.
282 *
283 * The VA/PA mapping demands that we align our decisions at 16 MB
284 * boundaries so that we can rapidly convert VA to PA.
285 */
286 static void *__init setup_pa_va_mapping(void)
287 {
288 unsigned long curr_pages = 0;
289 unsigned long vaddr = PAGE_OFFSET;
290 nodemask_t highonlynodes = isolnodes;
291 int i, j;
292
293 memset(pbase_map, -1, sizeof(pbase_map));
294 memset(vbase_map, -1, sizeof(vbase_map));
295
296 /* Node zero cannot be isolated for LOWMEM purposes. */
297 node_clear(0, highonlynodes);
298
299 /* Count up the number of pages on non-highonlynodes controllers. */
300 mappable_physpages = 0;
301 for_each_online_node(i) {
302 if (!node_isset(i, highonlynodes))
303 mappable_physpages +=
304 node_end_pfn[i] - node_start_pfn[i];
305 }
306
307 for_each_online_node(i) {
308 unsigned long start = node_start_pfn[i];
309 unsigned long end = node_end_pfn[i];
310 unsigned long size = end - start;
311 unsigned long vaddr_end;
312
313 if (node_isset(i, highonlynodes)) {
314 /* Mark this controller as having no lowmem. */
315 node_lowmem_end_pfn[i] = start;
316 continue;
317 }
318
319 curr_pages += size;
320 if (mappable_physpages > MAXMEM_PFN) {
321 vaddr_end = PAGE_OFFSET +
322 (((u64)curr_pages * MAXMEM_PFN /
323 mappable_physpages)
324 << PAGE_SHIFT);
325 } else {
326 vaddr_end = PAGE_OFFSET + (curr_pages << PAGE_SHIFT);
327 }
328 for (j = 0; vaddr < vaddr_end; vaddr += HPAGE_SIZE, ++j) {
329 unsigned long this_pfn =
330 start + (j << HUGETLB_PAGE_ORDER);
331 pbase_map[vaddr >> HPAGE_SHIFT] = this_pfn;
332 if (vbase_map[__pfn_to_highbits(this_pfn)] ==
333 (void *)-1)
334 vbase_map[__pfn_to_highbits(this_pfn)] =
335 (void *)(vaddr & HPAGE_MASK);
336 }
337 node_lowmem_end_pfn[i] = start + (j << HUGETLB_PAGE_ORDER);
338 BUG_ON(node_lowmem_end_pfn[i] > end);
339 }
340
341 /* Return highest address of any mapped memory. */
342 return (void *)vaddr;
343 }
344 #endif /* CONFIG_HIGHMEM */
345
346 /*
347 * Register our most important memory mappings with the debug stub.
348 *
349 * This is up to 4 mappings for lowmem, one mapping per memory
350 * controller, plus one for our text segment.
351 */
352 static void store_permanent_mappings(void)
353 {
354 int i;
355
356 for_each_online_node(i) {
357 HV_PhysAddr pa = ((HV_PhysAddr)node_start_pfn[i]) << PAGE_SHIFT;
358 #ifdef CONFIG_HIGHMEM
359 HV_PhysAddr high_mapped_pa = node_lowmem_end_pfn[i];
360 #else
361 HV_PhysAddr high_mapped_pa = node_end_pfn[i];
362 #endif
363
364 unsigned long pages = high_mapped_pa - node_start_pfn[i];
365 HV_VirtAddr addr = (HV_VirtAddr) __va(pa);
366 hv_store_mapping(addr, pages << PAGE_SHIFT, pa);
367 }
368
369 hv_store_mapping((HV_VirtAddr)_text,
370 (uint32_t)(_einittext - _text), 0);
371 }
372
373 /*
374 * Use hv_inquire_physical() to populate node_{start,end}_pfn[]
375 * and node_online_map, doing suitable sanity-checking.
376 * Also set min_low_pfn, max_low_pfn, and max_pfn.
377 */
378 static void __init setup_memory(void)
379 {
380 int i, j;
381 int highbits_seen[NR_PA_HIGHBIT_VALUES] = { 0 };
382 #ifdef CONFIG_HIGHMEM
383 long highmem_pages;
384 #endif
385 #ifndef __tilegx__
386 int cap;
387 #endif
388 #if defined(CONFIG_HIGHMEM) || defined(__tilegx__)
389 long lowmem_pages;
390 #endif
391 unsigned long physpages = 0;
392
393 /* We are using a char to hold the cpu_2_node[] mapping */
394 BUILD_BUG_ON(MAX_NUMNODES > 127);
395
396 /* Discover the ranges of memory available to us */
397 for (i = 0; ; ++i) {
398 unsigned long start, size, end, highbits;
399 HV_PhysAddrRange range = hv_inquire_physical(i);
400 if (range.size == 0)
401 break;
402 #ifdef CONFIG_FLATMEM
403 if (i > 0) {
404 pr_err("Can't use discontiguous PAs: %#llx..%#llx\n",
405 range.size, range.start + range.size);
406 continue;
407 }
408 #endif
409 #ifndef __tilegx__
410 if ((unsigned long)range.start) {
411 pr_err("Range not at 4GB multiple: %#llx..%#llx\n",
412 range.start, range.start + range.size);
413 continue;
414 }
415 #endif
416 if ((range.start & (HPAGE_SIZE-1)) != 0 ||
417 (range.size & (HPAGE_SIZE-1)) != 0) {
418 unsigned long long start_pa = range.start;
419 unsigned long long orig_size = range.size;
420 range.start = (start_pa + HPAGE_SIZE - 1) & HPAGE_MASK;
421 range.size -= (range.start - start_pa);
422 range.size &= HPAGE_MASK;
423 pr_err("Range not hugepage-aligned: %#llx..%#llx:"
424 " now %#llx-%#llx\n",
425 start_pa, start_pa + orig_size,
426 range.start, range.start + range.size);
427 }
428 highbits = __pa_to_highbits(range.start);
429 if (highbits >= NR_PA_HIGHBIT_VALUES) {
430 pr_err("PA high bits too high: %#llx..%#llx\n",
431 range.start, range.start + range.size);
432 continue;
433 }
434 if (highbits_seen[highbits]) {
435 pr_err("Range overlaps in high bits: %#llx..%#llx\n",
436 range.start, range.start + range.size);
437 continue;
438 }
439 highbits_seen[highbits] = 1;
440 if (PFN_DOWN(range.size) > maxnodemem_pfn[i]) {
441 int max_size = maxnodemem_pfn[i];
442 if (max_size > 0) {
443 pr_err("Maxnodemem reduced node %d to"
444 " %d pages\n", i, max_size);
445 range.size = PFN_PHYS(max_size);
446 } else {
447 pr_err("Maxnodemem disabled node %d\n", i);
448 continue;
449 }
450 }
451 if (physpages + PFN_DOWN(range.size) > maxmem_pfn) {
452 int max_size = maxmem_pfn - physpages;
453 if (max_size > 0) {
454 pr_err("Maxmem reduced node %d to %d pages\n",
455 i, max_size);
456 range.size = PFN_PHYS(max_size);
457 } else {
458 pr_err("Maxmem disabled node %d\n", i);
459 continue;
460 }
461 }
462 if (i >= MAX_NUMNODES) {
463 pr_err("Too many PA nodes (#%d): %#llx...%#llx\n",
464 i, range.size, range.size + range.start);
465 continue;
466 }
467
468 start = range.start >> PAGE_SHIFT;
469 size = range.size >> PAGE_SHIFT;
470 end = start + size;
471
472 #ifndef __tilegx__
473 if (((HV_PhysAddr)end << PAGE_SHIFT) !=
474 (range.start + range.size)) {
475 pr_err("PAs too high to represent: %#llx..%#llx\n",
476 range.start, range.start + range.size);
477 continue;
478 }
479 #endif
480 #if defined(CONFIG_PCI) && !defined(__tilegx__)
481 /*
482 * Blocks that overlap the pci reserved region must
483 * have enough space to hold the maximum percpu data
484 * region at the top of the range. If there isn't
485 * enough space above the reserved region, just
486 * truncate the node.
487 */
488 if (start <= pci_reserve_start_pfn &&
489 end > pci_reserve_start_pfn) {
490 unsigned int per_cpu_size =
491 __per_cpu_end - __per_cpu_start;
492 unsigned int percpu_pages =
493 NR_CPUS * (PFN_UP(per_cpu_size) >> PAGE_SHIFT);
494 if (end < pci_reserve_end_pfn + percpu_pages) {
495 end = pci_reserve_start_pfn;
496 pr_err("PCI mapping region reduced node %d to"
497 " %ld pages\n", i, end - start);
498 }
499 }
500 #endif
501
502 for (j = __pfn_to_highbits(start);
503 j <= __pfn_to_highbits(end - 1); j++)
504 highbits_to_node[j] = i;
505
506 node_start_pfn[i] = start;
507 node_end_pfn[i] = end;
508 node_controller[i] = range.controller;
509 physpages += size;
510 max_pfn = end;
511
512 /* Mark node as online */
513 node_set(i, node_online_map);
514 node_set(i, node_possible_map);
515 }
516
517 #ifndef __tilegx__
518 /*
519 * For 4KB pages, mem_map "struct page" data is 1% of the size
520 * of the physical memory, so can be quite big (640 MB for
521 * four 16G zones). These structures must be mapped in
522 * lowmem, and since we currently cap out at about 768 MB,
523 * it's impractical to try to use this much address space.
524 * For now, arbitrarily cap the amount of physical memory
525 * we're willing to use at 8 million pages (32GB of 4KB pages).
526 */
527 cap = 8 * 1024 * 1024; /* 8 million pages */
528 if (physpages > cap) {
529 int num_nodes = num_online_nodes();
530 int cap_each = cap / num_nodes;
531 unsigned long dropped_pages = 0;
532 for (i = 0; i < num_nodes; ++i) {
533 int size = node_end_pfn[i] - node_start_pfn[i];
534 if (size > cap_each) {
535 dropped_pages += (size - cap_each);
536 node_end_pfn[i] = node_start_pfn[i] + cap_each;
537 }
538 }
539 physpages -= dropped_pages;
540 pr_warning("Only using %ldMB memory;"
541 " ignoring %ldMB.\n",
542 physpages >> (20 - PAGE_SHIFT),
543 dropped_pages >> (20 - PAGE_SHIFT));
544 pr_warning("Consider using a larger page size.\n");
545 }
546 #endif
547
548 /* Heap starts just above the last loaded address. */
549 min_low_pfn = PFN_UP((unsigned long)_end - PAGE_OFFSET);
550
551 #ifdef CONFIG_HIGHMEM
552 /* Find where we map lowmem from each controller. */
553 high_memory = setup_pa_va_mapping();
554
555 /* Set max_low_pfn based on what node 0 can directly address. */
556 max_low_pfn = node_lowmem_end_pfn[0];
557
558 lowmem_pages = (mappable_physpages > MAXMEM_PFN) ?
559 MAXMEM_PFN : mappable_physpages;
560 highmem_pages = (long) (physpages - lowmem_pages);
561
562 pr_notice("%ldMB HIGHMEM available.\n",
563 pages_to_mb(highmem_pages > 0 ? highmem_pages : 0));
564 pr_notice("%ldMB LOWMEM available.\n",
565 pages_to_mb(lowmem_pages));
566 #else
567 /* Set max_low_pfn based on what node 0 can directly address. */
568 max_low_pfn = node_end_pfn[0];
569
570 #ifndef __tilegx__
571 if (node_end_pfn[0] > MAXMEM_PFN) {
572 pr_warning("Only using %ldMB LOWMEM.\n",
573 MAXMEM>>20);
574 pr_warning("Use a HIGHMEM enabled kernel.\n");
575 max_low_pfn = MAXMEM_PFN;
576 max_pfn = MAXMEM_PFN;
577 node_end_pfn[0] = MAXMEM_PFN;
578 } else {
579 pr_notice("%ldMB memory available.\n",
580 pages_to_mb(node_end_pfn[0]));
581 }
582 for (i = 1; i < MAX_NUMNODES; ++i) {
583 node_start_pfn[i] = 0;
584 node_end_pfn[i] = 0;
585 }
586 high_memory = __va(node_end_pfn[0]);
587 #else
588 lowmem_pages = 0;
589 for (i = 0; i < MAX_NUMNODES; ++i) {
590 int pages = node_end_pfn[i] - node_start_pfn[i];
591 lowmem_pages += pages;
592 if (pages)
593 high_memory = pfn_to_kaddr(node_end_pfn[i]);
594 }
595 pr_notice("%ldMB memory available.\n",
596 pages_to_mb(lowmem_pages));
597 #endif
598 #endif
599 }
600
601 /*
602 * On 32-bit machines, we only put bootmem on the low controller,
603 * since PAs > 4GB can't be used in bootmem. In principle one could
604 * imagine, e.g., multiple 1 GB controllers all of which could support
605 * bootmem, but in practice using controllers this small isn't a
606 * particularly interesting scenario, so we just keep it simple and
607 * use only the first controller for bootmem on 32-bit machines.
608 */
609 static inline int node_has_bootmem(int nid)
610 {
611 #ifdef CONFIG_64BIT
612 return 1;
613 #else
614 return nid == 0;
615 #endif
616 }
617
618 static inline unsigned long alloc_bootmem_pfn(int nid,
619 unsigned long size,
620 unsigned long goal)
621 {
622 void *kva = __alloc_bootmem_node(NODE_DATA(nid), size,
623 PAGE_SIZE, goal);
624 unsigned long pfn = kaddr_to_pfn(kva);
625 BUG_ON(goal && PFN_PHYS(pfn) != goal);
626 return pfn;
627 }
628
629 static void __init setup_bootmem_allocator_node(int i)
630 {
631 unsigned long start, end, mapsize, mapstart;
632
633 if (node_has_bootmem(i)) {
634 NODE_DATA(i)->bdata = &bootmem_node_data[i];
635 } else {
636 /* Share controller zero's bdata for now. */
637 NODE_DATA(i)->bdata = &bootmem_node_data[0];
638 return;
639 }
640
641 /* Skip up to after the bss in node 0. */
642 start = (i == 0) ? min_low_pfn : node_start_pfn[i];
643
644 /* Only lowmem, if we're a HIGHMEM build. */
645 #ifdef CONFIG_HIGHMEM
646 end = node_lowmem_end_pfn[i];
647 #else
648 end = node_end_pfn[i];
649 #endif
650
651 /* No memory here. */
652 if (end == start)
653 return;
654
655 /* Figure out where the bootmem bitmap is located. */
656 mapsize = bootmem_bootmap_pages(end - start);
657 if (i == 0) {
658 /* Use some space right before the heap on node 0. */
659 mapstart = start;
660 start += mapsize;
661 } else {
662 /* Allocate bitmap on node 0 to avoid page table issues. */
663 mapstart = alloc_bootmem_pfn(0, PFN_PHYS(mapsize), 0);
664 }
665
666 /* Initialize a node. */
667 init_bootmem_node(NODE_DATA(i), mapstart, start, end);
668
669 /* Free all the space back into the allocator. */
670 free_bootmem(PFN_PHYS(start), PFN_PHYS(end - start));
671
672 #if defined(CONFIG_PCI) && !defined(__tilegx__)
673 /*
674 * Throw away any memory aliased by the PCI region.
675 */
676 if (pci_reserve_start_pfn < end && pci_reserve_end_pfn > start) {
677 start = max(pci_reserve_start_pfn, start);
678 end = min(pci_reserve_end_pfn, end);
679 reserve_bootmem(PFN_PHYS(start), PFN_PHYS(end - start),
680 BOOTMEM_EXCLUSIVE);
681 }
682 #endif
683 }
684
685 static void __init setup_bootmem_allocator(void)
686 {
687 int i;
688 for (i = 0; i < MAX_NUMNODES; ++i)
689 setup_bootmem_allocator_node(i);
690
691 /* Reserve any memory excluded by "memmap" arguments. */
692 for (i = 0; i < memmap_nr; ++i) {
693 struct memmap_entry *m = &memmap_map[i];
694 reserve_bootmem(m->addr, m->size, 0);
695 }
696
697 #ifdef CONFIG_BLK_DEV_INITRD
698 if (initrd_start) {
699 /* Make sure the initrd memory region is not modified. */
700 if (reserve_bootmem(initrd_start, initrd_end - initrd_start,
701 BOOTMEM_EXCLUSIVE)) {
702 pr_crit("The initrd memory region has been polluted. Disabling it.\n");
703 initrd_start = 0;
704 initrd_end = 0;
705 } else {
706 /*
707 * Translate initrd_start & initrd_end from PA to VA for
708 * future access.
709 */
710 initrd_start += PAGE_OFFSET;
711 initrd_end += PAGE_OFFSET;
712 }
713 }
714 #endif
715
716 #ifdef CONFIG_KEXEC
717 if (crashk_res.start != crashk_res.end)
718 reserve_bootmem(crashk_res.start, resource_size(&crashk_res), 0);
719 #endif
720 }
721
722 void *__init alloc_remap(int nid, unsigned long size)
723 {
724 int pages = node_end_pfn[nid] - node_start_pfn[nid];
725 void *map = pfn_to_kaddr(node_memmap_pfn[nid]);
726 BUG_ON(size != pages * sizeof(struct page));
727 memset(map, 0, size);
728 return map;
729 }
730
731 static int __init percpu_size(void)
732 {
733 int size = __per_cpu_end - __per_cpu_start;
734 size += PERCPU_MODULE_RESERVE;
735 size += PERCPU_DYNAMIC_EARLY_SIZE;
736 if (size < PCPU_MIN_UNIT_SIZE)
737 size = PCPU_MIN_UNIT_SIZE;
738 size = roundup(size, PAGE_SIZE);
739
740 /* In several places we assume the per-cpu data fits on a huge page. */
741 BUG_ON(kdata_huge && size > HPAGE_SIZE);
742 return size;
743 }
744
745 static void __init zone_sizes_init(void)
746 {
747 unsigned long zones_size[MAX_NR_ZONES] = { 0 };
748 int size = percpu_size();
749 int num_cpus = smp_height * smp_width;
750 const unsigned long dma_end = (1UL << (32 - PAGE_SHIFT));
751
752 int i;
753
754 for (i = 0; i < num_cpus; ++i)
755 node_percpu[cpu_to_node(i)] += size;
756
757 for_each_online_node(i) {
758 unsigned long start = node_start_pfn[i];
759 unsigned long end = node_end_pfn[i];
760 #ifdef CONFIG_HIGHMEM
761 unsigned long lowmem_end = node_lowmem_end_pfn[i];
762 #else
763 unsigned long lowmem_end = end;
764 #endif
765 int memmap_size = (end - start) * sizeof(struct page);
766 node_free_pfn[i] = start;
767
768 /*
769 * Set aside pages for per-cpu data and the mem_map array.
770 *
771 * Since the per-cpu data requires special homecaching,
772 * if we are in kdata_huge mode, we put it at the end of
773 * the lowmem region. If we're not in kdata_huge mode,
774 * we take the per-cpu pages from the bottom of the
775 * controller, since that avoids fragmenting a huge page
776 * that users might want. We always take the memmap
777 * from the bottom of the controller, since with
778 * kdata_huge that lets it be under a huge TLB entry.
779 *
780 * If the user has requested isolnodes for a controller,
781 * though, there'll be no lowmem, so we just alloc_bootmem
782 * the memmap. There will be no percpu memory either.
783 */
784 if (i != 0 && cpu_isset(i, isolnodes)) {
785 node_memmap_pfn[i] =
786 alloc_bootmem_pfn(0, memmap_size, 0);
787 BUG_ON(node_percpu[i] != 0);
788 } else if (node_has_bootmem(start)) {
789 unsigned long goal = 0;
790 node_memmap_pfn[i] =
791 alloc_bootmem_pfn(i, memmap_size, 0);
792 if (kdata_huge)
793 goal = PFN_PHYS(lowmem_end) - node_percpu[i];
794 if (node_percpu[i])
795 node_percpu_pfn[i] =
796 alloc_bootmem_pfn(i, node_percpu[i],
797 goal);
798 } else {
799 /* In non-bootmem zones, just reserve some pages. */
800 node_memmap_pfn[i] = node_free_pfn[i];
801 node_free_pfn[i] += PFN_UP(memmap_size);
802 if (!kdata_huge) {
803 node_percpu_pfn[i] = node_free_pfn[i];
804 node_free_pfn[i] += PFN_UP(node_percpu[i]);
805 } else {
806 node_percpu_pfn[i] =
807 lowmem_end - PFN_UP(node_percpu[i]);
808 }
809 }
810
811 #ifdef CONFIG_HIGHMEM
812 if (start > lowmem_end) {
813 zones_size[ZONE_NORMAL] = 0;
814 zones_size[ZONE_HIGHMEM] = end - start;
815 } else {
816 zones_size[ZONE_NORMAL] = lowmem_end - start;
817 zones_size[ZONE_HIGHMEM] = end - lowmem_end;
818 }
819 #else
820 zones_size[ZONE_NORMAL] = end - start;
821 #endif
822
823 if (start < dma_end) {
824 zones_size[ZONE_DMA] = min(zones_size[ZONE_NORMAL],
825 dma_end - start);
826 zones_size[ZONE_NORMAL] -= zones_size[ZONE_DMA];
827 } else {
828 zones_size[ZONE_DMA] = 0;
829 }
830
831 /* Take zone metadata from controller 0 if we're isolnode. */
832 if (node_isset(i, isolnodes))
833 NODE_DATA(i)->bdata = &bootmem_node_data[0];
834
835 free_area_init_node(i, zones_size, start, NULL);
836 printk(KERN_DEBUG " Normal zone: %ld per-cpu pages\n",
837 PFN_UP(node_percpu[i]));
838
839 /* Track the type of memory on each node */
840 if (zones_size[ZONE_NORMAL] || zones_size[ZONE_DMA])
841 node_set_state(i, N_NORMAL_MEMORY);
842 #ifdef CONFIG_HIGHMEM
843 if (end != start)
844 node_set_state(i, N_HIGH_MEMORY);
845 #endif
846
847 node_set_online(i);
848 }
849 }
850
851 #ifdef CONFIG_NUMA
852
853 /* which logical CPUs are on which nodes */
854 struct cpumask node_2_cpu_mask[MAX_NUMNODES] __write_once;
855 EXPORT_SYMBOL(node_2_cpu_mask);
856
857 /* which node each logical CPU is on */
858 char cpu_2_node[NR_CPUS] __write_once __attribute__((aligned(L2_CACHE_BYTES)));
859 EXPORT_SYMBOL(cpu_2_node);
860
861 /* Return cpu_to_node() except for cpus not yet assigned, which return -1 */
862 static int __init cpu_to_bound_node(int cpu, struct cpumask* unbound_cpus)
863 {
864 if (!cpu_possible(cpu) || cpumask_test_cpu(cpu, unbound_cpus))
865 return -1;
866 else
867 return cpu_to_node(cpu);
868 }
869
870 /* Return number of immediately-adjacent tiles sharing the same NUMA node. */
871 static int __init node_neighbors(int node, int cpu,
872 struct cpumask *unbound_cpus)
873 {
874 int neighbors = 0;
875 int w = smp_width;
876 int h = smp_height;
877 int x = cpu % w;
878 int y = cpu / w;
879 if (x > 0 && cpu_to_bound_node(cpu-1, unbound_cpus) == node)
880 ++neighbors;
881 if (x < w-1 && cpu_to_bound_node(cpu+1, unbound_cpus) == node)
882 ++neighbors;
883 if (y > 0 && cpu_to_bound_node(cpu-w, unbound_cpus) == node)
884 ++neighbors;
885 if (y < h-1 && cpu_to_bound_node(cpu+w, unbound_cpus) == node)
886 ++neighbors;
887 return neighbors;
888 }
889
890 static void __init setup_numa_mapping(void)
891 {
892 int distance[MAX_NUMNODES][NR_CPUS];
893 HV_Coord coord;
894 int cpu, node, cpus, i, x, y;
895 int num_nodes = num_online_nodes();
896 struct cpumask unbound_cpus;
897 nodemask_t default_nodes;
898
899 cpumask_clear(&unbound_cpus);
900
901 /* Get set of nodes we will use for defaults */
902 nodes_andnot(default_nodes, node_online_map, isolnodes);
903 if (nodes_empty(default_nodes)) {
904 BUG_ON(!node_isset(0, node_online_map));
905 pr_err("Forcing NUMA node zero available as a default node\n");
906 node_set(0, default_nodes);
907 }
908
909 /* Populate the distance[] array */
910 memset(distance, -1, sizeof(distance));
911 cpu = 0;
912 for (coord.y = 0; coord.y < smp_height; ++coord.y) {
913 for (coord.x = 0; coord.x < smp_width;
914 ++coord.x, ++cpu) {
915 BUG_ON(cpu >= nr_cpu_ids);
916 if (!cpu_possible(cpu)) {
917 cpu_2_node[cpu] = -1;
918 continue;
919 }
920 for_each_node_mask(node, default_nodes) {
921 HV_MemoryControllerInfo info =
922 hv_inquire_memory_controller(
923 coord, node_controller[node]);
924 distance[node][cpu] =
925 ABS(info.coord.x) + ABS(info.coord.y);
926 }
927 cpumask_set_cpu(cpu, &unbound_cpus);
928 }
929 }
930 cpus = cpu;
931
932 /*
933 * Round-robin through the NUMA nodes until all the cpus are
934 * assigned. We could be more clever here (e.g. create four
935 * sorted linked lists on the same set of cpu nodes, and pull
936 * off them in round-robin sequence, removing from all four
937 * lists each time) but given the relatively small numbers
938 * involved, O(n^2) seem OK for a one-time cost.
939 */
940 node = first_node(default_nodes);
941 while (!cpumask_empty(&unbound_cpus)) {
942 int best_cpu = -1;
943 int best_distance = INT_MAX;
944 for (cpu = 0; cpu < cpus; ++cpu) {
945 if (cpumask_test_cpu(cpu, &unbound_cpus)) {
946 /*
947 * Compute metric, which is how much
948 * closer the cpu is to this memory
949 * controller than the others, shifted
950 * up, and then the number of
951 * neighbors already in the node as an
952 * epsilon adjustment to try to keep
953 * the nodes compact.
954 */
955 int d = distance[node][cpu] * num_nodes;
956 for_each_node_mask(i, default_nodes) {
957 if (i != node)
958 d -= distance[i][cpu];
959 }
960 d *= 8; /* allow space for epsilon */
961 d -= node_neighbors(node, cpu, &unbound_cpus);
962 if (d < best_distance) {
963 best_cpu = cpu;
964 best_distance = d;
965 }
966 }
967 }
968 BUG_ON(best_cpu < 0);
969 cpumask_set_cpu(best_cpu, &node_2_cpu_mask[node]);
970 cpu_2_node[best_cpu] = node;
971 cpumask_clear_cpu(best_cpu, &unbound_cpus);
972 node = next_node(node, default_nodes);
973 if (node == MAX_NUMNODES)
974 node = first_node(default_nodes);
975 }
976
977 /* Print out node assignments and set defaults for disabled cpus */
978 cpu = 0;
979 for (y = 0; y < smp_height; ++y) {
980 printk(KERN_DEBUG "NUMA cpu-to-node row %d:", y);
981 for (x = 0; x < smp_width; ++x, ++cpu) {
982 if (cpu_to_node(cpu) < 0) {
983 pr_cont(" -");
984 cpu_2_node[cpu] = first_node(default_nodes);
985 } else {
986 pr_cont(" %d", cpu_to_node(cpu));
987 }
988 }
989 pr_cont("\n");
990 }
991 }
992
993 static struct cpu cpu_devices[NR_CPUS];
994
995 static int __init topology_init(void)
996 {
997 int i;
998
999 for_each_online_node(i)
1000 register_one_node(i);
1001
1002 for (i = 0; i < smp_height * smp_width; ++i)
1003 register_cpu(&cpu_devices[i], i);
1004
1005 return 0;
1006 }
1007
1008 subsys_initcall(topology_init);
1009
1010 #else /* !CONFIG_NUMA */
1011
1012 #define setup_numa_mapping() do { } while (0)
1013
1014 #endif /* CONFIG_NUMA */
1015
1016 /*
1017 * Initialize hugepage support on this cpu. We do this on all cores
1018 * early in boot: before argument parsing for the boot cpu, and after
1019 * argument parsing but before the init functions run on the secondaries.
1020 * So the values we set up here in the hypervisor may be overridden on
1021 * the boot cpu as arguments are parsed.
1022 */
1023 static void init_super_pages(void)
1024 {
1025 #ifdef CONFIG_HUGETLB_SUPER_PAGES
1026 int i;
1027 for (i = 0; i < HUGE_SHIFT_ENTRIES; ++i)
1028 hv_set_pte_super_shift(i, huge_shift[i]);
1029 #endif
1030 }
1031
1032 /**
1033 * setup_cpu() - Do all necessary per-cpu, tile-specific initialization.
1034 * @boot: Is this the boot cpu?
1035 *
1036 * Called from setup_arch() on the boot cpu, or online_secondary().
1037 */
1038 void setup_cpu(int boot)
1039 {
1040 /* The boot cpu sets up its permanent mappings much earlier. */
1041 if (!boot)
1042 store_permanent_mappings();
1043
1044 /* Allow asynchronous TLB interrupts. */
1045 #if CHIP_HAS_TILE_DMA()
1046 arch_local_irq_unmask(INT_DMATLB_MISS);
1047 arch_local_irq_unmask(INT_DMATLB_ACCESS);
1048 #endif
1049 #ifdef __tilegx__
1050 arch_local_irq_unmask(INT_SINGLE_STEP_K);
1051 #endif
1052
1053 /*
1054 * Allow user access to many generic SPRs, like the cycle
1055 * counter, PASS/FAIL/DONE, INTERRUPT_CRITICAL_SECTION, etc.
1056 */
1057 __insn_mtspr(SPR_MPL_WORLD_ACCESS_SET_0, 1);
1058
1059 #if CHIP_HAS_SN()
1060 /* Static network is not restricted. */
1061 __insn_mtspr(SPR_MPL_SN_ACCESS_SET_0, 1);
1062 #endif
1063
1064 /*
1065 * Set the MPL for interrupt control 0 & 1 to the corresponding
1066 * values. This includes access to the SYSTEM_SAVE and EX_CONTEXT
1067 * SPRs, as well as the interrupt mask.
1068 */
1069 __insn_mtspr(SPR_MPL_INTCTRL_0_SET_0, 1);
1070 __insn_mtspr(SPR_MPL_INTCTRL_1_SET_1, 1);
1071
1072 /* Initialize IRQ support for this cpu. */
1073 setup_irq_regs();
1074
1075 #ifdef CONFIG_HARDWALL
1076 /* Reset the network state on this cpu. */
1077 reset_network_state();
1078 #endif
1079
1080 init_super_pages();
1081 }
1082
1083 #ifdef CONFIG_BLK_DEV_INITRD
1084
1085 static int __initdata set_initramfs_file;
1086 static char __initdata initramfs_file[128] = "initramfs";
1087
1088 static int __init setup_initramfs_file(char *str)
1089 {
1090 if (str == NULL)
1091 return -EINVAL;
1092 strncpy(initramfs_file, str, sizeof(initramfs_file) - 1);
1093 set_initramfs_file = 1;
1094
1095 return 0;
1096 }
1097 early_param("initramfs_file", setup_initramfs_file);
1098
1099 /*
1100 * We look for a file called "initramfs" in the hvfs. If there is one, we
1101 * allocate some memory for it and it will be unpacked to the initramfs.
1102 * If it's compressed, the initd code will uncompress it first.
1103 */
1104 static void __init load_hv_initrd(void)
1105 {
1106 HV_FS_StatInfo stat;
1107 int fd, rc;
1108 void *initrd;
1109
1110 /* If initrd has already been set, skip initramfs file in hvfs. */
1111 if (initrd_start)
1112 return;
1113
1114 fd = hv_fs_findfile((HV_VirtAddr) initramfs_file);
1115 if (fd == HV_ENOENT) {
1116 if (set_initramfs_file) {
1117 pr_warning("No such hvfs initramfs file '%s'\n",
1118 initramfs_file);
1119 return;
1120 } else {
1121 /* Try old backwards-compatible name. */
1122 fd = hv_fs_findfile((HV_VirtAddr)"initramfs.cpio.gz");
1123 if (fd == HV_ENOENT)
1124 return;
1125 }
1126 }
1127 BUG_ON(fd < 0);
1128 stat = hv_fs_fstat(fd);
1129 BUG_ON(stat.size < 0);
1130 if (stat.flags & HV_FS_ISDIR) {
1131 pr_warning("Ignoring hvfs file '%s': it's a directory.\n",
1132 initramfs_file);
1133 return;
1134 }
1135 initrd = alloc_bootmem_pages(stat.size);
1136 rc = hv_fs_pread(fd, (HV_VirtAddr) initrd, stat.size, 0);
1137 if (rc != stat.size) {
1138 pr_err("Error reading %d bytes from hvfs file '%s': %d\n",
1139 stat.size, initramfs_file, rc);
1140 free_initrd_mem((unsigned long) initrd, stat.size);
1141 return;
1142 }
1143 initrd_start = (unsigned long) initrd;
1144 initrd_end = initrd_start + stat.size;
1145 }
1146
1147 void __init free_initrd_mem(unsigned long begin, unsigned long end)
1148 {
1149 free_bootmem(__pa(begin), end - begin);
1150 }
1151
1152 static int __init setup_initrd(char *str)
1153 {
1154 char *endp;
1155 unsigned long initrd_size;
1156
1157 initrd_size = str ? simple_strtoul(str, &endp, 0) : 0;
1158 if (initrd_size == 0 || *endp != '@')
1159 return -EINVAL;
1160
1161 initrd_start = simple_strtoul(endp+1, &endp, 0);
1162 if (initrd_start == 0)
1163 return -EINVAL;
1164
1165 initrd_end = initrd_start + initrd_size;
1166
1167 return 0;
1168 }
1169 early_param("initrd", setup_initrd);
1170
1171 #else
1172 static inline void load_hv_initrd(void) {}
1173 #endif /* CONFIG_BLK_DEV_INITRD */
1174
1175 static void __init validate_hv(void)
1176 {
1177 /*
1178 * It may already be too late, but let's check our built-in
1179 * configuration against what the hypervisor is providing.
1180 */
1181 unsigned long glue_size = hv_sysconf(HV_SYSCONF_GLUE_SIZE);
1182 int hv_page_size = hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL);
1183 int hv_hpage_size = hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE);
1184 HV_ASIDRange asid_range;
1185
1186 #ifndef CONFIG_SMP
1187 HV_Topology topology = hv_inquire_topology();
1188 BUG_ON(topology.coord.x != 0 || topology.coord.y != 0);
1189 if (topology.width != 1 || topology.height != 1) {
1190 pr_warning("Warning: booting UP kernel on %dx%d grid;"
1191 " will ignore all but first tile.\n",
1192 topology.width, topology.height);
1193 }
1194 #endif
1195
1196 if (PAGE_OFFSET + HV_GLUE_START_CPA + glue_size > (unsigned long)_text)
1197 early_panic("Hypervisor glue size %ld is too big!\n",
1198 glue_size);
1199 if (hv_page_size != PAGE_SIZE)
1200 early_panic("Hypervisor page size %#x != our %#lx\n",
1201 hv_page_size, PAGE_SIZE);
1202 if (hv_hpage_size != HPAGE_SIZE)
1203 early_panic("Hypervisor huge page size %#x != our %#lx\n",
1204 hv_hpage_size, HPAGE_SIZE);
1205
1206 #ifdef CONFIG_SMP
1207 /*
1208 * Some hypervisor APIs take a pointer to a bitmap array
1209 * whose size is at least the number of cpus on the chip.
1210 * We use a struct cpumask for this, so it must be big enough.
1211 */
1212 if ((smp_height * smp_width) > nr_cpu_ids)
1213 early_panic("Hypervisor %d x %d grid too big for Linux"
1214 " NR_CPUS %d\n", smp_height, smp_width,
1215 nr_cpu_ids);
1216 #endif
1217
1218 /*
1219 * Check that we're using allowed ASIDs, and initialize the
1220 * various asid variables to their appropriate initial states.
1221 */
1222 asid_range = hv_inquire_asid(0);
1223 __get_cpu_var(current_asid) = min_asid = asid_range.start;
1224 max_asid = asid_range.start + asid_range.size - 1;
1225
1226 if (hv_confstr(HV_CONFSTR_CHIP_MODEL, (HV_VirtAddr)chip_model,
1227 sizeof(chip_model)) < 0) {
1228 pr_err("Warning: HV_CONFSTR_CHIP_MODEL not available\n");
1229 strlcpy(chip_model, "unknown", sizeof(chip_model));
1230 }
1231 }
1232
1233 static void __init validate_va(void)
1234 {
1235 #ifndef __tilegx__ /* FIXME: GX: probably some validation relevant here */
1236 /*
1237 * Similarly, make sure we're only using allowed VAs.
1238 * We assume we can contiguously use MEM_USER_INTRPT .. MEM_HV_START,
1239 * and 0 .. KERNEL_HIGH_VADDR.
1240 * In addition, make sure we CAN'T use the end of memory, since
1241 * we use the last chunk of each pgd for the pgd_list.
1242 */
1243 int i, user_kernel_ok = 0;
1244 unsigned long max_va = 0;
1245 unsigned long list_va =
1246 ((PGD_LIST_OFFSET / sizeof(pgd_t)) << PGDIR_SHIFT);
1247
1248 for (i = 0; ; ++i) {
1249 HV_VirtAddrRange range = hv_inquire_virtual(i);
1250 if (range.size == 0)
1251 break;
1252 if (range.start <= MEM_USER_INTRPT &&
1253 range.start + range.size >= MEM_HV_START)
1254 user_kernel_ok = 1;
1255 if (range.start == 0)
1256 max_va = range.size;
1257 BUG_ON(range.start + range.size > list_va);
1258 }
1259 if (!user_kernel_ok)
1260 early_panic("Hypervisor not configured for user/kernel VAs\n");
1261 if (max_va == 0)
1262 early_panic("Hypervisor not configured for low VAs\n");
1263 if (max_va < KERNEL_HIGH_VADDR)
1264 early_panic("Hypervisor max VA %#lx smaller than %#lx\n",
1265 max_va, KERNEL_HIGH_VADDR);
1266
1267 /* Kernel PCs must have their high bit set; see intvec.S. */
1268 if ((long)VMALLOC_START >= 0)
1269 early_panic(
1270 "Linux VMALLOC region below the 2GB line (%#lx)!\n"
1271 "Reconfigure the kernel with fewer NR_HUGE_VMAPS\n"
1272 "or smaller VMALLOC_RESERVE.\n",
1273 VMALLOC_START);
1274 #endif
1275 }
1276
1277 /*
1278 * cpu_lotar_map lists all the cpus that are valid for the supervisor
1279 * to cache data on at a page level, i.e. what cpus can be placed in
1280 * the LOTAR field of a PTE. It is equivalent to the set of possible
1281 * cpus plus any other cpus that are willing to share their cache.
1282 * It is set by hv_inquire_tiles(HV_INQ_TILES_LOTAR).
1283 */
1284 struct cpumask __write_once cpu_lotar_map;
1285 EXPORT_SYMBOL(cpu_lotar_map);
1286
1287 /*
1288 * hash_for_home_map lists all the tiles that hash-for-home data
1289 * will be cached on. Note that this may includes tiles that are not
1290 * valid for this supervisor to use otherwise (e.g. if a hypervisor
1291 * device is being shared between multiple supervisors).
1292 * It is set by hv_inquire_tiles(HV_INQ_TILES_HFH_CACHE).
1293 */
1294 struct cpumask hash_for_home_map;
1295 EXPORT_SYMBOL(hash_for_home_map);
1296
1297 /*
1298 * cpu_cacheable_map lists all the cpus whose caches the hypervisor can
1299 * flush on our behalf. It is set to cpu_possible_mask OR'ed with
1300 * hash_for_home_map, and it is what should be passed to
1301 * hv_flush_remote() to flush all caches. Note that if there are
1302 * dedicated hypervisor driver tiles that have authorized use of their
1303 * cache, those tiles will only appear in cpu_lotar_map, NOT in
1304 * cpu_cacheable_map, as they are a special case.
1305 */
1306 struct cpumask __write_once cpu_cacheable_map;
1307 EXPORT_SYMBOL(cpu_cacheable_map);
1308
1309 static __initdata struct cpumask disabled_map;
1310
1311 static int __init disabled_cpus(char *str)
1312 {
1313 int boot_cpu = smp_processor_id();
1314
1315 if (str == NULL || cpulist_parse_crop(str, &disabled_map) != 0)
1316 return -EINVAL;
1317 if (cpumask_test_cpu(boot_cpu, &disabled_map)) {
1318 pr_err("disabled_cpus: can't disable boot cpu %d\n", boot_cpu);
1319 cpumask_clear_cpu(boot_cpu, &disabled_map);
1320 }
1321 return 0;
1322 }
1323
1324 early_param("disabled_cpus", disabled_cpus);
1325
1326 void __init print_disabled_cpus(void)
1327 {
1328 if (!cpumask_empty(&disabled_map)) {
1329 char buf[100];
1330 cpulist_scnprintf(buf, sizeof(buf), &disabled_map);
1331 pr_info("CPUs not available for Linux: %s\n", buf);
1332 }
1333 }
1334
1335 static void __init setup_cpu_maps(void)
1336 {
1337 struct cpumask hv_disabled_map, cpu_possible_init;
1338 int boot_cpu = smp_processor_id();
1339 int cpus, i, rc;
1340
1341 /* Learn which cpus are allowed by the hypervisor. */
1342 rc = hv_inquire_tiles(HV_INQ_TILES_AVAIL,
1343 (HV_VirtAddr) cpumask_bits(&cpu_possible_init),
1344 sizeof(cpu_cacheable_map));
1345 if (rc < 0)
1346 early_panic("hv_inquire_tiles(AVAIL) failed: rc %d\n", rc);
1347 if (!cpumask_test_cpu(boot_cpu, &cpu_possible_init))
1348 early_panic("Boot CPU %d disabled by hypervisor!\n", boot_cpu);
1349
1350 /* Compute the cpus disabled by the hvconfig file. */
1351 cpumask_complement(&hv_disabled_map, &cpu_possible_init);
1352
1353 /* Include them with the cpus disabled by "disabled_cpus". */
1354 cpumask_or(&disabled_map, &disabled_map, &hv_disabled_map);
1355
1356 /*
1357 * Disable every cpu after "setup_max_cpus". But don't mark
1358 * as disabled the cpus that are outside of our initial rectangle,
1359 * since that turns out to be confusing.
1360 */
1361 cpus = 1; /* this cpu */
1362 cpumask_set_cpu(boot_cpu, &disabled_map); /* ignore this cpu */
1363 for (i = 0; cpus < setup_max_cpus; ++i)
1364 if (!cpumask_test_cpu(i, &disabled_map))
1365 ++cpus;
1366 for (; i < smp_height * smp_width; ++i)
1367 cpumask_set_cpu(i, &disabled_map);
1368 cpumask_clear_cpu(boot_cpu, &disabled_map); /* reset this cpu */
1369 for (i = smp_height * smp_width; i < NR_CPUS; ++i)
1370 cpumask_clear_cpu(i, &disabled_map);
1371
1372 /*
1373 * Setup cpu_possible map as every cpu allocated to us, minus
1374 * the results of any "disabled_cpus" settings.
1375 */
1376 cpumask_andnot(&cpu_possible_init, &cpu_possible_init, &disabled_map);
1377 init_cpu_possible(&cpu_possible_init);
1378
1379 /* Learn which cpus are valid for LOTAR caching. */
1380 rc = hv_inquire_tiles(HV_INQ_TILES_LOTAR,
1381 (HV_VirtAddr) cpumask_bits(&cpu_lotar_map),
1382 sizeof(cpu_lotar_map));
1383 if (rc < 0) {
1384 pr_err("warning: no HV_INQ_TILES_LOTAR; using AVAIL\n");
1385 cpu_lotar_map = *cpu_possible_mask;
1386 }
1387
1388 /* Retrieve set of CPUs used for hash-for-home caching */
1389 rc = hv_inquire_tiles(HV_INQ_TILES_HFH_CACHE,
1390 (HV_VirtAddr) hash_for_home_map.bits,
1391 sizeof(hash_for_home_map));
1392 if (rc < 0)
1393 early_panic("hv_inquire_tiles(HFH_CACHE) failed: rc %d\n", rc);
1394 cpumask_or(&cpu_cacheable_map, cpu_possible_mask, &hash_for_home_map);
1395 }
1396
1397
1398 static int __init dataplane(char *str)
1399 {
1400 pr_warning("WARNING: dataplane support disabled in this kernel\n");
1401 return 0;
1402 }
1403
1404 early_param("dataplane", dataplane);
1405
1406 #ifdef CONFIG_CMDLINE_BOOL
1407 static char __initdata builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
1408 #endif
1409
1410 void __init setup_arch(char **cmdline_p)
1411 {
1412 int len;
1413
1414 #if defined(CONFIG_CMDLINE_BOOL) && defined(CONFIG_CMDLINE_OVERRIDE)
1415 len = hv_get_command_line((HV_VirtAddr) boot_command_line,
1416 COMMAND_LINE_SIZE);
1417 if (boot_command_line[0])
1418 pr_warning("WARNING: ignoring dynamic command line \"%s\"\n",
1419 boot_command_line);
1420 strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
1421 #else
1422 char *hv_cmdline;
1423 #if defined(CONFIG_CMDLINE_BOOL)
1424 if (builtin_cmdline[0]) {
1425 int builtin_len = strlcpy(boot_command_line, builtin_cmdline,
1426 COMMAND_LINE_SIZE);
1427 if (builtin_len < COMMAND_LINE_SIZE-1)
1428 boot_command_line[builtin_len++] = ' ';
1429 hv_cmdline = &boot_command_line[builtin_len];
1430 len = COMMAND_LINE_SIZE - builtin_len;
1431 } else
1432 #endif
1433 {
1434 hv_cmdline = boot_command_line;
1435 len = COMMAND_LINE_SIZE;
1436 }
1437 len = hv_get_command_line((HV_VirtAddr) hv_cmdline, len);
1438 if (len < 0 || len > COMMAND_LINE_SIZE)
1439 early_panic("hv_get_command_line failed: %d\n", len);
1440 #endif
1441
1442 *cmdline_p = boot_command_line;
1443
1444 /* Set disabled_map and setup_max_cpus very early */
1445 parse_early_param();
1446
1447 /* Make sure the kernel is compatible with the hypervisor. */
1448 validate_hv();
1449 validate_va();
1450
1451 setup_cpu_maps();
1452
1453
1454 #if defined(CONFIG_PCI) && !defined(__tilegx__)
1455 /*
1456 * Initialize the PCI structures. This is done before memory
1457 * setup so that we know whether or not a pci_reserve region
1458 * is necessary.
1459 */
1460 if (tile_pci_init() == 0)
1461 pci_reserve_mb = 0;
1462
1463 /* PCI systems reserve a region just below 4GB for mapping iomem. */
1464 pci_reserve_end_pfn = (1 << (32 - PAGE_SHIFT));
1465 pci_reserve_start_pfn = pci_reserve_end_pfn -
1466 (pci_reserve_mb << (20 - PAGE_SHIFT));
1467 #endif
1468
1469 init_mm.start_code = (unsigned long) _text;
1470 init_mm.end_code = (unsigned long) _etext;
1471 init_mm.end_data = (unsigned long) _edata;
1472 init_mm.brk = (unsigned long) _end;
1473
1474 setup_memory();
1475 store_permanent_mappings();
1476 setup_bootmem_allocator();
1477
1478 /*
1479 * NOTE: before this point _nobody_ is allowed to allocate
1480 * any memory using the bootmem allocator.
1481 */
1482
1483 #ifdef CONFIG_SWIOTLB
1484 swiotlb_init(0);
1485 #endif
1486
1487 paging_init();
1488 setup_numa_mapping();
1489 zone_sizes_init();
1490 set_page_homes();
1491 setup_cpu(1);
1492 setup_clock();
1493 load_hv_initrd();
1494 }
1495
1496
1497 /*
1498 * Set up per-cpu memory.
1499 */
1500
1501 unsigned long __per_cpu_offset[NR_CPUS] __write_once;
1502 EXPORT_SYMBOL(__per_cpu_offset);
1503
1504 static size_t __initdata pfn_offset[MAX_NUMNODES] = { 0 };
1505 static unsigned long __initdata percpu_pfn[NR_CPUS] = { 0 };
1506
1507 /*
1508 * As the percpu code allocates pages, we return the pages from the
1509 * end of the node for the specified cpu.
1510 */
1511 static void *__init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align)
1512 {
1513 int nid = cpu_to_node(cpu);
1514 unsigned long pfn = node_percpu_pfn[nid] + pfn_offset[nid];
1515
1516 BUG_ON(size % PAGE_SIZE != 0);
1517 pfn_offset[nid] += size / PAGE_SIZE;
1518 BUG_ON(node_percpu[nid] < size);
1519 node_percpu[nid] -= size;
1520 if (percpu_pfn[cpu] == 0)
1521 percpu_pfn[cpu] = pfn;
1522 return pfn_to_kaddr(pfn);
1523 }
1524
1525 /*
1526 * Pages reserved for percpu memory are not freeable, and in any case we are
1527 * on a short path to panic() in setup_per_cpu_area() at this point anyway.
1528 */
1529 static void __init pcpu_fc_free(void *ptr, size_t size)
1530 {
1531 }
1532
1533 /*
1534 * Set up vmalloc page tables using bootmem for the percpu code.
1535 */
1536 static void __init pcpu_fc_populate_pte(unsigned long addr)
1537 {
1538 pgd_t *pgd;
1539 pud_t *pud;
1540 pmd_t *pmd;
1541 pte_t *pte;
1542
1543 BUG_ON(pgd_addr_invalid(addr));
1544 if (addr < VMALLOC_START || addr >= VMALLOC_END)
1545 panic("PCPU addr %#lx outside vmalloc range %#lx..%#lx;"
1546 " try increasing CONFIG_VMALLOC_RESERVE\n",
1547 addr, VMALLOC_START, VMALLOC_END);
1548
1549 pgd = swapper_pg_dir + pgd_index(addr);
1550 pud = pud_offset(pgd, addr);
1551 BUG_ON(!pud_present(*pud));
1552 pmd = pmd_offset(pud, addr);
1553 if (pmd_present(*pmd)) {
1554 BUG_ON(pmd_huge_page(*pmd));
1555 } else {
1556 pte = __alloc_bootmem(L2_KERNEL_PGTABLE_SIZE,
1557 HV_PAGE_TABLE_ALIGN, 0);
1558 pmd_populate_kernel(&init_mm, pmd, pte);
1559 }
1560 }
1561
1562 void __init setup_per_cpu_areas(void)
1563 {
1564 struct page *pg;
1565 unsigned long delta, pfn, lowmem_va;
1566 unsigned long size = percpu_size();
1567 char *ptr;
1568 int rc, cpu, i;
1569
1570 rc = pcpu_page_first_chunk(PERCPU_MODULE_RESERVE, pcpu_fc_alloc,
1571 pcpu_fc_free, pcpu_fc_populate_pte);
1572 if (rc < 0)
1573 panic("Cannot initialize percpu area (err=%d)", rc);
1574
1575 delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
1576 for_each_possible_cpu(cpu) {
1577 __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu];
1578
1579 /* finv the copy out of cache so we can change homecache */
1580 ptr = pcpu_base_addr + pcpu_unit_offsets[cpu];
1581 __finv_buffer(ptr, size);
1582 pfn = percpu_pfn[cpu];
1583
1584 /* Rewrite the page tables to cache on that cpu */
1585 pg = pfn_to_page(pfn);
1586 for (i = 0; i < size; i += PAGE_SIZE, ++pfn, ++pg) {
1587
1588 /* Update the vmalloc mapping and page home. */
1589 unsigned long addr = (unsigned long)ptr + i;
1590 pte_t *ptep = virt_to_kpte(addr);
1591 pte_t pte = *ptep;
1592 BUG_ON(pfn != pte_pfn(pte));
1593 pte = hv_pte_set_mode(pte, HV_PTE_MODE_CACHE_TILE_L3);
1594 pte = set_remote_cache_cpu(pte, cpu);
1595 set_pte_at(&init_mm, addr, ptep, pte);
1596
1597 /* Update the lowmem mapping for consistency. */
1598 lowmem_va = (unsigned long)pfn_to_kaddr(pfn);
1599 ptep = virt_to_kpte(lowmem_va);
1600 if (pte_huge(*ptep)) {
1601 printk(KERN_DEBUG "early shatter of huge page"
1602 " at %#lx\n", lowmem_va);
1603 shatter_pmd((pmd_t *)ptep);
1604 ptep = virt_to_kpte(lowmem_va);
1605 BUG_ON(pte_huge(*ptep));
1606 }
1607 BUG_ON(pfn != pte_pfn(*ptep));
1608 set_pte_at(&init_mm, lowmem_va, ptep, pte);
1609 }
1610 }
1611
1612 /* Set our thread pointer appropriately. */
1613 set_my_cpu_offset(__per_cpu_offset[smp_processor_id()]);
1614
1615 /* Make sure the finv's have completed. */
1616 mb_incoherent();
1617
1618 /* Flush the TLB so we reference it properly from here on out. */
1619 local_flush_tlb_all();
1620 }
1621
1622 static struct resource data_resource = {
1623 .name = "Kernel data",
1624 .start = 0,
1625 .end = 0,
1626 .flags = IORESOURCE_BUSY | IORESOURCE_MEM
1627 };
1628
1629 static struct resource code_resource = {
1630 .name = "Kernel code",
1631 .start = 0,
1632 .end = 0,
1633 .flags = IORESOURCE_BUSY | IORESOURCE_MEM
1634 };
1635
1636 /*
1637 * On Pro, we reserve all resources above 4GB so that PCI won't try to put
1638 * mappings above 4GB.
1639 */
1640 #if defined(CONFIG_PCI) && !defined(__tilegx__)
1641 static struct resource* __init
1642 insert_non_bus_resource(void)
1643 {
1644 struct resource *res =
1645 kzalloc(sizeof(struct resource), GFP_ATOMIC);
1646 if (!res)
1647 return NULL;
1648 res->name = "Non-Bus Physical Address Space";
1649 res->start = (1ULL << 32);
1650 res->end = -1LL;
1651 res->flags = IORESOURCE_BUSY | IORESOURCE_MEM;
1652 if (insert_resource(&iomem_resource, res)) {
1653 kfree(res);
1654 return NULL;
1655 }
1656 return res;
1657 }
1658 #endif
1659
1660 static struct resource* __init
1661 insert_ram_resource(u64 start_pfn, u64 end_pfn, bool reserved)
1662 {
1663 struct resource *res =
1664 kzalloc(sizeof(struct resource), GFP_ATOMIC);
1665 if (!res)
1666 return NULL;
1667 res->name = reserved ? "Reserved" : "System RAM";
1668 res->start = start_pfn << PAGE_SHIFT;
1669 res->end = (end_pfn << PAGE_SHIFT) - 1;
1670 res->flags = IORESOURCE_BUSY | IORESOURCE_MEM;
1671 if (insert_resource(&iomem_resource, res)) {
1672 kfree(res);
1673 return NULL;
1674 }
1675 return res;
1676 }
1677
1678 /*
1679 * Request address space for all standard resources
1680 *
1681 * If the system includes PCI root complex drivers, we need to create
1682 * a window just below 4GB where PCI BARs can be mapped.
1683 */
1684 static int __init request_standard_resources(void)
1685 {
1686 int i;
1687 enum { CODE_DELTA = MEM_SV_START - PAGE_OFFSET };
1688
1689 #if defined(CONFIG_PCI) && !defined(__tilegx__)
1690 insert_non_bus_resource();
1691 #endif
1692
1693 for_each_online_node(i) {
1694 u64 start_pfn = node_start_pfn[i];
1695 u64 end_pfn = node_end_pfn[i];
1696
1697 #if defined(CONFIG_PCI) && !defined(__tilegx__)
1698 if (start_pfn <= pci_reserve_start_pfn &&
1699 end_pfn > pci_reserve_start_pfn) {
1700 if (end_pfn > pci_reserve_end_pfn)
1701 insert_ram_resource(pci_reserve_end_pfn,
1702 end_pfn, 0);
1703 end_pfn = pci_reserve_start_pfn;
1704 }
1705 #endif
1706 insert_ram_resource(start_pfn, end_pfn, 0);
1707 }
1708
1709 code_resource.start = __pa(_text - CODE_DELTA);
1710 code_resource.end = __pa(_etext - CODE_DELTA)-1;
1711 data_resource.start = __pa(_sdata);
1712 data_resource.end = __pa(_end)-1;
1713
1714 insert_resource(&iomem_resource, &code_resource);
1715 insert_resource(&iomem_resource, &data_resource);
1716
1717 /* Mark any "memmap" regions busy for the resource manager. */
1718 for (i = 0; i < memmap_nr; ++i) {
1719 struct memmap_entry *m = &memmap_map[i];
1720 insert_ram_resource(PFN_DOWN(m->addr),
1721 PFN_UP(m->addr + m->size - 1), 1);
1722 }
1723
1724 #ifdef CONFIG_KEXEC
1725 insert_resource(&iomem_resource, &crashk_res);
1726 #endif
1727
1728 return 0;
1729 }
1730
1731 subsys_initcall(request_standard_resources);