arch/unicore32/kernel/process.c

   1 /*
   2  * linux/arch/unicore32/kernel/process.c
   3  *
   4  * Code specific to PKUnity SoC and UniCore ISA
   5  *
   6  * Copyright (C) 2001-2010 GUAN Xue-tao
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #include <stdarg.h>
  13
  14 #include <linux/module.h>
  15 #include <linux/sched.h>
  16 #include <linux/kernel.h>
  17 #include <linux/mm.h>
  18 #include <linux/stddef.h>
  19 #include <linux/unistd.h>
  20 #include <linux/delay.h>
  21 #include <linux/reboot.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/kallsyms.h>
  24 #include <linux/init.h>
  25 #include <linux/cpu.h>
  26 #include <linux/elfcore.h>
  27 #include <linux/pm.h>
  28 #include <linux/tick.h>
  29 #include <linux/utsname.h>
  30 #include <linux/uaccess.h>
  31 #include <linux/random.h>
  32 #include <linux/gpio.h>
  33 #include <linux/stacktrace.h>
  34
  35 #include <asm/cacheflush.h>
  36 #include <asm/processor.h>
  37 #include <asm/stacktrace.h>
  38
  39 #include "setup.h"
  40
  41 static const char * const processor_modes[] = {
  42         "UK00", "UK01", "UK02", "UK03", "UK04", "UK05", "UK06", "UK07",
  43         "UK08", "UK09", "UK0A", "UK0B", "UK0C", "UK0D", "UK0E", "UK0F",
  44         "USER", "REAL", "INTR", "PRIV", "UK14", "UK15", "UK16", "ABRT",
  45         "UK18", "UK19", "UK1A", "EXTN", "UK1C", "UK1D", "UK1E", "SUSR"
  46 };
  47
  48 /*
  49  * The idle thread, has rather strange semantics for calling pm_idle,
  50  * but this is what x86 does and we need to do the same, so that
  51  * things like cpuidle get called in the same way.
  52  */
  53 void cpu_idle(void)
  54 {
  55         /* endless idle loop with no priority at all */
  56         while (1) {
  57                 tick_nohz_idle_enter();
  58                 rcu_idle_enter();
  59                 while (!need_resched()) {
  60                         local_irq_disable();
  61                         stop_critical_timings();
  62                         cpu_do_idle();
  63                         local_irq_enable();
  64                         start_critical_timings();
  65                 }
  66                 rcu_idle_exit();
  67                 tick_nohz_idle_exit();
  68                 preempt_enable_no_resched();
  69                 schedule();
  70                 preempt_disable();
  71         }
  72 }
  73
  74 static char reboot_mode = 'h';
  75
  76 int __init reboot_setup(char *str)
  77 {
  78         reboot_mode = str[0];
  79         return 1;
  80 }
  81
  82 __setup("reboot=", reboot_setup);
  83
  84 void machine_halt(void)
  85 {
  86         gpio_set_value(GPO_SOFT_OFF, 0);
  87 }
  88
  89 /*
  90  * Function pointers to optional machine specific functions
  91  */
  92 void (*pm_power_off)(void) = NULL;
  93
  94 void machine_power_off(void)
  95 {
  96         if (pm_power_off)
  97                 pm_power_off();
  98         machine_halt();
  99 }
 100
 101 void machine_restart(char *cmd)
 102 {
 103         /* Disable interrupts first */
 104         local_irq_disable();
 105
 106         /*
 107          * Tell the mm system that we are going to reboot -
 108          * we may need it to insert some 1:1 mappings so that
 109          * soft boot works.
 110          */
 111         setup_mm_for_reboot(reboot_mode);
 112
 113         /* Clean and invalidate caches */
 114         flush_cache_all();
 115
 116         /* Turn off caching */
 117         cpu_proc_fin();
 118
 119         /* Push out any further dirty data, and ensure cache is empty */
 120         flush_cache_all();
 121
 122         /*
 123          * Now handle reboot code.
 124          */
 125         if (reboot_mode == 's') {
 126                 /* Jump into ROM at address 0xffff0000 */
 127                 cpu_reset(VECTORS_BASE);
 128         } else {
 129                 writel(0x00002001, PM_PLLSYSCFG); /* cpu clk = 250M */
 130                 writel(0x00100800, PM_PLLDDRCFG); /* ddr clk =  44M */
 131                 writel(0x00002001, PM_PLLVGACFG); /* vga clk = 250M */
 132
 133                 /* Use on-chip reset capability */
 134                 /* following instructions must be in one icache line */
 135                 __asm__ __volatile__(
 136                         "       .align 5\n\t"
 137                         "       stw     %1, [%0]\n\t"
 138                         "201:   ldw     r0, [%0]\n\t"
 139                         "       cmpsub.a        r0, #0\n\t"
 140                         "       bne     201b\n\t"
 141                         "       stw     %3, [%2]\n\t"
 142                         "       nop; nop; nop\n\t"
 143                         /* prefetch 3 instructions at most */
 144                         :
 145                         : "r" (PM_PMCR),
 146                           "r" (PM_PMCR_CFBSYS | PM_PMCR_CFBDDR
 147                                 | PM_PMCR_CFBVGA),
 148                           "r" (RESETC_SWRR),
 149                           "r" (RESETC_SWRR_SRB)
 150                         : "r0", "memory");
 151         }
 152
 153         /*
 154          * Whoops - the architecture was unable to reboot.
 155          * Tell the user!
 156          */
 157         mdelay(1000);
 158         printk(KERN_EMERG "Reboot failed -- System halted\n");
 159         do { } while (1);
 160 }
 161
 162 void __show_regs(struct pt_regs *regs)
 163 {
 164         unsigned long flags;
 165         char buf[64];
 166
 167         printk(KERN_DEFAULT "CPU: %d    %s  (%s %.*s)\n",
 168                 raw_smp_processor_id(), print_tainted(),
 169                 init_utsname()->release,
 170                 (int)strcspn(init_utsname()->version, " "),
 171                 init_utsname()->version);
 172         print_symbol("PC is at %s\n", instruction_pointer(regs));
 173         print_symbol("LR is at %s\n", regs->UCreg_lr);
 174         printk(KERN_DEFAULT "pc : [<%08lx>]    lr : [<%08lx>]    psr: %08lx\n"
 175                "sp : %08lx  ip : %08lx  fp : %08lx\n",
 176                 regs->UCreg_pc, regs->UCreg_lr, regs->UCreg_asr,
 177                 regs->UCreg_sp, regs->UCreg_ip, regs->UCreg_fp);
 178         printk(KERN_DEFAULT "r26: %08lx  r25: %08lx  r24: %08lx\n",
 179                 regs->UCreg_26, regs->UCreg_25,
 180                 regs->UCreg_24);
 181         printk(KERN_DEFAULT "r23: %08lx  r22: %08lx  r21: %08lx  r20: %08lx\n",
 182                 regs->UCreg_23, regs->UCreg_22,
 183                 regs->UCreg_21, regs->UCreg_20);
 184         printk(KERN_DEFAULT "r19: %08lx  r18: %08lx  r17: %08lx  r16: %08lx\n",
 185                 regs->UCreg_19, regs->UCreg_18,
 186                 regs->UCreg_17, regs->UCreg_16);
 187         printk(KERN_DEFAULT "r15: %08lx  r14: %08lx  r13: %08lx  r12: %08lx\n",
 188                 regs->UCreg_15, regs->UCreg_14,
 189                 regs->UCreg_13, regs->UCreg_12);
 190         printk(KERN_DEFAULT "r11: %08lx  r10: %08lx  r9 : %08lx  r8 : %08lx\n",
 191                 regs->UCreg_11, regs->UCreg_10,
 192                 regs->UCreg_09, regs->UCreg_08);
 193         printk(KERN_DEFAULT "r7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
 194                 regs->UCreg_07, regs->UCreg_06,
 195                 regs->UCreg_05, regs->UCreg_04);
 196         printk(KERN_DEFAULT "r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
 197                 regs->UCreg_03, regs->UCreg_02,
 198                 regs->UCreg_01, regs->UCreg_00);
 199
 200         flags = regs->UCreg_asr;
 201         buf[0] = flags & PSR_S_BIT ? 'S' : 's';
 202         buf[1] = flags & PSR_Z_BIT ? 'Z' : 'z';
 203         buf[2] = flags & PSR_C_BIT ? 'C' : 'c';
 204         buf[3] = flags & PSR_V_BIT ? 'V' : 'v';
 205         buf[4] = '\0';
 206
 207         printk(KERN_DEFAULT "Flags: %s  INTR o%s  REAL o%s  Mode %s  Segment %s\n",
 208                 buf, interrupts_enabled(regs) ? "n" : "ff",
 209                 fast_interrupts_enabled(regs) ? "n" : "ff",
 210                 processor_modes[processor_mode(regs)],
 211                 segment_eq(get_fs(), get_ds()) ? "kernel" : "user");
 212         {
 213                 unsigned int ctrl;
 214
 215                 buf[0] = '\0';
 216                 {
 217                         unsigned int transbase;
 218                         asm("movc %0, p0.c2, #0\n"
 219                             : "=r" (transbase));
 220                         snprintf(buf, sizeof(buf), "  Table: %08x", transbase);
 221                 }
 222                 asm("movc %0, p0.c1, #0\n" : "=r" (ctrl));
 223
 224                 printk(KERN_DEFAULT "Control: %08x%s\n", ctrl, buf);
 225         }
 226 }
 227
 228 void show_regs(struct pt_regs *regs)
 229 {
 230         printk(KERN_DEFAULT "\n");
 231         printk(KERN_DEFAULT "Pid: %d, comm: %20s\n",
 232                         task_pid_nr(current), current->comm);
 233         __show_regs(regs);
 234         __backtrace();
 235 }
 236
 237 /*
 238  * Free current thread data structures etc..
 239  */
 240 void exit_thread(void)
 241 {
 242 }
 243
 244 void flush_thread(void)
 245 {
 246         struct thread_info *thread = current_thread_info();
 247         struct task_struct *tsk = current;
 248
 249         memset(thread->used_cp, 0, sizeof(thread->used_cp));
 250         memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
 251 #ifdef CONFIG_UNICORE_FPU_F64
 252         memset(&thread->fpstate, 0, sizeof(struct fp_state));
 253 #endif
 254 }
 255
 256 void release_thread(struct task_struct *dead_task)
 257 {
 258 }
 259
 260 asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
 261 asmlinkage void ret_from_kernel_thread(void) __asm__("ret_from_kernel_thread");
 262
 263 int
 264 copy_thread(unsigned long clone_flags, unsigned long stack_start,
 265             unsigned long stk_sz, struct task_struct *p, struct pt_regs *regs)
 266 {
 267         struct thread_info *thread = task_thread_info(p);
 268         struct pt_regs *childregs = task_pt_regs(p);
 269
 270         memset(&thread->cpu_context, 0, sizeof(struct cpu_context_save));
 271         thread->cpu_context.sp = (unsigned long)childregs;
 272         if (unlikely(!regs)) {
 273                 thread->cpu_context.pc = (unsigned long)ret_from_kernel_thread;
 274                 thread->cpu_context.r4 = stack_start;
 275                 thread->cpu_context.r5 = stk_sz;
 276                 memset(childregs, 0, sizeof(struct pt_regs));
 277         } else {
 278                 thread->cpu_context.pc = (unsigned long)ret_from_fork;
 279                 *childregs = *regs;
 280                 childregs->UCreg_00 = 0;
 281                 childregs->UCreg_sp = stack_start;
 282
 283                 if (clone_flags & CLONE_SETTLS)
 284                         childregs->UCreg_16 = regs->UCreg_03;
 285         }
 286         return 0;
 287 }
 288
 289 /*
 290  * Fill in the task's elfregs structure for a core dump.
 291  */
 292 int dump_task_regs(struct task_struct *t, elf_gregset_t *elfregs)
 293 {
 294         elf_core_copy_regs(elfregs, task_pt_regs(t));
 295         return 1;
 296 }
 297
 298 /*
 299  * fill in the fpe structure for a core dump...
 300  */
 301 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fp)
 302 {
 303         struct thread_info *thread = current_thread_info();
 304         int used_math = thread->used_cp[1] | thread->used_cp[2];
 305
 306 #ifdef CONFIG_UNICORE_FPU_F64
 307         if (used_math)
 308                 memcpy(fp, &thread->fpstate, sizeof(*fp));
 309 #endif
 310         return used_math != 0;
 311 }
 312 EXPORT_SYMBOL(dump_fpu);
 313
 314 unsigned long get_wchan(struct task_struct *p)
 315 {
 316         struct stackframe frame;
 317         int count = 0;
 318         if (!p || p == current || p->state == TASK_RUNNING)
 319                 return 0;
 320
 321         frame.fp = thread_saved_fp(p);
 322         frame.sp = thread_saved_sp(p);
 323         frame.lr = 0;                   /* recovered from the stack */
 324         frame.pc = thread_saved_pc(p);
 325         do {
 326                 int ret = unwind_frame(&frame);
 327                 if (ret < 0)
 328                         return 0;
 329                 if (!in_sched_functions(frame.pc))
 330                         return frame.pc;
 331         } while ((count++) < 16);
 332         return 0;
 333 }
 334
 335 unsigned long arch_randomize_brk(struct mm_struct *mm)
 336 {
 337         unsigned long range_end = mm->brk + 0x02000000;
 338         return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
 339 }
 340
 341 /*
 342  * The vectors page is always readable from user space for the
 343  * atomic helpers and the signal restart code.  Let's declare a mapping
 344  * for it so it is visible through ptrace and /proc/<pid>/mem.
 345  */
 346
 347 int vectors_user_mapping(void)
 348 {
 349         struct mm_struct *mm = current->mm;
 350         return install_special_mapping(mm, 0xffff0000, PAGE_SIZE,
 351                                        VM_READ | VM_EXEC |
 352                                        VM_MAYREAD | VM_MAYEXEC |
 353                                        VM_DONTEXPAND | VM_DONTDUMP,
 354                                        NULL);
 355 }
 356
 357 const char *arch_vma_name(struct vm_area_struct *vma)
 358 {
 359         return (vma->vm_start == 0xffff0000) ? "[vectors]" : NULL;
 360 }