arch/v850/kernel/sim85e2.c

   1 /*
   2  * arch/v850/kernel/sim85e2.c -- Machine-specific stuff for
   3  *      V850E2 RTL simulator
   4  *
   5  *  Copyright (C) 2002,03  NEC Electronics Corporation
   6  *  Copyright (C) 2002,03  Miles Bader <miles@gnu.org>
   7  *
   8  * This file is subject to the terms and conditions of the GNU General
   9  * Public License.  See the file COPYING in the main directory of this
  10  * archive for more details.
  11  *
  12  * Written by Miles Bader <miles@gnu.org>
  13  */
  14
  15 #include <linux/config.h>
  16 #include <linux/kernel.h>
  17 #include <linux/module.h>
  18 #include <linux/init.h>
  19 #include <linux/mm.h>
  20 #include <linux/swap.h>
  21 #include <linux/bootmem.h>
  22 #include <linux/irq.h>
  23
  24 #include <asm/atomic.h>
  25 #include <asm/page.h>
  26 #include <asm/machdep.h>
  27
  28 #include "mach.h"
  29
  30
  31 /* There are 4 possible areas we can use:
  32
  33      IRAM (1MB) is fast for instruction fetches, but slow for data
  34      DRAM (1020KB) is fast for data, but slow for instructions
  35      ERAM is cached, so should be fast for both insns and data
  36      SDRAM is external DRAM, similar to ERAM
  37 */
  38
  39 #define INIT_MEMC_FOR_SDRAM
  40 #define USE_SDRAM_AREA
  41 #define KERNEL_IN_SDRAM_AREA
  42
  43 #define DCACHE_MODE     V850E2_CACHE_BTSC_DCM_WT
  44 /*#define DCACHE_MODE   V850E2_CACHE_BTSC_DCM_WB_ALLOC*/
  45
  46 #ifdef USE_SDRAM_AREA
  47 #define RAM_START       SDRAM_ADDR
  48 #define RAM_END         (SDRAM_ADDR + SDRAM_SIZE)
  49 #else
  50 /* When we use DRAM, we need to account for the fact that the end of it is
  51    used for R0_RAM.  */
  52 #define RAM_START       DRAM_ADDR
  53 #define RAM_END         R0_RAM_ADDR
  54 #endif
  55
  56
  57 extern void memcons_setup (void);
  58
  59
  60 #ifdef KERNEL_IN_SDRAM_AREA
  61 #define EARLY_INIT_SECTION_ATTR __attribute__ ((section (".early.text")))
  62 #else
  63 #define EARLY_INIT_SECTION_ATTR __init
  64 #endif
  65
  66 void EARLY_INIT_SECTION_ATTR mach_early_init (void)
  67 {
  68         /* The sim85e2 simulator tracks `undefined' values, so to make
  69            debugging easier, we begin by zeroing out all otherwise
  70            undefined registers.  This is not strictly necessary.
  71
  72            The registers we zero are:
  73                Every GPR except:
  74                    stack-pointer (r3)
  75                    task-pointer (r16)
  76                    our return addr (r31)
  77                Every system register (SPR) that we know about except for
  78                the PSW (SPR 5), which we zero except for the
  79                disable-interrupts bit.
  80         */
  81
  82         /* GPRs */
  83         asm volatile ("             mov r0, r1 ; mov r0, r2              ");
  84         asm volatile ("mov r0, r4 ; mov r0, r5 ; mov r0, r6 ; mov r0, r7 ");
  85         asm volatile ("mov r0, r8 ; mov r0, r9 ; mov r0, r10; mov r0, r11");
  86         asm volatile ("mov r0, r12; mov r0, r13; mov r0, r14; mov r0, r15");
  87         asm volatile ("             mov r0, r17; mov r0, r18; mov r0, r19");
  88         asm volatile ("mov r0, r20; mov r0, r21; mov r0, r22; mov r0, r23");
  89         asm volatile ("mov r0, r24; mov r0, r25; mov r0, r26; mov r0, r27");
  90         asm volatile ("mov r0, r28; mov r0, r29; mov r0, r30");
  91
  92         /* SPRs */
  93         asm volatile ("ldsr r0, 0;  ldsr r0, 1;  ldsr r0, 2;  ldsr r0, 3");
  94         asm volatile ("ldsr r0, 4");
  95         asm volatile ("addi 0x20, r0, r1; ldsr r1, 5"); /* PSW */
  96         asm volatile ("ldsr r0, 16; ldsr r0, 17; ldsr r0, 18; ldsr r0, 19");
  97         asm volatile ("ldsr r0, 20");
  98
  99
 100 #ifdef INIT_MEMC_FOR_SDRAM
 101         /* Settings for SDRAM controller.  */
 102         V850E2_VSWC   = 0x0042;
 103         V850E2_BSC    = 0x9286;
 104         V850E2_BCT(0) = 0xb000; /* was: 0 */
 105         V850E2_BCT(1) = 0x000b;
 106         V850E2_ASC    = 0;
 107         V850E2_LBS    = 0xa9aa; /* was: 0xaaaa */
 108         V850E2_LBC(0) = 0;
 109         V850E2_LBC(1) = 0;      /* was: 0x3 */
 110         V850E2_BCC    = 0;
 111         V850E2_RFS(4) = 0x800a; /* was: 0xf109 */
 112         V850E2_SCR(4) = 0x2091; /* was: 0x20a1 */
 113         V850E2_RFS(3) = 0x800c;
 114         V850E2_SCR(3) = 0x20a1;
 115         V850E2_DWC(0) = 0;
 116         V850E2_DWC(1) = 0;
 117 #endif
 118
 119 #if 0
 120 #ifdef CONFIG_V850E2_SIM85E2S
 121         /* Turn on the caches.  */
 122         V850E2_CACHE_BTSC = V850E2_CACHE_BTSC_ICM | DCACHE_MODE;
 123         V850E2_BHC  = 0x1010;
 124 #elif CONFIG_V850E2_SIM85E2C
 125         V850E2_CACHE_BTSC |= (V850E2_CACHE_BTSC_ICM | V850E2_CACHE_BTSC_DCM0);
 126         V850E2_BUSM_BHC = 0xFFFF;
 127 #endif
 128 #else
 129         V850E2_BHC  = 0;
 130 #endif
 131
 132         /* Don't stop the simulator at `halt' instructions.  */
 133         SIM85E2_NOTHAL = 1;
 134
 135         /* Ensure that the simulator halts on a panic, instead of going
 136            into an infinite loop inside the panic function.  */
 137         panic_timeout = -1;
 138 }
 139
 140 void __init mach_setup (char **cmdline)
 141 {
 142         memcons_setup ();
 143 }
 144
 145 void mach_get_physical_ram (unsigned long *ram_start, unsigned long *ram_len)
 146 {
 147         *ram_start = RAM_START;
 148         *ram_len = RAM_END - RAM_START;
 149 }
 150
 151 void __init mach_sched_init (struct irqaction *timer_action)
 152 {
 153         /* The simulator actually cycles through all interrupts
 154            periodically.  We just pay attention to IRQ0, which gives us
 155            1/64 the rate of the periodic interrupts.  */
 156         setup_irq (0, timer_action);
 157 }
 158
 159 void mach_gettimeofday (struct timespec *tv)
 160 {
 161         tv->tv_sec = 0;
 162         tv->tv_nsec = 0;
 163 }
 164 \f
 165 /* Interrupts */
 166
 167 struct v850e_intc_irq_init irq_inits[] = {
 168         { "IRQ", 0, NUM_MACH_IRQS, 1, 7 },
 169         { 0 }
 170 };
 171 struct hw_interrupt_type hw_itypes[1];
 172
 173 /* Initialize interrupts.  */
 174 void __init mach_init_irqs (void)
 175 {
 176         v850e_intc_init_irq_types (irq_inits, hw_itypes);
 177 }
 178 \f
 179
 180 void machine_halt (void) __attribute__ ((noreturn));
 181 void machine_halt (void)
 182 {
 183         SIM85E2_SIMFIN = 0;     /* Halt immediately.  */
 184         for (;;) {}
 185 }
 186
 187 void machine_restart (char *__unused)
 188 {
 189         machine_halt ();
 190 }
 191
 192 void machine_power_off (void)
 193 {
 194         machine_halt ();
 195 }
 196