1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/arch/x86_64/entry.S
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
7 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
9 * entry.S contains the system-call and fault low-level handling routines.
11 * Some of this is documented in Documentation/x86/entry_64.txt
13 * A note on terminology:
14 * - iret frame: Architecture defined interrupt frame from SS to RIP
15 * at the top of the kernel process stack.
18 * - ENTRY/END: Define functions in the symbol table.
19 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
20 * - idtentry: Define exception entry points.
22 #include <linux/linkage.h>
23 #include <asm/segment.h>
24 #include <asm/cache.h>
25 #include <asm/errno.h>
27 #include <asm/asm-offsets.h>
29 #include <asm/unistd.h>
30 #include <asm/thread_info.h>
31 #include <asm/hw_irq.h>
32 #include <asm/page_types.h>
33 #include <asm/irqflags.h>
34 #include <asm/paravirt.h>
35 #include <asm/percpu.h>
38 #include <asm/pgtable_types.h>
39 #include <asm/export.h>
40 #include <asm/frame.h>
41 #include <linux/err.h>
44 .section .entry.text, "ax"
46 #ifdef CONFIG_PARAVIRT
47 ENTRY(native_usergs_sysret64)
51 END(native_usergs_sysret64)
52 #endif /* CONFIG_PARAVIRT */
54 .macro TRACE_IRQS_IRETQ
55 #ifdef CONFIG_TRACE_IRQFLAGS
56 bt $9, EFLAGS(%rsp) /* interrupts off? */
64 * When dynamic function tracer is enabled it will add a breakpoint
65 * to all locations that it is about to modify, sync CPUs, update
66 * all the code, sync CPUs, then remove the breakpoints. In this time
67 * if lockdep is enabled, it might jump back into the debug handler
68 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
70 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
71 * make sure the stack pointer does not get reset back to the top
72 * of the debug stack, and instead just reuses the current stack.
74 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
76 .macro TRACE_IRQS_OFF_DEBUG
77 call debug_stack_set_zero
79 call debug_stack_reset
82 .macro TRACE_IRQS_ON_DEBUG
83 call debug_stack_set_zero
85 call debug_stack_reset
88 .macro TRACE_IRQS_IRETQ_DEBUG
89 bt $9, EFLAGS(%rsp) /* interrupts off? */
96 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
97 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
98 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
102 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
104 * This is the only entry point used for 64-bit system calls. The
105 * hardware interface is reasonably well designed and the register to
106 * argument mapping Linux uses fits well with the registers that are
107 * available when SYSCALL is used.
109 * SYSCALL instructions can be found inlined in libc implementations as
110 * well as some other programs and libraries. There are also a handful
111 * of SYSCALL instructions in the vDSO used, for example, as a
112 * clock_gettimeofday fallback.
114 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
115 * then loads new ss, cs, and rip from previously programmed MSRs.
116 * rflags gets masked by a value from another MSR (so CLD and CLAC
117 * are not needed). SYSCALL does not save anything on the stack
118 * and does not change rsp.
120 * Registers on entry:
121 * rax system call number
123 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
127 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
130 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
132 * Only called from user space.
134 * When user can change pt_regs->foo always force IRET. That is because
135 * it deals with uncanonical addresses better. SYSRET has trouble
136 * with them due to bugs in both AMD and Intel CPUs.
139 ENTRY(entry_SYSCALL_64)
142 * Interrupts are off on entry.
143 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
144 * it is too small to ever cause noticeable irq latency.
148 movq %rsp, PER_CPU_VAR(rsp_scratch)
149 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
153 /* Construct struct pt_regs on stack */
154 pushq $__USER_DS /* pt_regs->ss */
155 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
156 pushq %r11 /* pt_regs->flags */
157 pushq $__USER_CS /* pt_regs->cs */
158 pushq %rcx /* pt_regs->ip */
159 GLOBAL(entry_SYSCALL_64_after_hwframe)
160 pushq %rax /* pt_regs->orig_ax */
161 pushq %rdi /* pt_regs->di */
162 pushq %rsi /* pt_regs->si */
163 pushq %rdx /* pt_regs->dx */
164 pushq %rcx /* pt_regs->cx */
165 pushq $-ENOSYS /* pt_regs->ax */
166 pushq %r8 /* pt_regs->r8 */
167 pushq %r9 /* pt_regs->r9 */
168 pushq %r10 /* pt_regs->r10 */
169 pushq %r11 /* pt_regs->r11 */
170 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
171 UNWIND_HINT_REGS extra=0
174 * If we need to do entry work or if we guess we'll need to do
175 * exit work, go straight to the slow path.
177 movq PER_CPU_VAR(current_task), %r11
178 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
179 jnz entry_SYSCALL64_slow_path
181 entry_SYSCALL_64_fastpath:
183 * Easy case: enable interrupts and issue the syscall. If the syscall
184 * needs pt_regs, we'll call a stub that disables interrupts again
185 * and jumps to the slow path.
188 ENABLE_INTERRUPTS(CLBR_NONE)
189 #if __SYSCALL_MASK == ~0
190 cmpq $__NR_syscall_max, %rax
192 andl $__SYSCALL_MASK, %eax
193 cmpl $__NR_syscall_max, %eax
195 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
199 * This call instruction is handled specially in stub_ptregs_64.
200 * It might end up jumping to the slow path. If it jumps, RAX
201 * and all argument registers are clobbered.
203 call *sys_call_table(, %rax, 8)
204 .Lentry_SYSCALL_64_after_fastpath_call:
210 * If we get here, then we know that pt_regs is clean for SYSRET64.
211 * If we see that no exit work is required (which we are required
212 * to check with IRQs off), then we can go straight to SYSRET64.
214 DISABLE_INTERRUPTS(CLBR_ANY)
216 movq PER_CPU_VAR(current_task), %r11
217 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
221 TRACE_IRQS_ON /* user mode is traced as IRQs on */
223 movq EFLAGS(%rsp), %r11
224 addq $6*8, %rsp /* skip extra regs -- they were preserved */
226 jmp .Lpop_c_regs_except_rcx_r11_and_sysret
230 * The fast path looked good when we started, but something changed
231 * along the way and we need to switch to the slow path. Calling
232 * raise(3) will trigger this, for example. IRQs are off.
235 ENABLE_INTERRUPTS(CLBR_ANY)
238 call syscall_return_slowpath /* returns with IRQs disabled */
239 jmp return_from_SYSCALL_64
241 entry_SYSCALL64_slow_path:
245 call do_syscall_64 /* returns with IRQs disabled */
247 return_from_SYSCALL_64:
248 TRACE_IRQS_IRETQ /* we're about to change IF */
251 * Try to use SYSRET instead of IRET if we're returning to
252 * a completely clean 64-bit userspace context. If we're not,
253 * go to the slow exit path.
258 cmpq %rcx, %r11 /* SYSRET requires RCX == RIP */
259 jne swapgs_restore_regs_and_return_to_usermode
262 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
263 * in kernel space. This essentially lets the user take over
264 * the kernel, since userspace controls RSP.
266 * If width of "canonical tail" ever becomes variable, this will need
267 * to be updated to remain correct on both old and new CPUs.
269 * Change top bits to match most significant bit (47th or 56th bit
270 * depending on paging mode) in the address.
272 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
273 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
275 /* If this changed %rcx, it was not canonical */
277 jne swapgs_restore_regs_and_return_to_usermode
279 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
280 jne swapgs_restore_regs_and_return_to_usermode
283 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
284 jne swapgs_restore_regs_and_return_to_usermode
287 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
288 * restore RF properly. If the slowpath sets it for whatever reason, we
289 * need to restore it correctly.
291 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
292 * trap from userspace immediately after SYSRET. This would cause an
293 * infinite loop whenever #DB happens with register state that satisfies
294 * the opportunistic SYSRET conditions. For example, single-stepping
297 * movq $stuck_here, %rcx
302 * would never get past 'stuck_here'.
304 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
305 jnz swapgs_restore_regs_and_return_to_usermode
307 /* nothing to check for RSP */
309 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
310 jne swapgs_restore_regs_and_return_to_usermode
313 * We win! This label is here just for ease of understanding
314 * perf profiles. Nothing jumps here.
316 syscall_return_via_sysret:
317 /* rcx and r11 are already restored (see code above) */
320 .Lpop_c_regs_except_rcx_r11_and_sysret:
321 popq %rsi /* skip r11 */
326 popq %rsi /* skip rcx */
331 * Now all regs are restored except RSP and RDI.
332 * Save old stack pointer and switch to trampoline stack.
335 movq PER_CPU_VAR(cpu_tss + TSS_sp0), %rsp
337 pushq RSP-RDI(%rdi) /* RSP */
338 pushq (%rdi) /* RDI */
341 * We are on the trampoline stack. All regs except RDI are live.
342 * We can do future final exit work right here.
348 END(entry_SYSCALL_64)
350 ENTRY(stub_ptregs_64)
352 * Syscalls marked as needing ptregs land here.
353 * If we are on the fast path, we need to save the extra regs,
354 * which we achieve by trying again on the slow path. If we are on
355 * the slow path, the extra regs are already saved.
357 * RAX stores a pointer to the C function implementing the syscall.
360 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
364 * Called from fast path -- disable IRQs again, pop return address
365 * and jump to slow path
367 DISABLE_INTERRUPTS(CLBR_ANY)
370 UNWIND_HINT_REGS extra=0
371 jmp entry_SYSCALL64_slow_path
374 jmp *%rax /* Called from C */
377 .macro ptregs_stub func
380 leaq \func(%rip), %rax
385 /* Instantiate ptregs_stub for each ptregs-using syscall */
386 #define __SYSCALL_64_QUAL_(sym)
387 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
388 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
389 #include <asm/syscalls_64.h>
395 ENTRY(__switch_to_asm)
398 * Save callee-saved registers
399 * This must match the order in inactive_task_frame
409 movq %rsp, TASK_threadsp(%rdi)
410 movq TASK_threadsp(%rsi), %rsp
412 #ifdef CONFIG_CC_STACKPROTECTOR
413 movq TASK_stack_canary(%rsi), %rbx
414 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
417 /* restore callee-saved registers */
429 * A newly forked process directly context switches into this address.
431 * rax: prev task we switched from
432 * rbx: kernel thread func (NULL for user thread)
433 * r12: kernel thread arg
438 call schedule_tail /* rdi: 'prev' task parameter */
440 testq %rbx, %rbx /* from kernel_thread? */
441 jnz 1f /* kernel threads are uncommon */
446 call syscall_return_slowpath /* returns with IRQs disabled */
447 TRACE_IRQS_ON /* user mode is traced as IRQS on */
448 jmp swapgs_restore_regs_and_return_to_usermode
455 * A kernel thread is allowed to return here after successfully
456 * calling do_execve(). Exit to userspace to complete the execve()
464 * Build the entry stubs with some assembler magic.
465 * We pack 1 stub into every 8-byte block.
468 ENTRY(irq_entries_start)
469 vector=FIRST_EXTERNAL_VECTOR
470 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
471 UNWIND_HINT_IRET_REGS
472 pushq $(~vector+0x80) /* Note: always in signed byte range */
477 END(irq_entries_start)
479 .macro DEBUG_ENTRY_ASSERT_IRQS_OFF
480 #ifdef CONFIG_DEBUG_ENTRY
483 testl $X86_EFLAGS_IF, %eax
492 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers
493 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone.
494 * Requires kernel GSBASE.
496 * The invariant is that, if irq_count != -1, then the IRQ stack is in use.
498 .macro ENTER_IRQ_STACK regs=1 old_rsp
499 DEBUG_ENTRY_ASSERT_IRQS_OFF
503 UNWIND_HINT_REGS base=\old_rsp
506 incl PER_CPU_VAR(irq_count)
507 jnz .Lirq_stack_push_old_rsp_\@
510 * Right now, if we just incremented irq_count to zero, we've
511 * claimed the IRQ stack but we haven't switched to it yet.
513 * If anything is added that can interrupt us here without using IST,
514 * it must be *extremely* careful to limit its stack usage. This
515 * could include kprobes and a hypothetical future IST-less #DB
518 * The OOPS unwinder relies on the word at the top of the IRQ
519 * stack linking back to the previous RSP for the entire time we're
520 * on the IRQ stack. For this to work reliably, we need to write
521 * it before we actually move ourselves to the IRQ stack.
524 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8)
525 movq PER_CPU_VAR(irq_stack_ptr), %rsp
527 #ifdef CONFIG_DEBUG_ENTRY
529 * If the first movq above becomes wrong due to IRQ stack layout
530 * changes, the only way we'll notice is if we try to unwind right
531 * here. Assert that we set up the stack right to catch this type
534 cmpq -8(%rsp), \old_rsp
535 je .Lirq_stack_okay\@
540 .Lirq_stack_push_old_rsp_\@:
544 UNWIND_HINT_REGS indirect=1
549 * Undoes ENTER_IRQ_STACK.
551 .macro LEAVE_IRQ_STACK regs=1
552 DEBUG_ENTRY_ASSERT_IRQS_OFF
553 /* We need to be off the IRQ stack before decrementing irq_count. */
561 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming
562 * the irq stack but we're not on it.
565 decl PER_CPU_VAR(irq_count)
569 * Interrupt entry/exit.
571 * Interrupt entry points save only callee clobbered registers in fast path.
573 * Entry runs with interrupts off.
576 /* 0(%rsp): ~(interrupt number) */
577 .macro interrupt func
580 testb $3, CS-ORIG_RAX(%rsp)
583 call switch_to_thread_stack
586 ALLOC_PT_GPREGS_ON_STACK
595 * IRQ from user mode.
597 * We need to tell lockdep that IRQs are off. We can't do this until
598 * we fix gsbase, and we should do it before enter_from_user_mode
599 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
600 * the simplest way to handle it is to just call it twice if
601 * we enter from user mode. There's no reason to optimize this since
602 * TRACE_IRQS_OFF is a no-op if lockdep is off.
606 CALL_enter_from_user_mode
609 ENTER_IRQ_STACK old_rsp=%rdi
610 /* We entered an interrupt context - irqs are off: */
613 call \func /* rdi points to pt_regs */
617 * The interrupt stubs push (~vector+0x80) onto the stack and
618 * then jump to common_interrupt.
620 .p2align CONFIG_X86_L1_CACHE_SHIFT
623 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
625 /* 0(%rsp): old RSP */
627 DISABLE_INTERRUPTS(CLBR_ANY)
635 /* Interrupt came from user space */
638 call prepare_exit_to_usermode
641 GLOBAL(swapgs_restore_regs_and_return_to_usermode)
642 #ifdef CONFIG_DEBUG_ENTRY
643 /* Assert that pt_regs indicates user mode. */
660 * The stack is now user RDI, orig_ax, RIP, CS, EFLAGS, RSP, SS.
661 * Save old stack pointer and switch to trampoline stack.
664 movq PER_CPU_VAR(cpu_tss + TSS_sp0), %rsp
666 /* Copy the IRET frame to the trampoline stack. */
667 pushq 6*8(%rdi) /* SS */
668 pushq 5*8(%rdi) /* RSP */
669 pushq 4*8(%rdi) /* EFLAGS */
670 pushq 3*8(%rdi) /* CS */
671 pushq 2*8(%rdi) /* RIP */
673 /* Push user RDI on the trampoline stack. */
677 * We are on the trampoline stack. All regs except RDI are live.
678 * We can do future final exit work right here.
687 /* Returning to kernel space */
689 #ifdef CONFIG_PREEMPT
690 /* Interrupts are off */
691 /* Check if we need preemption */
692 bt $9, EFLAGS(%rsp) /* were interrupts off? */
694 0: cmpl $0, PER_CPU_VAR(__preempt_count)
696 call preempt_schedule_irq
701 * The iretq could re-enable interrupts:
705 GLOBAL(restore_regs_and_return_to_kernel)
706 #ifdef CONFIG_DEBUG_ENTRY
707 /* Assert that pt_regs indicates kernel mode. */
715 addq $8, %rsp /* skip regs->orig_ax */
719 UNWIND_HINT_IRET_REGS
721 * Are we returning to a stack segment from the LDT? Note: in
722 * 64-bit mode SS:RSP on the exception stack is always valid.
724 #ifdef CONFIG_X86_ESPFIX64
725 testb $4, (SS-RIP)(%rsp)
726 jnz native_irq_return_ldt
729 .global native_irq_return_iret
730 native_irq_return_iret:
732 * This may fault. Non-paranoid faults on return to userspace are
733 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
734 * Double-faults due to espfix64 are handled in do_double_fault.
735 * Other faults here are fatal.
739 #ifdef CONFIG_X86_ESPFIX64
740 native_irq_return_ldt:
742 * We are running with user GSBASE. All GPRs contain their user
743 * values. We have a percpu ESPFIX stack that is eight slots
744 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
745 * of the ESPFIX stack.
747 * We clobber RAX and RDI in this code. We stash RDI on the
748 * normal stack and RAX on the ESPFIX stack.
750 * The ESPFIX stack layout we set up looks like this:
752 * --- top of ESPFIX stack ---
757 * RIP <-- RSP points here when we're done
758 * RAX <-- espfix_waddr points here
759 * --- bottom of ESPFIX stack ---
762 pushq %rdi /* Stash user RDI */
764 movq PER_CPU_VAR(espfix_waddr), %rdi
765 movq %rax, (0*8)(%rdi) /* user RAX */
766 movq (1*8)(%rsp), %rax /* user RIP */
767 movq %rax, (1*8)(%rdi)
768 movq (2*8)(%rsp), %rax /* user CS */
769 movq %rax, (2*8)(%rdi)
770 movq (3*8)(%rsp), %rax /* user RFLAGS */
771 movq %rax, (3*8)(%rdi)
772 movq (5*8)(%rsp), %rax /* user SS */
773 movq %rax, (5*8)(%rdi)
774 movq (4*8)(%rsp), %rax /* user RSP */
775 movq %rax, (4*8)(%rdi)
776 /* Now RAX == RSP. */
778 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
779 popq %rdi /* Restore user RDI */
782 * espfix_stack[31:16] == 0. The page tables are set up such that
783 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
784 * espfix_waddr for any X. That is, there are 65536 RO aliases of
785 * the same page. Set up RSP so that RSP[31:16] contains the
786 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
787 * still points to an RO alias of the ESPFIX stack.
789 orq PER_CPU_VAR(espfix_stack), %rax
792 UNWIND_HINT_IRET_REGS offset=8
795 * At this point, we cannot write to the stack any more, but we can
798 popq %rax /* Restore user RAX */
801 * RSP now points to an ordinary IRET frame, except that the page
802 * is read-only and RSP[31:16] are preloaded with the userspace
803 * values. We can now IRET back to userspace.
805 jmp native_irq_return_iret
807 END(common_interrupt)
812 .macro apicinterrupt3 num sym do_sym
814 UNWIND_HINT_IRET_REGS
823 /* Make sure APIC interrupt handlers end up in the irqentry section: */
824 #define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
825 #define POP_SECTION_IRQENTRY .popsection
827 .macro apicinterrupt num sym do_sym
828 PUSH_SECTION_IRQENTRY
829 apicinterrupt3 \num \sym \do_sym
834 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
835 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
839 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
842 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
843 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
845 #ifdef CONFIG_HAVE_KVM
846 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
847 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
848 apicinterrupt3 POSTED_INTR_NESTED_VECTOR kvm_posted_intr_nested_ipi smp_kvm_posted_intr_nested_ipi
851 #ifdef CONFIG_X86_MCE_THRESHOLD
852 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
855 #ifdef CONFIG_X86_MCE_AMD
856 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
859 #ifdef CONFIG_X86_THERMAL_VECTOR
860 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
864 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
865 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
866 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
869 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
870 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
872 #ifdef CONFIG_IRQ_WORK
873 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
877 * Exception entry points.
879 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
882 * Switch to the thread stack. This is called with the IRET frame and
883 * orig_ax on the stack. (That is, RDI..R12 are not on the stack and
884 * space has not been allocated for them.)
886 ENTRY(switch_to_thread_stack)
891 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
892 UNWIND_HINT sp_offset=16 sp_reg=ORC_REG_DI
894 pushq 7*8(%rdi) /* regs->ss */
895 pushq 6*8(%rdi) /* regs->rsp */
896 pushq 5*8(%rdi) /* regs->eflags */
897 pushq 4*8(%rdi) /* regs->cs */
898 pushq 3*8(%rdi) /* regs->ip */
899 pushq 2*8(%rdi) /* regs->orig_ax */
900 pushq 8(%rdi) /* return address */
905 END(switch_to_thread_stack)
907 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
909 UNWIND_HINT_IRET_REGS offset=\has_error_code*8
912 .if \shift_ist != -1 && \paranoid == 0
913 .error "using shift_ist requires paranoid=1"
918 .if \has_error_code == 0
919 pushq $-1 /* ORIG_RAX: no syscall to restart */
922 ALLOC_PT_GPREGS_ON_STACK
925 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
926 jnz .Lfrom_usermode_switch_stack_\@
935 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
939 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
945 movq %rsp, %rdi /* pt_regs pointer */
948 movq ORIG_RAX(%rsp), %rsi /* get error code */
949 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
951 xorl %esi, %esi /* no error code */
955 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
961 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
964 /* these procedures expect "no swapgs" flag in ebx */
973 * Entry from userspace. Switch stacks and treat it
974 * as a normal entry. This means that paranoid handlers
975 * run in real process context if user_mode(regs).
977 .Lfrom_usermode_switch_stack_\@:
980 movq %rsp, %rdi /* pt_regs pointer */
983 movq ORIG_RAX(%rsp), %rsi /* get error code */
984 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
986 xorl %esi, %esi /* no error code */
991 jmp error_exit /* %ebx: no swapgs flag */
996 idtentry divide_error do_divide_error has_error_code=0
997 idtentry overflow do_overflow has_error_code=0
998 idtentry bounds do_bounds has_error_code=0
999 idtentry invalid_op do_invalid_op has_error_code=0
1000 idtentry device_not_available do_device_not_available has_error_code=0
1001 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1002 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1003 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1004 idtentry segment_not_present do_segment_not_present has_error_code=1
1005 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1006 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1007 idtentry alignment_check do_alignment_check has_error_code=1
1008 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1012 * Reload gs selector with exception handling
1015 ENTRY(native_load_gs_index)
1018 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1022 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
1027 ENDPROC(native_load_gs_index)
1028 EXPORT_SYMBOL(native_load_gs_index)
1030 _ASM_EXTABLE(.Lgs_change, bad_gs)
1031 .section .fixup, "ax"
1032 /* running with kernelgs */
1034 SWAPGS /* switch back to user gs */
1036 /* This can't be a string because the preprocessor needs to see it. */
1037 movl $__USER_DS, %eax
1040 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
1046 /* Call softirq on interrupt stack. Interrupts are off. */
1047 ENTRY(do_softirq_own_stack)
1050 ENTER_IRQ_STACK regs=0 old_rsp=%r11
1052 LEAVE_IRQ_STACK regs=0
1055 ENDPROC(do_softirq_own_stack)
1058 idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1061 * A note on the "critical region" in our callback handler.
1062 * We want to avoid stacking callback handlers due to events occurring
1063 * during handling of the last event. To do this, we keep events disabled
1064 * until we've done all processing. HOWEVER, we must enable events before
1065 * popping the stack frame (can't be done atomically) and so it would still
1066 * be possible to get enough handler activations to overflow the stack.
1067 * Although unlikely, bugs of that kind are hard to track down, so we'd
1068 * like to avoid the possibility.
1069 * So, on entry to the handler we detect whether we interrupted an
1070 * existing activation in its critical region -- if so, we pop the current
1071 * activation and restart the handler using the previous one.
1073 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
1076 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1077 * see the correct pointer to the pt_regs
1080 movq %rdi, %rsp /* we don't return, adjust the stack frame */
1083 ENTER_IRQ_STACK old_rsp=%r10
1084 call xen_evtchn_do_upcall
1087 #ifndef CONFIG_PREEMPT
1088 call xen_maybe_preempt_hcall
1091 END(xen_do_hypervisor_callback)
1094 * Hypervisor uses this for application faults while it executes.
1095 * We get here for two reasons:
1096 * 1. Fault while reloading DS, ES, FS or GS
1097 * 2. Fault while executing IRET
1098 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1099 * registers that could be reloaded and zeroed the others.
1100 * Category 2 we fix up by killing the current process. We cannot use the
1101 * normal Linux return path in this case because if we use the IRET hypercall
1102 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1103 * We distinguish between categories by comparing each saved segment register
1104 * with its current contents: any discrepancy means we in category 1.
1106 ENTRY(xen_failsafe_callback)
1109 cmpw %cx, 0x10(%rsp)
1112 cmpw %cx, 0x18(%rsp)
1115 cmpw %cx, 0x20(%rsp)
1118 cmpw %cx, 0x28(%rsp)
1120 /* All segments match their saved values => Category 2 (Bad IRET). */
1125 UNWIND_HINT_IRET_REGS offset=8
1126 jmp general_protection
1127 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1131 UNWIND_HINT_IRET_REGS
1132 pushq $-1 /* orig_ax = -1 => not a system call */
1133 ALLOC_PT_GPREGS_ON_STACK
1136 ENCODE_FRAME_POINTER
1138 END(xen_failsafe_callback)
1140 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1141 xen_hvm_callback_vector xen_evtchn_do_upcall
1143 #endif /* CONFIG_XEN */
1145 #if IS_ENABLED(CONFIG_HYPERV)
1146 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1147 hyperv_callback_vector hyperv_vector_handler
1148 #endif /* CONFIG_HYPERV */
1150 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1151 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1152 idtentry stack_segment do_stack_segment has_error_code=1
1155 idtentry xennmi do_nmi has_error_code=0
1156 idtentry xendebug do_debug has_error_code=0
1157 idtentry xenint3 do_int3 has_error_code=0
1160 idtentry general_protection do_general_protection has_error_code=1
1161 idtentry page_fault do_page_fault has_error_code=1
1163 #ifdef CONFIG_KVM_GUEST
1164 idtentry async_page_fault do_async_page_fault has_error_code=1
1167 #ifdef CONFIG_X86_MCE
1168 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1172 * Save all registers in pt_regs, and switch gs if needed.
1173 * Use slow, but surefire "are we in kernel?" check.
1174 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1176 ENTRY(paranoid_entry)
1181 ENCODE_FRAME_POINTER 8
1183 movl $MSR_GS_BASE, %ecx
1186 js 1f /* negative -> in kernel */
1193 * "Paranoid" exit path from exception stack. This is invoked
1194 * only on return from non-NMI IST interrupts that came
1195 * from kernel space.
1197 * We may be returning to very strange contexts (e.g. very early
1198 * in syscall entry), so checking for preemption here would
1199 * be complicated. Fortunately, we there's no good reason
1200 * to try to handle preemption here.
1202 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1204 ENTRY(paranoid_exit)
1206 DISABLE_INTERRUPTS(CLBR_ANY)
1207 TRACE_IRQS_OFF_DEBUG
1208 testl %ebx, %ebx /* swapgs needed? */
1209 jnz .Lparanoid_exit_no_swapgs
1212 jmp .Lparanoid_exit_restore
1213 .Lparanoid_exit_no_swapgs:
1214 TRACE_IRQS_IRETQ_DEBUG
1215 .Lparanoid_exit_restore:
1216 jmp restore_regs_and_return_to_kernel
1220 * Save all registers in pt_regs, and switch gs if needed.
1221 * Return: EBX=0: came from user mode; EBX=1: otherwise
1228 ENCODE_FRAME_POINTER 8
1230 testb $3, CS+8(%rsp)
1231 jz .Lerror_kernelspace
1234 * We entered from user mode or we're pretending to have entered
1235 * from user mode due to an IRET fault.
1239 .Lerror_entry_from_usermode_after_swapgs:
1240 /* Put us onto the real thread stack. */
1241 popq %r12 /* save return addr in %12 */
1242 movq %rsp, %rdi /* arg0 = pt_regs pointer */
1244 movq %rax, %rsp /* switch stack */
1245 ENCODE_FRAME_POINTER
1249 * We need to tell lockdep that IRQs are off. We can't do this until
1250 * we fix gsbase, and we should do it before enter_from_user_mode
1251 * (which can take locks).
1254 CALL_enter_from_user_mode
1262 * There are two places in the kernel that can potentially fault with
1263 * usergs. Handle them here. B stepping K8s sometimes report a
1264 * truncated RIP for IRET exceptions returning to compat mode. Check
1265 * for these here too.
1267 .Lerror_kernelspace:
1269 leaq native_irq_return_iret(%rip), %rcx
1270 cmpq %rcx, RIP+8(%rsp)
1272 movl %ecx, %eax /* zero extend */
1273 cmpq %rax, RIP+8(%rsp)
1275 cmpq $.Lgs_change, RIP+8(%rsp)
1276 jne .Lerror_entry_done
1279 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1280 * gsbase and proceed. We'll fix up the exception and land in
1281 * .Lgs_change's error handler with kernel gsbase.
1284 jmp .Lerror_entry_done
1287 /* Fix truncated RIP */
1288 movq %rcx, RIP+8(%rsp)
1293 * We came from an IRET to user mode, so we have user gsbase.
1294 * Switch to kernel gsbase:
1299 * Pretend that the exception came from user mode: set up pt_regs
1300 * as if we faulted immediately after IRET and clear EBX so that
1301 * error_exit knows that we will be returning to user mode.
1307 jmp .Lerror_entry_from_usermode_after_swapgs
1312 * On entry, EBX is a "return to kernel mode" flag:
1313 * 1: already in kernel mode, don't need SWAPGS
1314 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1318 DISABLE_INTERRUPTS(CLBR_ANY)
1326 * Runs on exception stack. Xen PV does not go through this path at all,
1327 * so we can use real assembly here.
1330 UNWIND_HINT_IRET_REGS
1333 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1334 * the iretq it performs will take us out of NMI context.
1335 * This means that we can have nested NMIs where the next
1336 * NMI is using the top of the stack of the previous NMI. We
1337 * can't let it execute because the nested NMI will corrupt the
1338 * stack of the previous NMI. NMI handlers are not re-entrant
1341 * To handle this case we do the following:
1342 * Check the a special location on the stack that contains
1343 * a variable that is set when NMIs are executing.
1344 * The interrupted task's stack is also checked to see if it
1346 * If the variable is not set and the stack is not the NMI
1348 * o Set the special variable on the stack
1349 * o Copy the interrupt frame into an "outermost" location on the
1351 * o Copy the interrupt frame into an "iret" location on the stack
1352 * o Continue processing the NMI
1353 * If the variable is set or the previous stack is the NMI stack:
1354 * o Modify the "iret" location to jump to the repeat_nmi
1355 * o return back to the first NMI
1357 * Now on exit of the first NMI, we first clear the stack variable
1358 * The NMI stack will tell any nested NMIs at that point that it is
1359 * nested. Then we pop the stack normally with iret, and if there was
1360 * a nested NMI that updated the copy interrupt stack frame, a
1361 * jump will be made to the repeat_nmi code that will handle the second
1364 * However, espfix prevents us from directly returning to userspace
1365 * with a single IRET instruction. Similarly, IRET to user mode
1366 * can fault. We therefore handle NMIs from user space like
1367 * other IST entries.
1372 /* Use %rdx as our temp variable throughout */
1375 testb $3, CS-RIP+8(%rsp)
1376 jz .Lnmi_from_kernel
1379 * NMI from user mode. We need to run on the thread stack, but we
1380 * can't go through the normal entry paths: NMIs are masked, and
1381 * we don't want to enable interrupts, because then we'll end
1382 * up in an awkward situation in which IRQs are on but NMIs
1385 * We also must not push anything to the stack before switching
1386 * stacks lest we corrupt the "NMI executing" variable.
1392 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1393 UNWIND_HINT_IRET_REGS base=%rdx offset=8
1394 pushq 5*8(%rdx) /* pt_regs->ss */
1395 pushq 4*8(%rdx) /* pt_regs->rsp */
1396 pushq 3*8(%rdx) /* pt_regs->flags */
1397 pushq 2*8(%rdx) /* pt_regs->cs */
1398 pushq 1*8(%rdx) /* pt_regs->rip */
1399 UNWIND_HINT_IRET_REGS
1400 pushq $-1 /* pt_regs->orig_ax */
1401 pushq %rdi /* pt_regs->di */
1402 pushq %rsi /* pt_regs->si */
1403 pushq (%rdx) /* pt_regs->dx */
1404 pushq %rcx /* pt_regs->cx */
1405 pushq %rax /* pt_regs->ax */
1406 pushq %r8 /* pt_regs->r8 */
1407 pushq %r9 /* pt_regs->r9 */
1408 pushq %r10 /* pt_regs->r10 */
1409 pushq %r11 /* pt_regs->r11 */
1410 pushq %rbx /* pt_regs->rbx */
1411 pushq %rbp /* pt_regs->rbp */
1412 pushq %r12 /* pt_regs->r12 */
1413 pushq %r13 /* pt_regs->r13 */
1414 pushq %r14 /* pt_regs->r14 */
1415 pushq %r15 /* pt_regs->r15 */
1417 ENCODE_FRAME_POINTER
1420 * At this point we no longer need to worry about stack damage
1421 * due to nesting -- we're on the normal thread stack and we're
1422 * done with the NMI stack.
1430 * Return back to user mode. We must *not* do the normal exit
1431 * work, because we don't want to enable interrupts.
1433 jmp swapgs_restore_regs_and_return_to_usermode
1437 * Here's what our stack frame will look like:
1438 * +---------------------------------------------------------+
1440 * | original Return RSP |
1441 * | original RFLAGS |
1444 * +---------------------------------------------------------+
1445 * | temp storage for rdx |
1446 * +---------------------------------------------------------+
1447 * | "NMI executing" variable |
1448 * +---------------------------------------------------------+
1449 * | iret SS } Copied from "outermost" frame |
1450 * | iret Return RSP } on each loop iteration; overwritten |
1451 * | iret RFLAGS } by a nested NMI to force another |
1452 * | iret CS } iteration if needed. |
1454 * +---------------------------------------------------------+
1455 * | outermost SS } initialized in first_nmi; |
1456 * | outermost Return RSP } will not be changed before |
1457 * | outermost RFLAGS } NMI processing is done. |
1458 * | outermost CS } Copied to "iret" frame on each |
1459 * | outermost RIP } iteration. |
1460 * +---------------------------------------------------------+
1462 * +---------------------------------------------------------+
1464 * The "original" frame is used by hardware. Before re-enabling
1465 * NMIs, we need to be done with it, and we need to leave enough
1466 * space for the asm code here.
1468 * We return by executing IRET while RSP points to the "iret" frame.
1469 * That will either return for real or it will loop back into NMI
1472 * The "outermost" frame is copied to the "iret" frame on each
1473 * iteration of the loop, so each iteration starts with the "iret"
1474 * frame pointing to the final return target.
1478 * Determine whether we're a nested NMI.
1480 * If we interrupted kernel code between repeat_nmi and
1481 * end_repeat_nmi, then we are a nested NMI. We must not
1482 * modify the "iret" frame because it's being written by
1483 * the outer NMI. That's okay; the outer NMI handler is
1484 * about to about to call do_nmi anyway, so we can just
1485 * resume the outer NMI.
1488 movq $repeat_nmi, %rdx
1491 movq $end_repeat_nmi, %rdx
1497 * Now check "NMI executing". If it's set, then we're nested.
1498 * This will not detect if we interrupted an outer NMI just
1505 * Now test if the previous stack was an NMI stack. This covers
1506 * the case where we interrupt an outer NMI after it clears
1507 * "NMI executing" but before IRET. We need to be careful, though:
1508 * there is one case in which RSP could point to the NMI stack
1509 * despite there being no NMI active: naughty userspace controls
1510 * RSP at the very beginning of the SYSCALL targets. We can
1511 * pull a fast one on naughty userspace, though: we program
1512 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1513 * if it controls the kernel's RSP. We set DF before we clear
1517 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1518 cmpq %rdx, 4*8(%rsp)
1519 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1522 subq $EXCEPTION_STKSZ, %rdx
1523 cmpq %rdx, 4*8(%rsp)
1524 /* If it is below the NMI stack, it is a normal NMI */
1527 /* Ah, it is within the NMI stack. */
1529 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1530 jz first_nmi /* RSP was user controlled. */
1532 /* This is a nested NMI. */
1536 * Modify the "iret" frame to point to repeat_nmi, forcing another
1537 * iteration of NMI handling.
1540 leaq -10*8(%rsp), %rdx
1547 /* Put stack back */
1553 /* We are returning to kernel mode, so this cannot result in a fault. */
1560 /* Make room for "NMI executing". */
1563 /* Leave room for the "iret" frame */
1566 /* Copy the "original" frame to the "outermost" frame */
1570 UNWIND_HINT_IRET_REGS
1572 /* Everything up to here is safe from nested NMIs */
1574 #ifdef CONFIG_DEBUG_ENTRY
1576 * For ease of testing, unmask NMIs right away. Disabled by
1577 * default because IRET is very expensive.
1580 pushq %rsp /* RSP (minus 8 because of the previous push) */
1581 addq $8, (%rsp) /* Fix up RSP */
1583 pushq $__KERNEL_CS /* CS */
1585 iretq /* continues at repeat_nmi below */
1586 UNWIND_HINT_IRET_REGS
1592 * If there was a nested NMI, the first NMI's iret will return
1593 * here. But NMIs are still enabled and we can take another
1594 * nested NMI. The nested NMI checks the interrupted RIP to see
1595 * if it is between repeat_nmi and end_repeat_nmi, and if so
1596 * it will just return, as we are about to repeat an NMI anyway.
1597 * This makes it safe to copy to the stack frame that a nested
1600 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1601 * we're repeating an NMI, gsbase has the same value that it had on
1602 * the first iteration. paranoid_entry will load the kernel
1603 * gsbase if needed before we call do_nmi. "NMI executing"
1606 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1609 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1610 * here must not modify the "iret" frame while we're writing to
1611 * it or it will end up containing garbage.
1621 * Everything below this point can be preempted by a nested NMI.
1622 * If this happens, then the inner NMI will change the "iret"
1623 * frame to point back to repeat_nmi.
1625 pushq $-1 /* ORIG_RAX: no syscall to restart */
1626 ALLOC_PT_GPREGS_ON_STACK
1629 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1630 * as we should not be calling schedule in NMI context.
1631 * Even with normal interrupts enabled. An NMI should not be
1632 * setting NEED_RESCHED or anything that normal interrupts and
1633 * exceptions might do.
1638 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1643 testl %ebx, %ebx /* swapgs needed? */
1652 * Skip orig_ax and the "outermost" frame to point RSP at the "iret"
1653 * at the "iret" frame.
1658 * Clear "NMI executing". Set DF first so that we can easily
1659 * distinguish the remaining code between here and IRET from
1660 * the SYSCALL entry and exit paths.
1662 * We arguably should just inspect RIP instead, but I (Andy) wrote
1663 * this code when I had the misapprehension that Xen PV supported
1664 * NMIs, and Xen PV would break that approach.
1667 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1670 * iretq reads the "iret" frame and exits the NMI stack in a
1671 * single instruction. We are returning to kernel mode, so this
1672 * cannot result in a fault. Similarly, we don't need to worry
1673 * about espfix64 on the way back to kernel mode.
1678 ENTRY(ignore_sysret)
1684 ENTRY(rewind_stack_do_exit)
1686 /* Prevent any naive code from trying to unwind to our caller. */
1689 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1690 leaq -PTREGS_SIZE(%rax), %rsp
1691 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE
1694 END(rewind_stack_do_exit)