2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 * entry.S contains the system-call and fault low-level handling routines.
10 * Some of this is documented in Documentation/x86/entry_64.txt
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/export.h>
39 #include <asm/frame.h>
40 #include <linux/err.h>
43 .section .entry.text, "ax"
45 #ifdef CONFIG_PARAVIRT
46 ENTRY(native_usergs_sysret64)
50 END(native_usergs_sysret64)
51 #endif /* CONFIG_PARAVIRT */
53 .macro TRACE_IRQS_IRETQ
54 #ifdef CONFIG_TRACE_IRQFLAGS
55 bt $9, EFLAGS(%rsp) /* interrupts off? */
63 * When dynamic function tracer is enabled it will add a breakpoint
64 * to all locations that it is about to modify, sync CPUs, update
65 * all the code, sync CPUs, then remove the breakpoints. In this time
66 * if lockdep is enabled, it might jump back into the debug handler
67 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
69 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
70 * make sure the stack pointer does not get reset back to the top
71 * of the debug stack, and instead just reuses the current stack.
73 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
75 .macro TRACE_IRQS_OFF_DEBUG
76 call debug_stack_set_zero
78 call debug_stack_reset
81 .macro TRACE_IRQS_ON_DEBUG
82 call debug_stack_set_zero
84 call debug_stack_reset
87 .macro TRACE_IRQS_IRETQ_DEBUG
88 bt $9, EFLAGS(%rsp) /* interrupts off? */
95 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
96 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
97 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
101 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
103 * This is the only entry point used for 64-bit system calls. The
104 * hardware interface is reasonably well designed and the register to
105 * argument mapping Linux uses fits well with the registers that are
106 * available when SYSCALL is used.
108 * SYSCALL instructions can be found inlined in libc implementations as
109 * well as some other programs and libraries. There are also a handful
110 * of SYSCALL instructions in the vDSO used, for example, as a
111 * clock_gettimeofday fallback.
113 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
114 * then loads new ss, cs, and rip from previously programmed MSRs.
115 * rflags gets masked by a value from another MSR (so CLD and CLAC
116 * are not needed). SYSCALL does not save anything on the stack
117 * and does not change rsp.
119 * Registers on entry:
120 * rax system call number
122 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
126 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
129 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
131 * Only called from user space.
133 * When user can change pt_regs->foo always force IRET. That is because
134 * it deals with uncanonical addresses better. SYSRET has trouble
135 * with them due to bugs in both AMD and Intel CPUs.
138 ENTRY(entry_SYSCALL_64)
141 * Interrupts are off on entry.
142 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
143 * it is too small to ever cause noticeable irq latency.
147 movq %rsp, PER_CPU_VAR(rsp_scratch)
148 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
152 /* Construct struct pt_regs on stack */
153 pushq $__USER_DS /* pt_regs->ss */
154 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
155 pushq %r11 /* pt_regs->flags */
156 pushq $__USER_CS /* pt_regs->cs */
157 pushq %rcx /* pt_regs->ip */
158 GLOBAL(entry_SYSCALL_64_after_hwframe)
159 pushq %rax /* pt_regs->orig_ax */
160 pushq %rdi /* pt_regs->di */
161 pushq %rsi /* pt_regs->si */
162 pushq %rdx /* pt_regs->dx */
163 pushq %rcx /* pt_regs->cx */
164 pushq $-ENOSYS /* pt_regs->ax */
165 pushq %r8 /* pt_regs->r8 */
166 pushq %r9 /* pt_regs->r9 */
167 pushq %r10 /* pt_regs->r10 */
168 pushq %r11 /* pt_regs->r11 */
169 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
170 UNWIND_HINT_REGS extra=0
173 * If we need to do entry work or if we guess we'll need to do
174 * exit work, go straight to the slow path.
176 movq PER_CPU_VAR(current_task), %r11
177 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
178 jnz entry_SYSCALL64_slow_path
180 entry_SYSCALL_64_fastpath:
182 * Easy case: enable interrupts and issue the syscall. If the syscall
183 * needs pt_regs, we'll call a stub that disables interrupts again
184 * and jumps to the slow path.
187 ENABLE_INTERRUPTS(CLBR_NONE)
188 #if __SYSCALL_MASK == ~0
189 cmpq $__NR_syscall_max, %rax
191 andl $__SYSCALL_MASK, %eax
192 cmpl $__NR_syscall_max, %eax
194 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
198 * This call instruction is handled specially in stub_ptregs_64.
199 * It might end up jumping to the slow path. If it jumps, RAX
200 * and all argument registers are clobbered.
202 call *sys_call_table(, %rax, 8)
203 .Lentry_SYSCALL_64_after_fastpath_call:
209 * If we get here, then we know that pt_regs is clean for SYSRET64.
210 * If we see that no exit work is required (which we are required
211 * to check with IRQs off), then we can go straight to SYSRET64.
213 DISABLE_INTERRUPTS(CLBR_ANY)
215 movq PER_CPU_VAR(current_task), %r11
216 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
220 TRACE_IRQS_ON /* user mode is traced as IRQs on */
222 movq EFLAGS(%rsp), %r11
223 addq $6*8, %rsp /* skip extra regs -- they were preserved */
225 jmp .Lpop_c_regs_except_rcx_r11_and_sysret
229 * The fast path looked good when we started, but something changed
230 * along the way and we need to switch to the slow path. Calling
231 * raise(3) will trigger this, for example. IRQs are off.
234 ENABLE_INTERRUPTS(CLBR_ANY)
237 call syscall_return_slowpath /* returns with IRQs disabled */
238 jmp return_from_SYSCALL_64
240 entry_SYSCALL64_slow_path:
244 call do_syscall_64 /* returns with IRQs disabled */
246 return_from_SYSCALL_64:
247 TRACE_IRQS_IRETQ /* we're about to change IF */
250 * Try to use SYSRET instead of IRET if we're returning to
251 * a completely clean 64-bit userspace context. If we're not,
252 * go to the slow exit path.
257 cmpq %rcx, %r11 /* SYSRET requires RCX == RIP */
258 jne swapgs_restore_regs_and_return_to_usermode
261 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
262 * in kernel space. This essentially lets the user take over
263 * the kernel, since userspace controls RSP.
265 * If width of "canonical tail" ever becomes variable, this will need
266 * to be updated to remain correct on both old and new CPUs.
268 * Change top bits to match most significant bit (47th or 56th bit
269 * depending on paging mode) in the address.
271 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
272 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
274 /* If this changed %rcx, it was not canonical */
276 jne swapgs_restore_regs_and_return_to_usermode
278 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
279 jne swapgs_restore_regs_and_return_to_usermode
282 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
283 jne swapgs_restore_regs_and_return_to_usermode
286 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
287 * restore RF properly. If the slowpath sets it for whatever reason, we
288 * need to restore it correctly.
290 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
291 * trap from userspace immediately after SYSRET. This would cause an
292 * infinite loop whenever #DB happens with register state that satisfies
293 * the opportunistic SYSRET conditions. For example, single-stepping
296 * movq $stuck_here, %rcx
301 * would never get past 'stuck_here'.
303 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
304 jnz swapgs_restore_regs_and_return_to_usermode
306 /* nothing to check for RSP */
308 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
309 jne swapgs_restore_regs_and_return_to_usermode
312 * We win! This label is here just for ease of understanding
313 * perf profiles. Nothing jumps here.
315 syscall_return_via_sysret:
316 /* rcx and r11 are already restored (see code above) */
319 .Lpop_c_regs_except_rcx_r11_and_sysret:
320 popq %rsi /* skip r11 */
325 popq %rsi /* skip rcx */
330 * Now all regs are restored except RSP and RDI.
331 * Save old stack pointer and switch to trampoline stack.
334 movq PER_CPU_VAR(cpu_tss + TSS_sp0), %rsp
336 pushq RSP-RDI(%rdi) /* RSP */
337 pushq (%rdi) /* RDI */
340 * We are on the trampoline stack. All regs except RDI are live.
341 * We can do future final exit work right here.
347 END(entry_SYSCALL_64)
349 ENTRY(stub_ptregs_64)
351 * Syscalls marked as needing ptregs land here.
352 * If we are on the fast path, we need to save the extra regs,
353 * which we achieve by trying again on the slow path. If we are on
354 * the slow path, the extra regs are already saved.
356 * RAX stores a pointer to the C function implementing the syscall.
359 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
363 * Called from fast path -- disable IRQs again, pop return address
364 * and jump to slow path
366 DISABLE_INTERRUPTS(CLBR_ANY)
369 UNWIND_HINT_REGS extra=0
370 jmp entry_SYSCALL64_slow_path
373 jmp *%rax /* Called from C */
376 .macro ptregs_stub func
379 leaq \func(%rip), %rax
384 /* Instantiate ptregs_stub for each ptregs-using syscall */
385 #define __SYSCALL_64_QUAL_(sym)
386 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
387 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
388 #include <asm/syscalls_64.h>
394 ENTRY(__switch_to_asm)
397 * Save callee-saved registers
398 * This must match the order in inactive_task_frame
408 movq %rsp, TASK_threadsp(%rdi)
409 movq TASK_threadsp(%rsi), %rsp
411 #ifdef CONFIG_CC_STACKPROTECTOR
412 movq TASK_stack_canary(%rsi), %rbx
413 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
416 /* restore callee-saved registers */
428 * A newly forked process directly context switches into this address.
430 * rax: prev task we switched from
431 * rbx: kernel thread func (NULL for user thread)
432 * r12: kernel thread arg
437 call schedule_tail /* rdi: 'prev' task parameter */
439 testq %rbx, %rbx /* from kernel_thread? */
440 jnz 1f /* kernel threads are uncommon */
445 call syscall_return_slowpath /* returns with IRQs disabled */
446 TRACE_IRQS_ON /* user mode is traced as IRQS on */
447 jmp swapgs_restore_regs_and_return_to_usermode
454 * A kernel thread is allowed to return here after successfully
455 * calling do_execve(). Exit to userspace to complete the execve()
463 * Build the entry stubs with some assembler magic.
464 * We pack 1 stub into every 8-byte block.
467 ENTRY(irq_entries_start)
468 vector=FIRST_EXTERNAL_VECTOR
469 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
470 UNWIND_HINT_IRET_REGS
471 pushq $(~vector+0x80) /* Note: always in signed byte range */
476 END(irq_entries_start)
478 .macro DEBUG_ENTRY_ASSERT_IRQS_OFF
479 #ifdef CONFIG_DEBUG_ENTRY
482 testl $X86_EFLAGS_IF, %eax
491 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers
492 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone.
493 * Requires kernel GSBASE.
495 * The invariant is that, if irq_count != -1, then the IRQ stack is in use.
497 .macro ENTER_IRQ_STACK regs=1 old_rsp
498 DEBUG_ENTRY_ASSERT_IRQS_OFF
502 UNWIND_HINT_REGS base=\old_rsp
505 incl PER_CPU_VAR(irq_count)
506 jnz .Lirq_stack_push_old_rsp_\@
509 * Right now, if we just incremented irq_count to zero, we've
510 * claimed the IRQ stack but we haven't switched to it yet.
512 * If anything is added that can interrupt us here without using IST,
513 * it must be *extremely* careful to limit its stack usage. This
514 * could include kprobes and a hypothetical future IST-less #DB
517 * The OOPS unwinder relies on the word at the top of the IRQ
518 * stack linking back to the previous RSP for the entire time we're
519 * on the IRQ stack. For this to work reliably, we need to write
520 * it before we actually move ourselves to the IRQ stack.
523 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8)
524 movq PER_CPU_VAR(irq_stack_ptr), %rsp
526 #ifdef CONFIG_DEBUG_ENTRY
528 * If the first movq above becomes wrong due to IRQ stack layout
529 * changes, the only way we'll notice is if we try to unwind right
530 * here. Assert that we set up the stack right to catch this type
533 cmpq -8(%rsp), \old_rsp
534 je .Lirq_stack_okay\@
539 .Lirq_stack_push_old_rsp_\@:
543 UNWIND_HINT_REGS indirect=1
548 * Undoes ENTER_IRQ_STACK.
550 .macro LEAVE_IRQ_STACK regs=1
551 DEBUG_ENTRY_ASSERT_IRQS_OFF
552 /* We need to be off the IRQ stack before decrementing irq_count. */
560 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming
561 * the irq stack but we're not on it.
564 decl PER_CPU_VAR(irq_count)
568 * Interrupt entry/exit.
570 * Interrupt entry points save only callee clobbered registers in fast path.
572 * Entry runs with interrupts off.
575 /* 0(%rsp): ~(interrupt number) */
576 .macro interrupt func
579 testb $3, CS-ORIG_RAX(%rsp)
582 call switch_to_thread_stack
585 ALLOC_PT_GPREGS_ON_STACK
594 * IRQ from user mode.
596 * We need to tell lockdep that IRQs are off. We can't do this until
597 * we fix gsbase, and we should do it before enter_from_user_mode
598 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
599 * the simplest way to handle it is to just call it twice if
600 * we enter from user mode. There's no reason to optimize this since
601 * TRACE_IRQS_OFF is a no-op if lockdep is off.
605 CALL_enter_from_user_mode
608 ENTER_IRQ_STACK old_rsp=%rdi
609 /* We entered an interrupt context - irqs are off: */
612 call \func /* rdi points to pt_regs */
616 * The interrupt stubs push (~vector+0x80) onto the stack and
617 * then jump to common_interrupt.
619 .p2align CONFIG_X86_L1_CACHE_SHIFT
622 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
624 /* 0(%rsp): old RSP */
626 DISABLE_INTERRUPTS(CLBR_ANY)
634 /* Interrupt came from user space */
637 call prepare_exit_to_usermode
640 GLOBAL(swapgs_restore_regs_and_return_to_usermode)
641 #ifdef CONFIG_DEBUG_ENTRY
642 /* Assert that pt_regs indicates user mode. */
659 * The stack is now user RDI, orig_ax, RIP, CS, EFLAGS, RSP, SS.
660 * Save old stack pointer and switch to trampoline stack.
663 movq PER_CPU_VAR(cpu_tss + TSS_sp0), %rsp
665 /* Copy the IRET frame to the trampoline stack. */
666 pushq 6*8(%rdi) /* SS */
667 pushq 5*8(%rdi) /* RSP */
668 pushq 4*8(%rdi) /* EFLAGS */
669 pushq 3*8(%rdi) /* CS */
670 pushq 2*8(%rdi) /* RIP */
672 /* Push user RDI on the trampoline stack. */
676 * We are on the trampoline stack. All regs except RDI are live.
677 * We can do future final exit work right here.
686 /* Returning to kernel space */
688 #ifdef CONFIG_PREEMPT
689 /* Interrupts are off */
690 /* Check if we need preemption */
691 bt $9, EFLAGS(%rsp) /* were interrupts off? */
693 0: cmpl $0, PER_CPU_VAR(__preempt_count)
695 call preempt_schedule_irq
700 * The iretq could re-enable interrupts:
704 GLOBAL(restore_regs_and_return_to_kernel)
705 #ifdef CONFIG_DEBUG_ENTRY
706 /* Assert that pt_regs indicates kernel mode. */
714 addq $8, %rsp /* skip regs->orig_ax */
718 UNWIND_HINT_IRET_REGS
720 * Are we returning to a stack segment from the LDT? Note: in
721 * 64-bit mode SS:RSP on the exception stack is always valid.
723 #ifdef CONFIG_X86_ESPFIX64
724 testb $4, (SS-RIP)(%rsp)
725 jnz native_irq_return_ldt
728 .global native_irq_return_iret
729 native_irq_return_iret:
731 * This may fault. Non-paranoid faults on return to userspace are
732 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
733 * Double-faults due to espfix64 are handled in do_double_fault.
734 * Other faults here are fatal.
738 #ifdef CONFIG_X86_ESPFIX64
739 native_irq_return_ldt:
741 * We are running with user GSBASE. All GPRs contain their user
742 * values. We have a percpu ESPFIX stack that is eight slots
743 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
744 * of the ESPFIX stack.
746 * We clobber RAX and RDI in this code. We stash RDI on the
747 * normal stack and RAX on the ESPFIX stack.
749 * The ESPFIX stack layout we set up looks like this:
751 * --- top of ESPFIX stack ---
756 * RIP <-- RSP points here when we're done
757 * RAX <-- espfix_waddr points here
758 * --- bottom of ESPFIX stack ---
761 pushq %rdi /* Stash user RDI */
763 movq PER_CPU_VAR(espfix_waddr), %rdi
764 movq %rax, (0*8)(%rdi) /* user RAX */
765 movq (1*8)(%rsp), %rax /* user RIP */
766 movq %rax, (1*8)(%rdi)
767 movq (2*8)(%rsp), %rax /* user CS */
768 movq %rax, (2*8)(%rdi)
769 movq (3*8)(%rsp), %rax /* user RFLAGS */
770 movq %rax, (3*8)(%rdi)
771 movq (5*8)(%rsp), %rax /* user SS */
772 movq %rax, (5*8)(%rdi)
773 movq (4*8)(%rsp), %rax /* user RSP */
774 movq %rax, (4*8)(%rdi)
775 /* Now RAX == RSP. */
777 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
778 popq %rdi /* Restore user RDI */
781 * espfix_stack[31:16] == 0. The page tables are set up such that
782 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
783 * espfix_waddr for any X. That is, there are 65536 RO aliases of
784 * the same page. Set up RSP so that RSP[31:16] contains the
785 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
786 * still points to an RO alias of the ESPFIX stack.
788 orq PER_CPU_VAR(espfix_stack), %rax
791 UNWIND_HINT_IRET_REGS offset=8
794 * At this point, we cannot write to the stack any more, but we can
797 popq %rax /* Restore user RAX */
800 * RSP now points to an ordinary IRET frame, except that the page
801 * is read-only and RSP[31:16] are preloaded with the userspace
802 * values. We can now IRET back to userspace.
804 jmp native_irq_return_iret
806 END(common_interrupt)
811 .macro apicinterrupt3 num sym do_sym
813 UNWIND_HINT_IRET_REGS
822 #ifdef CONFIG_TRACING
823 #define trace(sym) trace_##sym
824 #define smp_trace(sym) smp_trace_##sym
826 .macro trace_apicinterrupt num sym
827 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
830 .macro trace_apicinterrupt num sym do_sym
834 /* Make sure APIC interrupt handlers end up in the irqentry section: */
835 #define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
836 #define POP_SECTION_IRQENTRY .popsection
838 .macro apicinterrupt num sym do_sym
839 PUSH_SECTION_IRQENTRY
840 apicinterrupt3 \num \sym \do_sym
841 trace_apicinterrupt \num \sym
846 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
847 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
851 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
854 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
855 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
857 #ifdef CONFIG_HAVE_KVM
858 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
859 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
860 apicinterrupt3 POSTED_INTR_NESTED_VECTOR kvm_posted_intr_nested_ipi smp_kvm_posted_intr_nested_ipi
863 #ifdef CONFIG_X86_MCE_THRESHOLD
864 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
867 #ifdef CONFIG_X86_MCE_AMD
868 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
871 #ifdef CONFIG_X86_THERMAL_VECTOR
872 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
876 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
877 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
878 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
881 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
882 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
884 #ifdef CONFIG_IRQ_WORK
885 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
889 * Exception entry points.
891 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
894 * Switch to the thread stack. This is called with the IRET frame and
895 * orig_ax on the stack. (That is, RDI..R12 are not on the stack and
896 * space has not been allocated for them.)
898 ENTRY(switch_to_thread_stack)
903 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
904 UNWIND_HINT sp_offset=16 sp_reg=ORC_REG_DI
906 pushq 7*8(%rdi) /* regs->ss */
907 pushq 6*8(%rdi) /* regs->rsp */
908 pushq 5*8(%rdi) /* regs->eflags */
909 pushq 4*8(%rdi) /* regs->cs */
910 pushq 3*8(%rdi) /* regs->ip */
911 pushq 2*8(%rdi) /* regs->orig_ax */
912 pushq 8(%rdi) /* return address */
917 END(switch_to_thread_stack)
919 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
921 UNWIND_HINT_IRET_REGS offset=\has_error_code*8
924 .if \shift_ist != -1 && \paranoid == 0
925 .error "using shift_ist requires paranoid=1"
930 .if \has_error_code == 0
931 pushq $-1 /* ORIG_RAX: no syscall to restart */
934 ALLOC_PT_GPREGS_ON_STACK
937 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
938 jnz .Lfrom_usermode_switch_stack_\@
947 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
951 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
957 movq %rsp, %rdi /* pt_regs pointer */
960 movq ORIG_RAX(%rsp), %rsi /* get error code */
961 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
963 xorl %esi, %esi /* no error code */
967 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
973 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
976 /* these procedures expect "no swapgs" flag in ebx */
985 * Entry from userspace. Switch stacks and treat it
986 * as a normal entry. This means that paranoid handlers
987 * run in real process context if user_mode(regs).
989 .Lfrom_usermode_switch_stack_\@:
992 movq %rsp, %rdi /* pt_regs pointer */
995 movq ORIG_RAX(%rsp), %rsi /* get error code */
996 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
998 xorl %esi, %esi /* no error code */
1003 jmp error_exit /* %ebx: no swapgs flag */
1008 idtentry divide_error do_divide_error has_error_code=0
1009 idtentry overflow do_overflow has_error_code=0
1010 idtentry bounds do_bounds has_error_code=0
1011 idtentry invalid_op do_invalid_op has_error_code=0
1012 idtentry device_not_available do_device_not_available has_error_code=0
1013 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1014 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1015 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1016 idtentry segment_not_present do_segment_not_present has_error_code=1
1017 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1018 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1019 idtentry alignment_check do_alignment_check has_error_code=1
1020 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1024 * Reload gs selector with exception handling
1027 ENTRY(native_load_gs_index)
1030 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1034 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
1039 ENDPROC(native_load_gs_index)
1040 EXPORT_SYMBOL(native_load_gs_index)
1042 _ASM_EXTABLE(.Lgs_change, bad_gs)
1043 .section .fixup, "ax"
1044 /* running with kernelgs */
1046 SWAPGS /* switch back to user gs */
1048 /* This can't be a string because the preprocessor needs to see it. */
1049 movl $__USER_DS, %eax
1052 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
1058 /* Call softirq on interrupt stack. Interrupts are off. */
1059 ENTRY(do_softirq_own_stack)
1062 ENTER_IRQ_STACK regs=0 old_rsp=%r11
1064 LEAVE_IRQ_STACK regs=0
1067 ENDPROC(do_softirq_own_stack)
1070 idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1073 * A note on the "critical region" in our callback handler.
1074 * We want to avoid stacking callback handlers due to events occurring
1075 * during handling of the last event. To do this, we keep events disabled
1076 * until we've done all processing. HOWEVER, we must enable events before
1077 * popping the stack frame (can't be done atomically) and so it would still
1078 * be possible to get enough handler activations to overflow the stack.
1079 * Although unlikely, bugs of that kind are hard to track down, so we'd
1080 * like to avoid the possibility.
1081 * So, on entry to the handler we detect whether we interrupted an
1082 * existing activation in its critical region -- if so, we pop the current
1083 * activation and restart the handler using the previous one.
1085 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
1088 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1089 * see the correct pointer to the pt_regs
1092 movq %rdi, %rsp /* we don't return, adjust the stack frame */
1095 ENTER_IRQ_STACK old_rsp=%r10
1096 call xen_evtchn_do_upcall
1099 #ifndef CONFIG_PREEMPT
1100 call xen_maybe_preempt_hcall
1103 END(xen_do_hypervisor_callback)
1106 * Hypervisor uses this for application faults while it executes.
1107 * We get here for two reasons:
1108 * 1. Fault while reloading DS, ES, FS or GS
1109 * 2. Fault while executing IRET
1110 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1111 * registers that could be reloaded and zeroed the others.
1112 * Category 2 we fix up by killing the current process. We cannot use the
1113 * normal Linux return path in this case because if we use the IRET hypercall
1114 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1115 * We distinguish between categories by comparing each saved segment register
1116 * with its current contents: any discrepancy means we in category 1.
1118 ENTRY(xen_failsafe_callback)
1121 cmpw %cx, 0x10(%rsp)
1124 cmpw %cx, 0x18(%rsp)
1127 cmpw %cx, 0x20(%rsp)
1130 cmpw %cx, 0x28(%rsp)
1132 /* All segments match their saved values => Category 2 (Bad IRET). */
1137 UNWIND_HINT_IRET_REGS offset=8
1138 jmp general_protection
1139 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1143 UNWIND_HINT_IRET_REGS
1144 pushq $-1 /* orig_ax = -1 => not a system call */
1145 ALLOC_PT_GPREGS_ON_STACK
1148 ENCODE_FRAME_POINTER
1150 END(xen_failsafe_callback)
1152 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1153 xen_hvm_callback_vector xen_evtchn_do_upcall
1155 #endif /* CONFIG_XEN */
1157 #if IS_ENABLED(CONFIG_HYPERV)
1158 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1159 hyperv_callback_vector hyperv_vector_handler
1160 #endif /* CONFIG_HYPERV */
1162 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1163 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1164 idtentry stack_segment do_stack_segment has_error_code=1
1167 idtentry xennmi do_nmi has_error_code=0
1168 idtentry xendebug do_debug has_error_code=0
1169 idtentry xenint3 do_int3 has_error_code=0
1172 idtentry general_protection do_general_protection has_error_code=1
1173 idtentry page_fault do_page_fault has_error_code=1
1175 #ifdef CONFIG_KVM_GUEST
1176 idtentry async_page_fault do_async_page_fault has_error_code=1
1179 #ifdef CONFIG_X86_MCE
1180 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1184 * Save all registers in pt_regs, and switch gs if needed.
1185 * Use slow, but surefire "are we in kernel?" check.
1186 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1188 ENTRY(paranoid_entry)
1193 ENCODE_FRAME_POINTER 8
1195 movl $MSR_GS_BASE, %ecx
1198 js 1f /* negative -> in kernel */
1205 * "Paranoid" exit path from exception stack. This is invoked
1206 * only on return from non-NMI IST interrupts that came
1207 * from kernel space.
1209 * We may be returning to very strange contexts (e.g. very early
1210 * in syscall entry), so checking for preemption here would
1211 * be complicated. Fortunately, we there's no good reason
1212 * to try to handle preemption here.
1214 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1216 ENTRY(paranoid_exit)
1218 DISABLE_INTERRUPTS(CLBR_ANY)
1219 TRACE_IRQS_OFF_DEBUG
1220 testl %ebx, %ebx /* swapgs needed? */
1221 jnz .Lparanoid_exit_no_swapgs
1224 jmp .Lparanoid_exit_restore
1225 .Lparanoid_exit_no_swapgs:
1226 TRACE_IRQS_IRETQ_DEBUG
1227 .Lparanoid_exit_restore:
1228 jmp restore_regs_and_return_to_kernel
1232 * Save all registers in pt_regs, and switch gs if needed.
1233 * Return: EBX=0: came from user mode; EBX=1: otherwise
1240 ENCODE_FRAME_POINTER 8
1242 testb $3, CS+8(%rsp)
1243 jz .Lerror_kernelspace
1246 * We entered from user mode or we're pretending to have entered
1247 * from user mode due to an IRET fault.
1251 .Lerror_entry_from_usermode_after_swapgs:
1252 /* Put us onto the real thread stack. */
1253 popq %r12 /* save return addr in %12 */
1254 movq %rsp, %rdi /* arg0 = pt_regs pointer */
1256 movq %rax, %rsp /* switch stack */
1257 ENCODE_FRAME_POINTER
1261 * We need to tell lockdep that IRQs are off. We can't do this until
1262 * we fix gsbase, and we should do it before enter_from_user_mode
1263 * (which can take locks).
1266 CALL_enter_from_user_mode
1274 * There are two places in the kernel that can potentially fault with
1275 * usergs. Handle them here. B stepping K8s sometimes report a
1276 * truncated RIP for IRET exceptions returning to compat mode. Check
1277 * for these here too.
1279 .Lerror_kernelspace:
1281 leaq native_irq_return_iret(%rip), %rcx
1282 cmpq %rcx, RIP+8(%rsp)
1284 movl %ecx, %eax /* zero extend */
1285 cmpq %rax, RIP+8(%rsp)
1287 cmpq $.Lgs_change, RIP+8(%rsp)
1288 jne .Lerror_entry_done
1291 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1292 * gsbase and proceed. We'll fix up the exception and land in
1293 * .Lgs_change's error handler with kernel gsbase.
1296 jmp .Lerror_entry_done
1299 /* Fix truncated RIP */
1300 movq %rcx, RIP+8(%rsp)
1305 * We came from an IRET to user mode, so we have user gsbase.
1306 * Switch to kernel gsbase:
1311 * Pretend that the exception came from user mode: set up pt_regs
1312 * as if we faulted immediately after IRET and clear EBX so that
1313 * error_exit knows that we will be returning to user mode.
1319 jmp .Lerror_entry_from_usermode_after_swapgs
1324 * On entry, EBX is a "return to kernel mode" flag:
1325 * 1: already in kernel mode, don't need SWAPGS
1326 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1330 DISABLE_INTERRUPTS(CLBR_ANY)
1338 * Runs on exception stack. Xen PV does not go through this path at all,
1339 * so we can use real assembly here.
1342 UNWIND_HINT_IRET_REGS
1345 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1346 * the iretq it performs will take us out of NMI context.
1347 * This means that we can have nested NMIs where the next
1348 * NMI is using the top of the stack of the previous NMI. We
1349 * can't let it execute because the nested NMI will corrupt the
1350 * stack of the previous NMI. NMI handlers are not re-entrant
1353 * To handle this case we do the following:
1354 * Check the a special location on the stack that contains
1355 * a variable that is set when NMIs are executing.
1356 * The interrupted task's stack is also checked to see if it
1358 * If the variable is not set and the stack is not the NMI
1360 * o Set the special variable on the stack
1361 * o Copy the interrupt frame into an "outermost" location on the
1363 * o Copy the interrupt frame into an "iret" location on the stack
1364 * o Continue processing the NMI
1365 * If the variable is set or the previous stack is the NMI stack:
1366 * o Modify the "iret" location to jump to the repeat_nmi
1367 * o return back to the first NMI
1369 * Now on exit of the first NMI, we first clear the stack variable
1370 * The NMI stack will tell any nested NMIs at that point that it is
1371 * nested. Then we pop the stack normally with iret, and if there was
1372 * a nested NMI that updated the copy interrupt stack frame, a
1373 * jump will be made to the repeat_nmi code that will handle the second
1376 * However, espfix prevents us from directly returning to userspace
1377 * with a single IRET instruction. Similarly, IRET to user mode
1378 * can fault. We therefore handle NMIs from user space like
1379 * other IST entries.
1384 /* Use %rdx as our temp variable throughout */
1387 testb $3, CS-RIP+8(%rsp)
1388 jz .Lnmi_from_kernel
1391 * NMI from user mode. We need to run on the thread stack, but we
1392 * can't go through the normal entry paths: NMIs are masked, and
1393 * we don't want to enable interrupts, because then we'll end
1394 * up in an awkward situation in which IRQs are on but NMIs
1397 * We also must not push anything to the stack before switching
1398 * stacks lest we corrupt the "NMI executing" variable.
1404 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1405 UNWIND_HINT_IRET_REGS base=%rdx offset=8
1406 pushq 5*8(%rdx) /* pt_regs->ss */
1407 pushq 4*8(%rdx) /* pt_regs->rsp */
1408 pushq 3*8(%rdx) /* pt_regs->flags */
1409 pushq 2*8(%rdx) /* pt_regs->cs */
1410 pushq 1*8(%rdx) /* pt_regs->rip */
1411 UNWIND_HINT_IRET_REGS
1412 pushq $-1 /* pt_regs->orig_ax */
1413 pushq %rdi /* pt_regs->di */
1414 pushq %rsi /* pt_regs->si */
1415 pushq (%rdx) /* pt_regs->dx */
1416 pushq %rcx /* pt_regs->cx */
1417 pushq %rax /* pt_regs->ax */
1418 pushq %r8 /* pt_regs->r8 */
1419 pushq %r9 /* pt_regs->r9 */
1420 pushq %r10 /* pt_regs->r10 */
1421 pushq %r11 /* pt_regs->r11 */
1422 pushq %rbx /* pt_regs->rbx */
1423 pushq %rbp /* pt_regs->rbp */
1424 pushq %r12 /* pt_regs->r12 */
1425 pushq %r13 /* pt_regs->r13 */
1426 pushq %r14 /* pt_regs->r14 */
1427 pushq %r15 /* pt_regs->r15 */
1429 ENCODE_FRAME_POINTER
1432 * At this point we no longer need to worry about stack damage
1433 * due to nesting -- we're on the normal thread stack and we're
1434 * done with the NMI stack.
1442 * Return back to user mode. We must *not* do the normal exit
1443 * work, because we don't want to enable interrupts.
1445 jmp swapgs_restore_regs_and_return_to_usermode
1449 * Here's what our stack frame will look like:
1450 * +---------------------------------------------------------+
1452 * | original Return RSP |
1453 * | original RFLAGS |
1456 * +---------------------------------------------------------+
1457 * | temp storage for rdx |
1458 * +---------------------------------------------------------+
1459 * | "NMI executing" variable |
1460 * +---------------------------------------------------------+
1461 * | iret SS } Copied from "outermost" frame |
1462 * | iret Return RSP } on each loop iteration; overwritten |
1463 * | iret RFLAGS } by a nested NMI to force another |
1464 * | iret CS } iteration if needed. |
1466 * +---------------------------------------------------------+
1467 * | outermost SS } initialized in first_nmi; |
1468 * | outermost Return RSP } will not be changed before |
1469 * | outermost RFLAGS } NMI processing is done. |
1470 * | outermost CS } Copied to "iret" frame on each |
1471 * | outermost RIP } iteration. |
1472 * +---------------------------------------------------------+
1474 * +---------------------------------------------------------+
1476 * The "original" frame is used by hardware. Before re-enabling
1477 * NMIs, we need to be done with it, and we need to leave enough
1478 * space for the asm code here.
1480 * We return by executing IRET while RSP points to the "iret" frame.
1481 * That will either return for real or it will loop back into NMI
1484 * The "outermost" frame is copied to the "iret" frame on each
1485 * iteration of the loop, so each iteration starts with the "iret"
1486 * frame pointing to the final return target.
1490 * Determine whether we're a nested NMI.
1492 * If we interrupted kernel code between repeat_nmi and
1493 * end_repeat_nmi, then we are a nested NMI. We must not
1494 * modify the "iret" frame because it's being written by
1495 * the outer NMI. That's okay; the outer NMI handler is
1496 * about to about to call do_nmi anyway, so we can just
1497 * resume the outer NMI.
1500 movq $repeat_nmi, %rdx
1503 movq $end_repeat_nmi, %rdx
1509 * Now check "NMI executing". If it's set, then we're nested.
1510 * This will not detect if we interrupted an outer NMI just
1517 * Now test if the previous stack was an NMI stack. This covers
1518 * the case where we interrupt an outer NMI after it clears
1519 * "NMI executing" but before IRET. We need to be careful, though:
1520 * there is one case in which RSP could point to the NMI stack
1521 * despite there being no NMI active: naughty userspace controls
1522 * RSP at the very beginning of the SYSCALL targets. We can
1523 * pull a fast one on naughty userspace, though: we program
1524 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1525 * if it controls the kernel's RSP. We set DF before we clear
1529 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1530 cmpq %rdx, 4*8(%rsp)
1531 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1534 subq $EXCEPTION_STKSZ, %rdx
1535 cmpq %rdx, 4*8(%rsp)
1536 /* If it is below the NMI stack, it is a normal NMI */
1539 /* Ah, it is within the NMI stack. */
1541 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1542 jz first_nmi /* RSP was user controlled. */
1544 /* This is a nested NMI. */
1548 * Modify the "iret" frame to point to repeat_nmi, forcing another
1549 * iteration of NMI handling.
1552 leaq -10*8(%rsp), %rdx
1559 /* Put stack back */
1565 /* We are returning to kernel mode, so this cannot result in a fault. */
1572 /* Make room for "NMI executing". */
1575 /* Leave room for the "iret" frame */
1578 /* Copy the "original" frame to the "outermost" frame */
1582 UNWIND_HINT_IRET_REGS
1584 /* Everything up to here is safe from nested NMIs */
1586 #ifdef CONFIG_DEBUG_ENTRY
1588 * For ease of testing, unmask NMIs right away. Disabled by
1589 * default because IRET is very expensive.
1592 pushq %rsp /* RSP (minus 8 because of the previous push) */
1593 addq $8, (%rsp) /* Fix up RSP */
1595 pushq $__KERNEL_CS /* CS */
1597 iretq /* continues at repeat_nmi below */
1598 UNWIND_HINT_IRET_REGS
1604 * If there was a nested NMI, the first NMI's iret will return
1605 * here. But NMIs are still enabled and we can take another
1606 * nested NMI. The nested NMI checks the interrupted RIP to see
1607 * if it is between repeat_nmi and end_repeat_nmi, and if so
1608 * it will just return, as we are about to repeat an NMI anyway.
1609 * This makes it safe to copy to the stack frame that a nested
1612 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1613 * we're repeating an NMI, gsbase has the same value that it had on
1614 * the first iteration. paranoid_entry will load the kernel
1615 * gsbase if needed before we call do_nmi. "NMI executing"
1618 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1621 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1622 * here must not modify the "iret" frame while we're writing to
1623 * it or it will end up containing garbage.
1633 * Everything below this point can be preempted by a nested NMI.
1634 * If this happens, then the inner NMI will change the "iret"
1635 * frame to point back to repeat_nmi.
1637 pushq $-1 /* ORIG_RAX: no syscall to restart */
1638 ALLOC_PT_GPREGS_ON_STACK
1641 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1642 * as we should not be calling schedule in NMI context.
1643 * Even with normal interrupts enabled. An NMI should not be
1644 * setting NEED_RESCHED or anything that normal interrupts and
1645 * exceptions might do.
1650 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1655 testl %ebx, %ebx /* swapgs needed? */
1664 * Skip orig_ax and the "outermost" frame to point RSP at the "iret"
1665 * at the "iret" frame.
1670 * Clear "NMI executing". Set DF first so that we can easily
1671 * distinguish the remaining code between here and IRET from
1672 * the SYSCALL entry and exit paths.
1674 * We arguably should just inspect RIP instead, but I (Andy) wrote
1675 * this code when I had the misapprehension that Xen PV supported
1676 * NMIs, and Xen PV would break that approach.
1679 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1682 * iretq reads the "iret" frame and exits the NMI stack in a
1683 * single instruction. We are returning to kernel mode, so this
1684 * cannot result in a fault. Similarly, we don't need to worry
1685 * about espfix64 on the way back to kernel mode.
1690 ENTRY(ignore_sysret)
1696 ENTRY(rewind_stack_do_exit)
1698 /* Prevent any naive code from trying to unwind to our caller. */
1701 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1702 leaq -PTREGS_SIZE(%rax), %rsp
1703 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE
1706 END(rewind_stack_do_exit)