2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 * entry.S contains the system-call and fault low-level handling routines.
10 * Some of this is documented in Documentation/x86/entry_64.txt
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/export.h>
39 #include <asm/frame.h>
40 #include <linux/err.h>
43 .section .entry.text, "ax"
45 #ifdef CONFIG_PARAVIRT
46 ENTRY(native_usergs_sysret64)
50 END(native_usergs_sysret64)
51 #endif /* CONFIG_PARAVIRT */
53 .macro TRACE_IRQS_IRETQ
54 #ifdef CONFIG_TRACE_IRQFLAGS
55 bt $9, EFLAGS(%rsp) /* interrupts off? */
63 * When dynamic function tracer is enabled it will add a breakpoint
64 * to all locations that it is about to modify, sync CPUs, update
65 * all the code, sync CPUs, then remove the breakpoints. In this time
66 * if lockdep is enabled, it might jump back into the debug handler
67 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
69 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
70 * make sure the stack pointer does not get reset back to the top
71 * of the debug stack, and instead just reuses the current stack.
73 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
75 .macro TRACE_IRQS_OFF_DEBUG
76 call debug_stack_set_zero
78 call debug_stack_reset
81 .macro TRACE_IRQS_ON_DEBUG
82 call debug_stack_set_zero
84 call debug_stack_reset
87 .macro TRACE_IRQS_IRETQ_DEBUG
88 bt $9, EFLAGS(%rsp) /* interrupts off? */
95 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
96 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
97 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
101 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
103 * This is the only entry point used for 64-bit system calls. The
104 * hardware interface is reasonably well designed and the register to
105 * argument mapping Linux uses fits well with the registers that are
106 * available when SYSCALL is used.
108 * SYSCALL instructions can be found inlined in libc implementations as
109 * well as some other programs and libraries. There are also a handful
110 * of SYSCALL instructions in the vDSO used, for example, as a
111 * clock_gettimeofday fallback.
113 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
114 * then loads new ss, cs, and rip from previously programmed MSRs.
115 * rflags gets masked by a value from another MSR (so CLD and CLAC
116 * are not needed). SYSCALL does not save anything on the stack
117 * and does not change rsp.
119 * Registers on entry:
120 * rax system call number
122 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
126 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
129 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
131 * Only called from user space.
133 * When user can change pt_regs->foo always force IRET. That is because
134 * it deals with uncanonical addresses better. SYSRET has trouble
135 * with them due to bugs in both AMD and Intel CPUs.
138 .pushsection .entry_trampoline, "ax"
141 * The code in here gets remapped into cpu_entry_area's trampoline. This means
142 * that the assembler and linker have the wrong idea as to where this code
143 * lives (and, in fact, it's mapped more than once, so it's not even at a
144 * fixed address). So we can't reference any symbols outside the entry
145 * trampoline and expect it to work.
147 * Instead, we carefully abuse %rip-relative addressing.
148 * _entry_trampoline(%rip) refers to the start of the remapped) entry
149 * trampoline. We can thus find cpu_entry_area with this macro:
152 #define CPU_ENTRY_AREA \
153 _entry_trampoline - CPU_ENTRY_AREA_entry_trampoline(%rip)
155 /* The top word of the SYSENTER stack is hot and is usable as scratch space. */
156 #define RSP_SCRATCH CPU_ENTRY_AREA_SYSENTER_stack + \
157 SIZEOF_SYSENTER_stack - 8 + CPU_ENTRY_AREA
159 ENTRY(entry_SYSCALL_64_trampoline)
163 /* Stash the user RSP. */
164 movq %rsp, RSP_SCRATCH
166 /* Load the top of the task stack into RSP */
167 movq CPU_ENTRY_AREA_tss + TSS_sp1 + CPU_ENTRY_AREA, %rsp
169 /* Start building the simulated IRET frame. */
170 pushq $__USER_DS /* pt_regs->ss */
171 pushq RSP_SCRATCH /* pt_regs->sp */
172 pushq %r11 /* pt_regs->flags */
173 pushq $__USER_CS /* pt_regs->cs */
174 pushq %rcx /* pt_regs->ip */
177 * x86 lacks a near absolute jump, and we can't jump to the real
178 * entry text with a relative jump. We could push the target
179 * address and then use retq, but this destroys the pipeline on
180 * many CPUs (wasting over 20 cycles on Sandy Bridge). Instead,
181 * spill RDI and restore it in a second-stage trampoline.
184 movq $entry_SYSCALL_64_stage2, %rdi
186 END(entry_SYSCALL_64_trampoline)
190 ENTRY(entry_SYSCALL_64_stage2)
193 jmp entry_SYSCALL_64_after_hwframe
194 END(entry_SYSCALL_64_stage2)
196 ENTRY(entry_SYSCALL_64)
199 * Interrupts are off on entry.
200 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
201 * it is too small to ever cause noticeable irq latency.
205 movq %rsp, PER_CPU_VAR(rsp_scratch)
206 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
210 /* Construct struct pt_regs on stack */
211 pushq $__USER_DS /* pt_regs->ss */
212 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
213 pushq %r11 /* pt_regs->flags */
214 pushq $__USER_CS /* pt_regs->cs */
215 pushq %rcx /* pt_regs->ip */
216 GLOBAL(entry_SYSCALL_64_after_hwframe)
217 pushq %rax /* pt_regs->orig_ax */
218 pushq %rdi /* pt_regs->di */
219 pushq %rsi /* pt_regs->si */
220 pushq %rdx /* pt_regs->dx */
221 pushq %rcx /* pt_regs->cx */
222 pushq $-ENOSYS /* pt_regs->ax */
223 pushq %r8 /* pt_regs->r8 */
224 pushq %r9 /* pt_regs->r9 */
225 pushq %r10 /* pt_regs->r10 */
226 pushq %r11 /* pt_regs->r11 */
227 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
228 UNWIND_HINT_REGS extra=0
231 * If we need to do entry work or if we guess we'll need to do
232 * exit work, go straight to the slow path.
234 movq PER_CPU_VAR(current_task), %r11
235 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
236 jnz entry_SYSCALL64_slow_path
238 entry_SYSCALL_64_fastpath:
240 * Easy case: enable interrupts and issue the syscall. If the syscall
241 * needs pt_regs, we'll call a stub that disables interrupts again
242 * and jumps to the slow path.
245 ENABLE_INTERRUPTS(CLBR_NONE)
246 #if __SYSCALL_MASK == ~0
247 cmpq $__NR_syscall_max, %rax
249 andl $__SYSCALL_MASK, %eax
250 cmpl $__NR_syscall_max, %eax
252 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
256 * This call instruction is handled specially in stub_ptregs_64.
257 * It might end up jumping to the slow path. If it jumps, RAX
258 * and all argument registers are clobbered.
260 call *sys_call_table(, %rax, 8)
261 .Lentry_SYSCALL_64_after_fastpath_call:
267 * If we get here, then we know that pt_regs is clean for SYSRET64.
268 * If we see that no exit work is required (which we are required
269 * to check with IRQs off), then we can go straight to SYSRET64.
271 DISABLE_INTERRUPTS(CLBR_ANY)
273 movq PER_CPU_VAR(current_task), %r11
274 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
278 TRACE_IRQS_ON /* user mode is traced as IRQs on */
280 movq EFLAGS(%rsp), %r11
281 addq $6*8, %rsp /* skip extra regs -- they were preserved */
283 jmp .Lpop_c_regs_except_rcx_r11_and_sysret
287 * The fast path looked good when we started, but something changed
288 * along the way and we need to switch to the slow path. Calling
289 * raise(3) will trigger this, for example. IRQs are off.
292 ENABLE_INTERRUPTS(CLBR_ANY)
295 call syscall_return_slowpath /* returns with IRQs disabled */
296 jmp return_from_SYSCALL_64
298 entry_SYSCALL64_slow_path:
302 call do_syscall_64 /* returns with IRQs disabled */
304 return_from_SYSCALL_64:
305 TRACE_IRQS_IRETQ /* we're about to change IF */
308 * Try to use SYSRET instead of IRET if we're returning to
309 * a completely clean 64-bit userspace context. If we're not,
310 * go to the slow exit path.
315 cmpq %rcx, %r11 /* SYSRET requires RCX == RIP */
316 jne swapgs_restore_regs_and_return_to_usermode
319 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
320 * in kernel space. This essentially lets the user take over
321 * the kernel, since userspace controls RSP.
323 * If width of "canonical tail" ever becomes variable, this will need
324 * to be updated to remain correct on both old and new CPUs.
326 * Change top bits to match most significant bit (47th or 56th bit
327 * depending on paging mode) in the address.
329 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
330 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
332 /* If this changed %rcx, it was not canonical */
334 jne swapgs_restore_regs_and_return_to_usermode
336 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
337 jne swapgs_restore_regs_and_return_to_usermode
340 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
341 jne swapgs_restore_regs_and_return_to_usermode
344 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
345 * restore RF properly. If the slowpath sets it for whatever reason, we
346 * need to restore it correctly.
348 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
349 * trap from userspace immediately after SYSRET. This would cause an
350 * infinite loop whenever #DB happens with register state that satisfies
351 * the opportunistic SYSRET conditions. For example, single-stepping
354 * movq $stuck_here, %rcx
359 * would never get past 'stuck_here'.
361 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
362 jnz swapgs_restore_regs_and_return_to_usermode
364 /* nothing to check for RSP */
366 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
367 jne swapgs_restore_regs_and_return_to_usermode
370 * We win! This label is here just for ease of understanding
371 * perf profiles. Nothing jumps here.
373 syscall_return_via_sysret:
374 /* rcx and r11 are already restored (see code above) */
377 .Lpop_c_regs_except_rcx_r11_and_sysret:
378 popq %rsi /* skip r11 */
383 popq %rsi /* skip rcx */
388 * Now all regs are restored except RSP and RDI.
389 * Save old stack pointer and switch to trampoline stack.
392 movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp
394 pushq RSP-RDI(%rdi) /* RSP */
395 pushq (%rdi) /* RDI */
398 * We are on the trampoline stack. All regs except RDI are live.
399 * We can do future final exit work right here.
405 END(entry_SYSCALL_64)
407 ENTRY(stub_ptregs_64)
409 * Syscalls marked as needing ptregs land here.
410 * If we are on the fast path, we need to save the extra regs,
411 * which we achieve by trying again on the slow path. If we are on
412 * the slow path, the extra regs are already saved.
414 * RAX stores a pointer to the C function implementing the syscall.
417 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
421 * Called from fast path -- disable IRQs again, pop return address
422 * and jump to slow path
424 DISABLE_INTERRUPTS(CLBR_ANY)
427 UNWIND_HINT_REGS extra=0
428 jmp entry_SYSCALL64_slow_path
431 jmp *%rax /* Called from C */
434 .macro ptregs_stub func
437 leaq \func(%rip), %rax
442 /* Instantiate ptregs_stub for each ptregs-using syscall */
443 #define __SYSCALL_64_QUAL_(sym)
444 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
445 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
446 #include <asm/syscalls_64.h>
452 ENTRY(__switch_to_asm)
455 * Save callee-saved registers
456 * This must match the order in inactive_task_frame
466 movq %rsp, TASK_threadsp(%rdi)
467 movq TASK_threadsp(%rsi), %rsp
469 #ifdef CONFIG_CC_STACKPROTECTOR
470 movq TASK_stack_canary(%rsi), %rbx
471 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
474 /* restore callee-saved registers */
486 * A newly forked process directly context switches into this address.
488 * rax: prev task we switched from
489 * rbx: kernel thread func (NULL for user thread)
490 * r12: kernel thread arg
495 call schedule_tail /* rdi: 'prev' task parameter */
497 testq %rbx, %rbx /* from kernel_thread? */
498 jnz 1f /* kernel threads are uncommon */
503 call syscall_return_slowpath /* returns with IRQs disabled */
504 TRACE_IRQS_ON /* user mode is traced as IRQS on */
505 jmp swapgs_restore_regs_and_return_to_usermode
512 * A kernel thread is allowed to return here after successfully
513 * calling do_execve(). Exit to userspace to complete the execve()
521 * Build the entry stubs with some assembler magic.
522 * We pack 1 stub into every 8-byte block.
525 ENTRY(irq_entries_start)
526 vector=FIRST_EXTERNAL_VECTOR
527 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
528 UNWIND_HINT_IRET_REGS
529 pushq $(~vector+0x80) /* Note: always in signed byte range */
534 END(irq_entries_start)
536 .macro DEBUG_ENTRY_ASSERT_IRQS_OFF
537 #ifdef CONFIG_DEBUG_ENTRY
540 testl $X86_EFLAGS_IF, %eax
549 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers
550 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone.
551 * Requires kernel GSBASE.
553 * The invariant is that, if irq_count != -1, then the IRQ stack is in use.
555 .macro ENTER_IRQ_STACK regs=1 old_rsp
556 DEBUG_ENTRY_ASSERT_IRQS_OFF
560 UNWIND_HINT_REGS base=\old_rsp
563 incl PER_CPU_VAR(irq_count)
564 jnz .Lirq_stack_push_old_rsp_\@
567 * Right now, if we just incremented irq_count to zero, we've
568 * claimed the IRQ stack but we haven't switched to it yet.
570 * If anything is added that can interrupt us here without using IST,
571 * it must be *extremely* careful to limit its stack usage. This
572 * could include kprobes and a hypothetical future IST-less #DB
575 * The OOPS unwinder relies on the word at the top of the IRQ
576 * stack linking back to the previous RSP for the entire time we're
577 * on the IRQ stack. For this to work reliably, we need to write
578 * it before we actually move ourselves to the IRQ stack.
581 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8)
582 movq PER_CPU_VAR(irq_stack_ptr), %rsp
584 #ifdef CONFIG_DEBUG_ENTRY
586 * If the first movq above becomes wrong due to IRQ stack layout
587 * changes, the only way we'll notice is if we try to unwind right
588 * here. Assert that we set up the stack right to catch this type
591 cmpq -8(%rsp), \old_rsp
592 je .Lirq_stack_okay\@
597 .Lirq_stack_push_old_rsp_\@:
601 UNWIND_HINT_REGS indirect=1
606 * Undoes ENTER_IRQ_STACK.
608 .macro LEAVE_IRQ_STACK regs=1
609 DEBUG_ENTRY_ASSERT_IRQS_OFF
610 /* We need to be off the IRQ stack before decrementing irq_count. */
618 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming
619 * the irq stack but we're not on it.
622 decl PER_CPU_VAR(irq_count)
626 * Interrupt entry/exit.
628 * Interrupt entry points save only callee clobbered registers in fast path.
630 * Entry runs with interrupts off.
633 /* 0(%rsp): ~(interrupt number) */
634 .macro interrupt func
637 testb $3, CS-ORIG_RAX(%rsp)
640 call switch_to_thread_stack
643 ALLOC_PT_GPREGS_ON_STACK
652 * IRQ from user mode.
654 * We need to tell lockdep that IRQs are off. We can't do this until
655 * we fix gsbase, and we should do it before enter_from_user_mode
656 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
657 * the simplest way to handle it is to just call it twice if
658 * we enter from user mode. There's no reason to optimize this since
659 * TRACE_IRQS_OFF is a no-op if lockdep is off.
663 CALL_enter_from_user_mode
666 ENTER_IRQ_STACK old_rsp=%rdi
667 /* We entered an interrupt context - irqs are off: */
670 call \func /* rdi points to pt_regs */
674 * The interrupt stubs push (~vector+0x80) onto the stack and
675 * then jump to common_interrupt.
677 .p2align CONFIG_X86_L1_CACHE_SHIFT
680 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
682 /* 0(%rsp): old RSP */
684 DISABLE_INTERRUPTS(CLBR_ANY)
692 /* Interrupt came from user space */
695 call prepare_exit_to_usermode
698 GLOBAL(swapgs_restore_regs_and_return_to_usermode)
699 #ifdef CONFIG_DEBUG_ENTRY
700 /* Assert that pt_regs indicates user mode. */
717 * The stack is now user RDI, orig_ax, RIP, CS, EFLAGS, RSP, SS.
718 * Save old stack pointer and switch to trampoline stack.
721 movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp
723 /* Copy the IRET frame to the trampoline stack. */
724 pushq 6*8(%rdi) /* SS */
725 pushq 5*8(%rdi) /* RSP */
726 pushq 4*8(%rdi) /* EFLAGS */
727 pushq 3*8(%rdi) /* CS */
728 pushq 2*8(%rdi) /* RIP */
730 /* Push user RDI on the trampoline stack. */
734 * We are on the trampoline stack. All regs except RDI are live.
735 * We can do future final exit work right here.
744 /* Returning to kernel space */
746 #ifdef CONFIG_PREEMPT
747 /* Interrupts are off */
748 /* Check if we need preemption */
749 bt $9, EFLAGS(%rsp) /* were interrupts off? */
751 0: cmpl $0, PER_CPU_VAR(__preempt_count)
753 call preempt_schedule_irq
758 * The iretq could re-enable interrupts:
762 GLOBAL(restore_regs_and_return_to_kernel)
763 #ifdef CONFIG_DEBUG_ENTRY
764 /* Assert that pt_regs indicates kernel mode. */
772 addq $8, %rsp /* skip regs->orig_ax */
776 UNWIND_HINT_IRET_REGS
778 * Are we returning to a stack segment from the LDT? Note: in
779 * 64-bit mode SS:RSP on the exception stack is always valid.
781 #ifdef CONFIG_X86_ESPFIX64
782 testb $4, (SS-RIP)(%rsp)
783 jnz native_irq_return_ldt
786 .global native_irq_return_iret
787 native_irq_return_iret:
789 * This may fault. Non-paranoid faults on return to userspace are
790 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
791 * Double-faults due to espfix64 are handled in do_double_fault.
792 * Other faults here are fatal.
796 #ifdef CONFIG_X86_ESPFIX64
797 native_irq_return_ldt:
799 * We are running with user GSBASE. All GPRs contain their user
800 * values. We have a percpu ESPFIX stack that is eight slots
801 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
802 * of the ESPFIX stack.
804 * We clobber RAX and RDI in this code. We stash RDI on the
805 * normal stack and RAX on the ESPFIX stack.
807 * The ESPFIX stack layout we set up looks like this:
809 * --- top of ESPFIX stack ---
814 * RIP <-- RSP points here when we're done
815 * RAX <-- espfix_waddr points here
816 * --- bottom of ESPFIX stack ---
819 pushq %rdi /* Stash user RDI */
821 movq PER_CPU_VAR(espfix_waddr), %rdi
822 movq %rax, (0*8)(%rdi) /* user RAX */
823 movq (1*8)(%rsp), %rax /* user RIP */
824 movq %rax, (1*8)(%rdi)
825 movq (2*8)(%rsp), %rax /* user CS */
826 movq %rax, (2*8)(%rdi)
827 movq (3*8)(%rsp), %rax /* user RFLAGS */
828 movq %rax, (3*8)(%rdi)
829 movq (5*8)(%rsp), %rax /* user SS */
830 movq %rax, (5*8)(%rdi)
831 movq (4*8)(%rsp), %rax /* user RSP */
832 movq %rax, (4*8)(%rdi)
833 /* Now RAX == RSP. */
835 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
836 popq %rdi /* Restore user RDI */
839 * espfix_stack[31:16] == 0. The page tables are set up such that
840 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
841 * espfix_waddr for any X. That is, there are 65536 RO aliases of
842 * the same page. Set up RSP so that RSP[31:16] contains the
843 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
844 * still points to an RO alias of the ESPFIX stack.
846 orq PER_CPU_VAR(espfix_stack), %rax
849 UNWIND_HINT_IRET_REGS offset=8
852 * At this point, we cannot write to the stack any more, but we can
855 popq %rax /* Restore user RAX */
858 * RSP now points to an ordinary IRET frame, except that the page
859 * is read-only and RSP[31:16] are preloaded with the userspace
860 * values. We can now IRET back to userspace.
862 jmp native_irq_return_iret
864 END(common_interrupt)
869 .macro apicinterrupt3 num sym do_sym
871 UNWIND_HINT_IRET_REGS
880 #ifdef CONFIG_TRACING
881 #define trace(sym) trace_##sym
882 #define smp_trace(sym) smp_trace_##sym
884 .macro trace_apicinterrupt num sym
885 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
888 .macro trace_apicinterrupt num sym do_sym
892 /* Make sure APIC interrupt handlers end up in the irqentry section: */
893 #define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
894 #define POP_SECTION_IRQENTRY .popsection
896 .macro apicinterrupt num sym do_sym
897 PUSH_SECTION_IRQENTRY
898 apicinterrupt3 \num \sym \do_sym
899 trace_apicinterrupt \num \sym
904 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
905 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
909 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
912 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
913 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
915 #ifdef CONFIG_HAVE_KVM
916 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
917 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
918 apicinterrupt3 POSTED_INTR_NESTED_VECTOR kvm_posted_intr_nested_ipi smp_kvm_posted_intr_nested_ipi
921 #ifdef CONFIG_X86_MCE_THRESHOLD
922 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
925 #ifdef CONFIG_X86_MCE_AMD
926 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
929 #ifdef CONFIG_X86_THERMAL_VECTOR
930 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
934 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
935 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
936 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
939 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
940 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
942 #ifdef CONFIG_IRQ_WORK
943 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
947 * Exception entry points.
949 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss_rw) + (TSS_ist + ((x) - 1) * 8)
952 * Switch to the thread stack. This is called with the IRET frame and
953 * orig_ax on the stack. (That is, RDI..R12 are not on the stack and
954 * space has not been allocated for them.)
956 ENTRY(switch_to_thread_stack)
961 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
962 UNWIND_HINT sp_offset=16 sp_reg=ORC_REG_DI
964 pushq 7*8(%rdi) /* regs->ss */
965 pushq 6*8(%rdi) /* regs->rsp */
966 pushq 5*8(%rdi) /* regs->eflags */
967 pushq 4*8(%rdi) /* regs->cs */
968 pushq 3*8(%rdi) /* regs->ip */
969 pushq 2*8(%rdi) /* regs->orig_ax */
970 pushq 8(%rdi) /* return address */
975 END(switch_to_thread_stack)
977 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
979 UNWIND_HINT_IRET_REGS offset=\has_error_code*8
982 .if \shift_ist != -1 && \paranoid == 0
983 .error "using shift_ist requires paranoid=1"
988 .if \has_error_code == 0
989 pushq $-1 /* ORIG_RAX: no syscall to restart */
992 ALLOC_PT_GPREGS_ON_STACK
995 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
996 jnz .Lfrom_usermode_switch_stack_\@
1005 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
1008 .if \shift_ist != -1
1009 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
1015 movq %rsp, %rdi /* pt_regs pointer */
1018 movq ORIG_RAX(%rsp), %rsi /* get error code */
1019 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
1021 xorl %esi, %esi /* no error code */
1024 .if \shift_ist != -1
1025 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1030 .if \shift_ist != -1
1031 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
1034 /* these procedures expect "no swapgs" flag in ebx */
1043 * Entry from userspace. Switch stacks and treat it
1044 * as a normal entry. This means that paranoid handlers
1045 * run in real process context if user_mode(regs).
1047 .Lfrom_usermode_switch_stack_\@:
1050 movq %rsp, %rdi /* pt_regs pointer */
1053 movq ORIG_RAX(%rsp), %rsi /* get error code */
1054 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
1056 xorl %esi, %esi /* no error code */
1061 jmp error_exit /* %ebx: no swapgs flag */
1066 idtentry divide_error do_divide_error has_error_code=0
1067 idtentry overflow do_overflow has_error_code=0
1068 idtentry bounds do_bounds has_error_code=0
1069 idtentry invalid_op do_invalid_op has_error_code=0
1070 idtentry device_not_available do_device_not_available has_error_code=0
1071 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
1072 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1073 idtentry invalid_TSS do_invalid_TSS has_error_code=1
1074 idtentry segment_not_present do_segment_not_present has_error_code=1
1075 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1076 idtentry coprocessor_error do_coprocessor_error has_error_code=0
1077 idtentry alignment_check do_alignment_check has_error_code=1
1078 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1082 * Reload gs selector with exception handling
1085 ENTRY(native_load_gs_index)
1088 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1092 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
1097 ENDPROC(native_load_gs_index)
1098 EXPORT_SYMBOL(native_load_gs_index)
1100 _ASM_EXTABLE(.Lgs_change, bad_gs)
1101 .section .fixup, "ax"
1102 /* running with kernelgs */
1104 SWAPGS /* switch back to user gs */
1106 /* This can't be a string because the preprocessor needs to see it. */
1107 movl $__USER_DS, %eax
1110 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
1116 /* Call softirq on interrupt stack. Interrupts are off. */
1117 ENTRY(do_softirq_own_stack)
1120 ENTER_IRQ_STACK regs=0 old_rsp=%r11
1122 LEAVE_IRQ_STACK regs=0
1125 ENDPROC(do_softirq_own_stack)
1128 idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1131 * A note on the "critical region" in our callback handler.
1132 * We want to avoid stacking callback handlers due to events occurring
1133 * during handling of the last event. To do this, we keep events disabled
1134 * until we've done all processing. HOWEVER, we must enable events before
1135 * popping the stack frame (can't be done atomically) and so it would still
1136 * be possible to get enough handler activations to overflow the stack.
1137 * Although unlikely, bugs of that kind are hard to track down, so we'd
1138 * like to avoid the possibility.
1139 * So, on entry to the handler we detect whether we interrupted an
1140 * existing activation in its critical region -- if so, we pop the current
1141 * activation and restart the handler using the previous one.
1143 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
1146 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1147 * see the correct pointer to the pt_regs
1150 movq %rdi, %rsp /* we don't return, adjust the stack frame */
1153 ENTER_IRQ_STACK old_rsp=%r10
1154 call xen_evtchn_do_upcall
1157 #ifndef CONFIG_PREEMPT
1158 call xen_maybe_preempt_hcall
1161 END(xen_do_hypervisor_callback)
1164 * Hypervisor uses this for application faults while it executes.
1165 * We get here for two reasons:
1166 * 1. Fault while reloading DS, ES, FS or GS
1167 * 2. Fault while executing IRET
1168 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1169 * registers that could be reloaded and zeroed the others.
1170 * Category 2 we fix up by killing the current process. We cannot use the
1171 * normal Linux return path in this case because if we use the IRET hypercall
1172 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1173 * We distinguish between categories by comparing each saved segment register
1174 * with its current contents: any discrepancy means we in category 1.
1176 ENTRY(xen_failsafe_callback)
1179 cmpw %cx, 0x10(%rsp)
1182 cmpw %cx, 0x18(%rsp)
1185 cmpw %cx, 0x20(%rsp)
1188 cmpw %cx, 0x28(%rsp)
1190 /* All segments match their saved values => Category 2 (Bad IRET). */
1195 UNWIND_HINT_IRET_REGS offset=8
1196 jmp general_protection
1197 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1201 UNWIND_HINT_IRET_REGS
1202 pushq $-1 /* orig_ax = -1 => not a system call */
1203 ALLOC_PT_GPREGS_ON_STACK
1206 ENCODE_FRAME_POINTER
1208 END(xen_failsafe_callback)
1210 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1211 xen_hvm_callback_vector xen_evtchn_do_upcall
1213 #endif /* CONFIG_XEN */
1215 #if IS_ENABLED(CONFIG_HYPERV)
1216 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1217 hyperv_callback_vector hyperv_vector_handler
1218 #endif /* CONFIG_HYPERV */
1220 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1221 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1222 idtentry stack_segment do_stack_segment has_error_code=1
1225 idtentry xennmi do_nmi has_error_code=0
1226 idtentry xendebug do_debug has_error_code=0
1227 idtentry xenint3 do_int3 has_error_code=0
1230 idtentry general_protection do_general_protection has_error_code=1
1231 idtentry page_fault do_page_fault has_error_code=1
1233 #ifdef CONFIG_KVM_GUEST
1234 idtentry async_page_fault do_async_page_fault has_error_code=1
1237 #ifdef CONFIG_X86_MCE
1238 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1242 * Save all registers in pt_regs, and switch gs if needed.
1243 * Use slow, but surefire "are we in kernel?" check.
1244 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1246 ENTRY(paranoid_entry)
1251 ENCODE_FRAME_POINTER 8
1253 movl $MSR_GS_BASE, %ecx
1256 js 1f /* negative -> in kernel */
1263 * "Paranoid" exit path from exception stack. This is invoked
1264 * only on return from non-NMI IST interrupts that came
1265 * from kernel space.
1267 * We may be returning to very strange contexts (e.g. very early
1268 * in syscall entry), so checking for preemption here would
1269 * be complicated. Fortunately, we there's no good reason
1270 * to try to handle preemption here.
1272 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1274 ENTRY(paranoid_exit)
1276 DISABLE_INTERRUPTS(CLBR_ANY)
1277 TRACE_IRQS_OFF_DEBUG
1278 testl %ebx, %ebx /* swapgs needed? */
1279 jnz .Lparanoid_exit_no_swapgs
1282 jmp .Lparanoid_exit_restore
1283 .Lparanoid_exit_no_swapgs:
1284 TRACE_IRQS_IRETQ_DEBUG
1285 .Lparanoid_exit_restore:
1286 jmp restore_regs_and_return_to_kernel
1290 * Save all registers in pt_regs, and switch gs if needed.
1291 * Return: EBX=0: came from user mode; EBX=1: otherwise
1298 ENCODE_FRAME_POINTER 8
1300 testb $3, CS+8(%rsp)
1301 jz .Lerror_kernelspace
1304 * We entered from user mode or we're pretending to have entered
1305 * from user mode due to an IRET fault.
1309 .Lerror_entry_from_usermode_after_swapgs:
1310 /* Put us onto the real thread stack. */
1311 popq %r12 /* save return addr in %12 */
1312 movq %rsp, %rdi /* arg0 = pt_regs pointer */
1314 movq %rax, %rsp /* switch stack */
1315 ENCODE_FRAME_POINTER
1319 * We need to tell lockdep that IRQs are off. We can't do this until
1320 * we fix gsbase, and we should do it before enter_from_user_mode
1321 * (which can take locks).
1324 CALL_enter_from_user_mode
1332 * There are two places in the kernel that can potentially fault with
1333 * usergs. Handle them here. B stepping K8s sometimes report a
1334 * truncated RIP for IRET exceptions returning to compat mode. Check
1335 * for these here too.
1337 .Lerror_kernelspace:
1339 leaq native_irq_return_iret(%rip), %rcx
1340 cmpq %rcx, RIP+8(%rsp)
1342 movl %ecx, %eax /* zero extend */
1343 cmpq %rax, RIP+8(%rsp)
1345 cmpq $.Lgs_change, RIP+8(%rsp)
1346 jne .Lerror_entry_done
1349 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1350 * gsbase and proceed. We'll fix up the exception and land in
1351 * .Lgs_change's error handler with kernel gsbase.
1354 jmp .Lerror_entry_done
1357 /* Fix truncated RIP */
1358 movq %rcx, RIP+8(%rsp)
1363 * We came from an IRET to user mode, so we have user gsbase.
1364 * Switch to kernel gsbase:
1369 * Pretend that the exception came from user mode: set up pt_regs
1370 * as if we faulted immediately after IRET and clear EBX so that
1371 * error_exit knows that we will be returning to user mode.
1377 jmp .Lerror_entry_from_usermode_after_swapgs
1382 * On entry, EBX is a "return to kernel mode" flag:
1383 * 1: already in kernel mode, don't need SWAPGS
1384 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1388 DISABLE_INTERRUPTS(CLBR_ANY)
1396 * Runs on exception stack. Xen PV does not go through this path at all,
1397 * so we can use real assembly here.
1400 UNWIND_HINT_IRET_REGS
1403 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1404 * the iretq it performs will take us out of NMI context.
1405 * This means that we can have nested NMIs where the next
1406 * NMI is using the top of the stack of the previous NMI. We
1407 * can't let it execute because the nested NMI will corrupt the
1408 * stack of the previous NMI. NMI handlers are not re-entrant
1411 * To handle this case we do the following:
1412 * Check the a special location on the stack that contains
1413 * a variable that is set when NMIs are executing.
1414 * The interrupted task's stack is also checked to see if it
1416 * If the variable is not set and the stack is not the NMI
1418 * o Set the special variable on the stack
1419 * o Copy the interrupt frame into an "outermost" location on the
1421 * o Copy the interrupt frame into an "iret" location on the stack
1422 * o Continue processing the NMI
1423 * If the variable is set or the previous stack is the NMI stack:
1424 * o Modify the "iret" location to jump to the repeat_nmi
1425 * o return back to the first NMI
1427 * Now on exit of the first NMI, we first clear the stack variable
1428 * The NMI stack will tell any nested NMIs at that point that it is
1429 * nested. Then we pop the stack normally with iret, and if there was
1430 * a nested NMI that updated the copy interrupt stack frame, a
1431 * jump will be made to the repeat_nmi code that will handle the second
1434 * However, espfix prevents us from directly returning to userspace
1435 * with a single IRET instruction. Similarly, IRET to user mode
1436 * can fault. We therefore handle NMIs from user space like
1437 * other IST entries.
1442 /* Use %rdx as our temp variable throughout */
1445 testb $3, CS-RIP+8(%rsp)
1446 jz .Lnmi_from_kernel
1449 * NMI from user mode. We need to run on the thread stack, but we
1450 * can't go through the normal entry paths: NMIs are masked, and
1451 * we don't want to enable interrupts, because then we'll end
1452 * up in an awkward situation in which IRQs are on but NMIs
1455 * We also must not push anything to the stack before switching
1456 * stacks lest we corrupt the "NMI executing" variable.
1462 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1463 UNWIND_HINT_IRET_REGS base=%rdx offset=8
1464 pushq 5*8(%rdx) /* pt_regs->ss */
1465 pushq 4*8(%rdx) /* pt_regs->rsp */
1466 pushq 3*8(%rdx) /* pt_regs->flags */
1467 pushq 2*8(%rdx) /* pt_regs->cs */
1468 pushq 1*8(%rdx) /* pt_regs->rip */
1469 UNWIND_HINT_IRET_REGS
1470 pushq $-1 /* pt_regs->orig_ax */
1471 pushq %rdi /* pt_regs->di */
1472 pushq %rsi /* pt_regs->si */
1473 pushq (%rdx) /* pt_regs->dx */
1474 pushq %rcx /* pt_regs->cx */
1475 pushq %rax /* pt_regs->ax */
1476 pushq %r8 /* pt_regs->r8 */
1477 pushq %r9 /* pt_regs->r9 */
1478 pushq %r10 /* pt_regs->r10 */
1479 pushq %r11 /* pt_regs->r11 */
1480 pushq %rbx /* pt_regs->rbx */
1481 pushq %rbp /* pt_regs->rbp */
1482 pushq %r12 /* pt_regs->r12 */
1483 pushq %r13 /* pt_regs->r13 */
1484 pushq %r14 /* pt_regs->r14 */
1485 pushq %r15 /* pt_regs->r15 */
1487 ENCODE_FRAME_POINTER
1490 * At this point we no longer need to worry about stack damage
1491 * due to nesting -- we're on the normal thread stack and we're
1492 * done with the NMI stack.
1500 * Return back to user mode. We must *not* do the normal exit
1501 * work, because we don't want to enable interrupts.
1503 jmp swapgs_restore_regs_and_return_to_usermode
1507 * Here's what our stack frame will look like:
1508 * +---------------------------------------------------------+
1510 * | original Return RSP |
1511 * | original RFLAGS |
1514 * +---------------------------------------------------------+
1515 * | temp storage for rdx |
1516 * +---------------------------------------------------------+
1517 * | "NMI executing" variable |
1518 * +---------------------------------------------------------+
1519 * | iret SS } Copied from "outermost" frame |
1520 * | iret Return RSP } on each loop iteration; overwritten |
1521 * | iret RFLAGS } by a nested NMI to force another |
1522 * | iret CS } iteration if needed. |
1524 * +---------------------------------------------------------+
1525 * | outermost SS } initialized in first_nmi; |
1526 * | outermost Return RSP } will not be changed before |
1527 * | outermost RFLAGS } NMI processing is done. |
1528 * | outermost CS } Copied to "iret" frame on each |
1529 * | outermost RIP } iteration. |
1530 * +---------------------------------------------------------+
1532 * +---------------------------------------------------------+
1534 * The "original" frame is used by hardware. Before re-enabling
1535 * NMIs, we need to be done with it, and we need to leave enough
1536 * space for the asm code here.
1538 * We return by executing IRET while RSP points to the "iret" frame.
1539 * That will either return for real or it will loop back into NMI
1542 * The "outermost" frame is copied to the "iret" frame on each
1543 * iteration of the loop, so each iteration starts with the "iret"
1544 * frame pointing to the final return target.
1548 * Determine whether we're a nested NMI.
1550 * If we interrupted kernel code between repeat_nmi and
1551 * end_repeat_nmi, then we are a nested NMI. We must not
1552 * modify the "iret" frame because it's being written by
1553 * the outer NMI. That's okay; the outer NMI handler is
1554 * about to about to call do_nmi anyway, so we can just
1555 * resume the outer NMI.
1558 movq $repeat_nmi, %rdx
1561 movq $end_repeat_nmi, %rdx
1567 * Now check "NMI executing". If it's set, then we're nested.
1568 * This will not detect if we interrupted an outer NMI just
1575 * Now test if the previous stack was an NMI stack. This covers
1576 * the case where we interrupt an outer NMI after it clears
1577 * "NMI executing" but before IRET. We need to be careful, though:
1578 * there is one case in which RSP could point to the NMI stack
1579 * despite there being no NMI active: naughty userspace controls
1580 * RSP at the very beginning of the SYSCALL targets. We can
1581 * pull a fast one on naughty userspace, though: we program
1582 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1583 * if it controls the kernel's RSP. We set DF before we clear
1587 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1588 cmpq %rdx, 4*8(%rsp)
1589 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1592 subq $EXCEPTION_STKSZ, %rdx
1593 cmpq %rdx, 4*8(%rsp)
1594 /* If it is below the NMI stack, it is a normal NMI */
1597 /* Ah, it is within the NMI stack. */
1599 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1600 jz first_nmi /* RSP was user controlled. */
1602 /* This is a nested NMI. */
1606 * Modify the "iret" frame to point to repeat_nmi, forcing another
1607 * iteration of NMI handling.
1610 leaq -10*8(%rsp), %rdx
1617 /* Put stack back */
1623 /* We are returning to kernel mode, so this cannot result in a fault. */
1630 /* Make room for "NMI executing". */
1633 /* Leave room for the "iret" frame */
1636 /* Copy the "original" frame to the "outermost" frame */
1640 UNWIND_HINT_IRET_REGS
1642 /* Everything up to here is safe from nested NMIs */
1644 #ifdef CONFIG_DEBUG_ENTRY
1646 * For ease of testing, unmask NMIs right away. Disabled by
1647 * default because IRET is very expensive.
1650 pushq %rsp /* RSP (minus 8 because of the previous push) */
1651 addq $8, (%rsp) /* Fix up RSP */
1653 pushq $__KERNEL_CS /* CS */
1655 iretq /* continues at repeat_nmi below */
1656 UNWIND_HINT_IRET_REGS
1662 * If there was a nested NMI, the first NMI's iret will return
1663 * here. But NMIs are still enabled and we can take another
1664 * nested NMI. The nested NMI checks the interrupted RIP to see
1665 * if it is between repeat_nmi and end_repeat_nmi, and if so
1666 * it will just return, as we are about to repeat an NMI anyway.
1667 * This makes it safe to copy to the stack frame that a nested
1670 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1671 * we're repeating an NMI, gsbase has the same value that it had on
1672 * the first iteration. paranoid_entry will load the kernel
1673 * gsbase if needed before we call do_nmi. "NMI executing"
1676 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1679 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1680 * here must not modify the "iret" frame while we're writing to
1681 * it or it will end up containing garbage.
1691 * Everything below this point can be preempted by a nested NMI.
1692 * If this happens, then the inner NMI will change the "iret"
1693 * frame to point back to repeat_nmi.
1695 pushq $-1 /* ORIG_RAX: no syscall to restart */
1696 ALLOC_PT_GPREGS_ON_STACK
1699 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1700 * as we should not be calling schedule in NMI context.
1701 * Even with normal interrupts enabled. An NMI should not be
1702 * setting NEED_RESCHED or anything that normal interrupts and
1703 * exceptions might do.
1708 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1713 testl %ebx, %ebx /* swapgs needed? */
1722 * Skip orig_ax and the "outermost" frame to point RSP at the "iret"
1723 * at the "iret" frame.
1728 * Clear "NMI executing". Set DF first so that we can easily
1729 * distinguish the remaining code between here and IRET from
1730 * the SYSCALL entry and exit paths.
1732 * We arguably should just inspect RIP instead, but I (Andy) wrote
1733 * this code when I had the misapprehension that Xen PV supported
1734 * NMIs, and Xen PV would break that approach.
1737 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1740 * iretq reads the "iret" frame and exits the NMI stack in a
1741 * single instruction. We are returning to kernel mode, so this
1742 * cannot result in a fault. Similarly, we don't need to worry
1743 * about espfix64 on the way back to kernel mode.
1748 ENTRY(ignore_sysret)
1754 ENTRY(rewind_stack_do_exit)
1756 /* Prevent any naive code from trying to unwind to our caller. */
1759 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1760 leaq -PTREGS_SIZE(%rax), %rsp
1761 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE
1764 END(rewind_stack_do_exit)