2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 * entry.S contains the system-call and fault low-level handling routines.
10 * Some of this is documented in Documentation/x86/entry_64.txt
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/export.h>
39 #include <asm/frame.h>
40 #include <linux/err.h>
43 .section .entry.text, "ax"
45 #ifdef CONFIG_PARAVIRT
46 ENTRY(native_usergs_sysret64)
50 END(native_usergs_sysret64)
51 #endif /* CONFIG_PARAVIRT */
53 .macro TRACE_IRQS_IRETQ
54 #ifdef CONFIG_TRACE_IRQFLAGS
55 bt $9, EFLAGS(%rsp) /* interrupts off? */
63 * When dynamic function tracer is enabled it will add a breakpoint
64 * to all locations that it is about to modify, sync CPUs, update
65 * all the code, sync CPUs, then remove the breakpoints. In this time
66 * if lockdep is enabled, it might jump back into the debug handler
67 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
69 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
70 * make sure the stack pointer does not get reset back to the top
71 * of the debug stack, and instead just reuses the current stack.
73 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
75 .macro TRACE_IRQS_OFF_DEBUG
76 call debug_stack_set_zero
78 call debug_stack_reset
81 .macro TRACE_IRQS_ON_DEBUG
82 call debug_stack_set_zero
84 call debug_stack_reset
87 .macro TRACE_IRQS_IRETQ_DEBUG
88 bt $9, EFLAGS(%rsp) /* interrupts off? */
95 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
96 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
97 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
101 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
103 * This is the only entry point used for 64-bit system calls. The
104 * hardware interface is reasonably well designed and the register to
105 * argument mapping Linux uses fits well with the registers that are
106 * available when SYSCALL is used.
108 * SYSCALL instructions can be found inlined in libc implementations as
109 * well as some other programs and libraries. There are also a handful
110 * of SYSCALL instructions in the vDSO used, for example, as a
111 * clock_gettimeofday fallback.
113 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
114 * then loads new ss, cs, and rip from previously programmed MSRs.
115 * rflags gets masked by a value from another MSR (so CLD and CLAC
116 * are not needed). SYSCALL does not save anything on the stack
117 * and does not change rsp.
119 * Registers on entry:
120 * rax system call number
122 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
126 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
129 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
131 * Only called from user space.
133 * When user can change pt_regs->foo always force IRET. That is because
134 * it deals with uncanonical addresses better. SYSRET has trouble
135 * with them due to bugs in both AMD and Intel CPUs.
138 ENTRY(entry_SYSCALL_64)
141 * Interrupts are off on entry.
142 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
143 * it is too small to ever cause noticeable irq latency.
147 movq %rsp, PER_CPU_VAR(rsp_scratch)
148 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
152 /* Construct struct pt_regs on stack */
153 pushq $__USER_DS /* pt_regs->ss */
154 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
155 pushq %r11 /* pt_regs->flags */
156 pushq $__USER_CS /* pt_regs->cs */
157 pushq %rcx /* pt_regs->ip */
158 GLOBAL(entry_SYSCALL_64_after_hwframe)
159 pushq %rax /* pt_regs->orig_ax */
160 pushq %rdi /* pt_regs->di */
161 pushq %rsi /* pt_regs->si */
162 pushq %rdx /* pt_regs->dx */
163 pushq %rcx /* pt_regs->cx */
164 pushq $-ENOSYS /* pt_regs->ax */
165 pushq %r8 /* pt_regs->r8 */
166 pushq %r9 /* pt_regs->r9 */
167 pushq %r10 /* pt_regs->r10 */
168 pushq %r11 /* pt_regs->r11 */
169 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
170 UNWIND_HINT_REGS extra=0
173 * If we need to do entry work or if we guess we'll need to do
174 * exit work, go straight to the slow path.
176 movq PER_CPU_VAR(current_task), %r11
177 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
178 jnz entry_SYSCALL64_slow_path
180 entry_SYSCALL_64_fastpath:
182 * Easy case: enable interrupts and issue the syscall. If the syscall
183 * needs pt_regs, we'll call a stub that disables interrupts again
184 * and jumps to the slow path.
187 ENABLE_INTERRUPTS(CLBR_NONE)
188 #if __SYSCALL_MASK == ~0
189 cmpq $__NR_syscall_max, %rax
191 andl $__SYSCALL_MASK, %eax
192 cmpl $__NR_syscall_max, %eax
194 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
198 * This call instruction is handled specially in stub_ptregs_64.
199 * It might end up jumping to the slow path. If it jumps, RAX
200 * and all argument registers are clobbered.
202 call *sys_call_table(, %rax, 8)
203 .Lentry_SYSCALL_64_after_fastpath_call:
209 * If we get here, then we know that pt_regs is clean for SYSRET64.
210 * If we see that no exit work is required (which we are required
211 * to check with IRQs off), then we can go straight to SYSRET64.
213 DISABLE_INTERRUPTS(CLBR_ANY)
215 movq PER_CPU_VAR(current_task), %r11
216 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
220 TRACE_IRQS_ON /* user mode is traced as IRQs on */
222 movq EFLAGS(%rsp), %r11
223 RESTORE_C_REGS_EXCEPT_RCX_R11
230 * The fast path looked good when we started, but something changed
231 * along the way and we need to switch to the slow path. Calling
232 * raise(3) will trigger this, for example. IRQs are off.
235 ENABLE_INTERRUPTS(CLBR_ANY)
238 call syscall_return_slowpath /* returns with IRQs disabled */
239 jmp return_from_SYSCALL_64
241 entry_SYSCALL64_slow_path:
245 call do_syscall_64 /* returns with IRQs disabled */
247 return_from_SYSCALL_64:
248 TRACE_IRQS_IRETQ /* we're about to change IF */
251 * Try to use SYSRET instead of IRET if we're returning to
252 * a completely clean 64-bit userspace context. If we're not,
253 * go to the slow exit path.
258 cmpq %rcx, %r11 /* SYSRET requires RCX == RIP */
259 jne swapgs_restore_regs_and_return_to_usermode
262 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
263 * in kernel space. This essentially lets the user take over
264 * the kernel, since userspace controls RSP.
266 * If width of "canonical tail" ever becomes variable, this will need
267 * to be updated to remain correct on both old and new CPUs.
269 * Change top bits to match most significant bit (47th or 56th bit
270 * depending on paging mode) in the address.
272 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
273 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
275 /* If this changed %rcx, it was not canonical */
277 jne swapgs_restore_regs_and_return_to_usermode
279 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
280 jne swapgs_restore_regs_and_return_to_usermode
283 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
284 jne swapgs_restore_regs_and_return_to_usermode
287 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
288 * restore RF properly. If the slowpath sets it for whatever reason, we
289 * need to restore it correctly.
291 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
292 * trap from userspace immediately after SYSRET. This would cause an
293 * infinite loop whenever #DB happens with register state that satisfies
294 * the opportunistic SYSRET conditions. For example, single-stepping
297 * movq $stuck_here, %rcx
302 * would never get past 'stuck_here'.
304 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
305 jnz swapgs_restore_regs_and_return_to_usermode
307 /* nothing to check for RSP */
309 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
310 jne swapgs_restore_regs_and_return_to_usermode
313 * We win! This label is here just for ease of understanding
314 * perf profiles. Nothing jumps here.
316 syscall_return_via_sysret:
317 /* rcx and r11 are already restored (see code above) */
319 RESTORE_C_REGS_EXCEPT_RCX_R11
323 END(entry_SYSCALL_64)
325 ENTRY(stub_ptregs_64)
327 * Syscalls marked as needing ptregs land here.
328 * If we are on the fast path, we need to save the extra regs,
329 * which we achieve by trying again on the slow path. If we are on
330 * the slow path, the extra regs are already saved.
332 * RAX stores a pointer to the C function implementing the syscall.
335 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
339 * Called from fast path -- disable IRQs again, pop return address
340 * and jump to slow path
342 DISABLE_INTERRUPTS(CLBR_ANY)
345 UNWIND_HINT_REGS extra=0
346 jmp entry_SYSCALL64_slow_path
349 jmp *%rax /* Called from C */
352 .macro ptregs_stub func
355 leaq \func(%rip), %rax
360 /* Instantiate ptregs_stub for each ptregs-using syscall */
361 #define __SYSCALL_64_QUAL_(sym)
362 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
363 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
364 #include <asm/syscalls_64.h>
370 ENTRY(__switch_to_asm)
373 * Save callee-saved registers
374 * This must match the order in inactive_task_frame
384 movq %rsp, TASK_threadsp(%rdi)
385 movq TASK_threadsp(%rsi), %rsp
387 #ifdef CONFIG_CC_STACKPROTECTOR
388 movq TASK_stack_canary(%rsi), %rbx
389 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
392 /* restore callee-saved registers */
404 * A newly forked process directly context switches into this address.
406 * rax: prev task we switched from
407 * rbx: kernel thread func (NULL for user thread)
408 * r12: kernel thread arg
413 call schedule_tail /* rdi: 'prev' task parameter */
415 testq %rbx, %rbx /* from kernel_thread? */
416 jnz 1f /* kernel threads are uncommon */
421 call syscall_return_slowpath /* returns with IRQs disabled */
422 TRACE_IRQS_ON /* user mode is traced as IRQS on */
423 jmp swapgs_restore_regs_and_return_to_usermode
430 * A kernel thread is allowed to return here after successfully
431 * calling do_execve(). Exit to userspace to complete the execve()
439 * Build the entry stubs with some assembler magic.
440 * We pack 1 stub into every 8-byte block.
443 ENTRY(irq_entries_start)
444 vector=FIRST_EXTERNAL_VECTOR
445 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
446 UNWIND_HINT_IRET_REGS
447 pushq $(~vector+0x80) /* Note: always in signed byte range */
452 END(irq_entries_start)
454 .macro DEBUG_ENTRY_ASSERT_IRQS_OFF
455 #ifdef CONFIG_DEBUG_ENTRY
457 testl $X86_EFLAGS_IF, (%rsp)
466 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers
467 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone.
468 * Requires kernel GSBASE.
470 * The invariant is that, if irq_count != -1, then the IRQ stack is in use.
472 .macro ENTER_IRQ_STACK regs=1 old_rsp
473 DEBUG_ENTRY_ASSERT_IRQS_OFF
477 UNWIND_HINT_REGS base=\old_rsp
480 incl PER_CPU_VAR(irq_count)
481 jnz .Lirq_stack_push_old_rsp_\@
484 * Right now, if we just incremented irq_count to zero, we've
485 * claimed the IRQ stack but we haven't switched to it yet.
487 * If anything is added that can interrupt us here without using IST,
488 * it must be *extremely* careful to limit its stack usage. This
489 * could include kprobes and a hypothetical future IST-less #DB
492 * The OOPS unwinder relies on the word at the top of the IRQ
493 * stack linking back to the previous RSP for the entire time we're
494 * on the IRQ stack. For this to work reliably, we need to write
495 * it before we actually move ourselves to the IRQ stack.
498 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8)
499 movq PER_CPU_VAR(irq_stack_ptr), %rsp
501 #ifdef CONFIG_DEBUG_ENTRY
503 * If the first movq above becomes wrong due to IRQ stack layout
504 * changes, the only way we'll notice is if we try to unwind right
505 * here. Assert that we set up the stack right to catch this type
508 cmpq -8(%rsp), \old_rsp
509 je .Lirq_stack_okay\@
514 .Lirq_stack_push_old_rsp_\@:
518 UNWIND_HINT_REGS indirect=1
523 * Undoes ENTER_IRQ_STACK.
525 .macro LEAVE_IRQ_STACK regs=1
526 DEBUG_ENTRY_ASSERT_IRQS_OFF
527 /* We need to be off the IRQ stack before decrementing irq_count. */
535 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming
536 * the irq stack but we're not on it.
539 decl PER_CPU_VAR(irq_count)
543 * Interrupt entry/exit.
545 * Interrupt entry points save only callee clobbered registers in fast path.
547 * Entry runs with interrupts off.
550 /* 0(%rsp): ~(interrupt number) */
551 .macro interrupt func
553 ALLOC_PT_GPREGS_ON_STACK
562 * IRQ from user mode. Switch to kernel gsbase and inform context
563 * tracking that we're in kernel mode.
568 * We need to tell lockdep that IRQs are off. We can't do this until
569 * we fix gsbase, and we should do it before enter_from_user_mode
570 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
571 * the simplest way to handle it is to just call it twice if
572 * we enter from user mode. There's no reason to optimize this since
573 * TRACE_IRQS_OFF is a no-op if lockdep is off.
577 CALL_enter_from_user_mode
580 ENTER_IRQ_STACK old_rsp=%rdi
581 /* We entered an interrupt context - irqs are off: */
584 call \func /* rdi points to pt_regs */
588 * The interrupt stubs push (~vector+0x80) onto the stack and
589 * then jump to common_interrupt.
591 .p2align CONFIG_X86_L1_CACHE_SHIFT
594 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
596 /* 0(%rsp): old RSP */
598 DISABLE_INTERRUPTS(CLBR_ANY)
606 /* Interrupt came from user space */
609 call prepare_exit_to_usermode
612 GLOBAL(swapgs_restore_regs_and_return_to_usermode)
613 #ifdef CONFIG_DEBUG_ENTRY
614 /* Assert that pt_regs indicates user mode. */
623 addq $8, %rsp /* skip regs->orig_ax */
627 /* Returning to kernel space */
629 #ifdef CONFIG_PREEMPT
630 /* Interrupts are off */
631 /* Check if we need preemption */
632 bt $9, EFLAGS(%rsp) /* were interrupts off? */
634 0: cmpl $0, PER_CPU_VAR(__preempt_count)
636 call preempt_schedule_irq
641 * The iretq could re-enable interrupts:
645 GLOBAL(restore_regs_and_return_to_kernel)
646 #ifdef CONFIG_DEBUG_ENTRY
647 /* Assert that pt_regs indicates kernel mode. */
655 addq $8, %rsp /* skip regs->orig_ax */
659 UNWIND_HINT_IRET_REGS
661 * Are we returning to a stack segment from the LDT? Note: in
662 * 64-bit mode SS:RSP on the exception stack is always valid.
664 #ifdef CONFIG_X86_ESPFIX64
665 testb $4, (SS-RIP)(%rsp)
666 jnz native_irq_return_ldt
669 .global native_irq_return_iret
670 native_irq_return_iret:
672 * This may fault. Non-paranoid faults on return to userspace are
673 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
674 * Double-faults due to espfix64 are handled in do_double_fault.
675 * Other faults here are fatal.
679 #ifdef CONFIG_X86_ESPFIX64
680 native_irq_return_ldt:
682 * We are running with user GSBASE. All GPRs contain their user
683 * values. We have a percpu ESPFIX stack that is eight slots
684 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
685 * of the ESPFIX stack.
687 * We clobber RAX and RDI in this code. We stash RDI on the
688 * normal stack and RAX on the ESPFIX stack.
690 * The ESPFIX stack layout we set up looks like this:
692 * --- top of ESPFIX stack ---
697 * RIP <-- RSP points here when we're done
698 * RAX <-- espfix_waddr points here
699 * --- bottom of ESPFIX stack ---
702 pushq %rdi /* Stash user RDI */
704 movq PER_CPU_VAR(espfix_waddr), %rdi
705 movq %rax, (0*8)(%rdi) /* user RAX */
706 movq (1*8)(%rsp), %rax /* user RIP */
707 movq %rax, (1*8)(%rdi)
708 movq (2*8)(%rsp), %rax /* user CS */
709 movq %rax, (2*8)(%rdi)
710 movq (3*8)(%rsp), %rax /* user RFLAGS */
711 movq %rax, (3*8)(%rdi)
712 movq (5*8)(%rsp), %rax /* user SS */
713 movq %rax, (5*8)(%rdi)
714 movq (4*8)(%rsp), %rax /* user RSP */
715 movq %rax, (4*8)(%rdi)
716 /* Now RAX == RSP. */
718 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
719 popq %rdi /* Restore user RDI */
722 * espfix_stack[31:16] == 0. The page tables are set up such that
723 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
724 * espfix_waddr for any X. That is, there are 65536 RO aliases of
725 * the same page. Set up RSP so that RSP[31:16] contains the
726 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
727 * still points to an RO alias of the ESPFIX stack.
729 orq PER_CPU_VAR(espfix_stack), %rax
732 UNWIND_HINT_IRET_REGS offset=8
735 * At this point, we cannot write to the stack any more, but we can
738 popq %rax /* Restore user RAX */
741 * RSP now points to an ordinary IRET frame, except that the page
742 * is read-only and RSP[31:16] are preloaded with the userspace
743 * values. We can now IRET back to userspace.
745 jmp native_irq_return_iret
747 END(common_interrupt)
752 .macro apicinterrupt3 num sym do_sym
754 UNWIND_HINT_IRET_REGS
763 #ifdef CONFIG_TRACING
764 #define trace(sym) trace_##sym
765 #define smp_trace(sym) smp_trace_##sym
767 .macro trace_apicinterrupt num sym
768 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
771 .macro trace_apicinterrupt num sym do_sym
775 /* Make sure APIC interrupt handlers end up in the irqentry section: */
776 #define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
777 #define POP_SECTION_IRQENTRY .popsection
779 .macro apicinterrupt num sym do_sym
780 PUSH_SECTION_IRQENTRY
781 apicinterrupt3 \num \sym \do_sym
782 trace_apicinterrupt \num \sym
787 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
788 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
792 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
795 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
796 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
798 #ifdef CONFIG_HAVE_KVM
799 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
800 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
801 apicinterrupt3 POSTED_INTR_NESTED_VECTOR kvm_posted_intr_nested_ipi smp_kvm_posted_intr_nested_ipi
804 #ifdef CONFIG_X86_MCE_THRESHOLD
805 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
808 #ifdef CONFIG_X86_MCE_AMD
809 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
812 #ifdef CONFIG_X86_THERMAL_VECTOR
813 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
817 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
818 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
819 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
822 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
823 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
825 #ifdef CONFIG_IRQ_WORK
826 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
830 * Exception entry points.
832 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
834 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
836 UNWIND_HINT_IRET_REGS offset=\has_error_code*8
839 .if \shift_ist != -1 && \paranoid == 0
840 .error "using shift_ist requires paranoid=1"
845 .if \has_error_code == 0
846 pushq $-1 /* ORIG_RAX: no syscall to restart */
849 ALLOC_PT_GPREGS_ON_STACK
853 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
861 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
865 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
871 movq %rsp, %rdi /* pt_regs pointer */
874 movq ORIG_RAX(%rsp), %rsi /* get error code */
875 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
877 xorl %esi, %esi /* no error code */
881 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
887 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
890 /* these procedures expect "no swapgs" flag in ebx */
899 * Paranoid entry from userspace. Switch stacks and treat it
900 * as a normal entry. This means that paranoid handlers
901 * run in real process context if user_mode(regs).
907 movq %rsp, %rdi /* pt_regs pointer */
909 movq %rax, %rsp /* switch stack */
911 movq %rsp, %rdi /* pt_regs pointer */
914 movq ORIG_RAX(%rsp), %rsi /* get error code */
915 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
917 xorl %esi, %esi /* no error code */
922 jmp error_exit /* %ebx: no swapgs flag */
927 idtentry divide_error do_divide_error has_error_code=0
928 idtentry overflow do_overflow has_error_code=0
929 idtentry bounds do_bounds has_error_code=0
930 idtentry invalid_op do_invalid_op has_error_code=0
931 idtentry device_not_available do_device_not_available has_error_code=0
932 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
933 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
934 idtentry invalid_TSS do_invalid_TSS has_error_code=1
935 idtentry segment_not_present do_segment_not_present has_error_code=1
936 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
937 idtentry coprocessor_error do_coprocessor_error has_error_code=0
938 idtentry alignment_check do_alignment_check has_error_code=1
939 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
943 * Reload gs selector with exception handling
946 ENTRY(native_load_gs_index)
949 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
953 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
958 ENDPROC(native_load_gs_index)
959 EXPORT_SYMBOL(native_load_gs_index)
961 _ASM_EXTABLE(.Lgs_change, bad_gs)
962 .section .fixup, "ax"
963 /* running with kernelgs */
965 SWAPGS /* switch back to user gs */
967 /* This can't be a string because the preprocessor needs to see it. */
968 movl $__USER_DS, %eax
971 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
977 /* Call softirq on interrupt stack. Interrupts are off. */
978 ENTRY(do_softirq_own_stack)
981 ENTER_IRQ_STACK regs=0 old_rsp=%r11
983 LEAVE_IRQ_STACK regs=0
986 ENDPROC(do_softirq_own_stack)
989 idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0
992 * A note on the "critical region" in our callback handler.
993 * We want to avoid stacking callback handlers due to events occurring
994 * during handling of the last event. To do this, we keep events disabled
995 * until we've done all processing. HOWEVER, we must enable events before
996 * popping the stack frame (can't be done atomically) and so it would still
997 * be possible to get enough handler activations to overflow the stack.
998 * Although unlikely, bugs of that kind are hard to track down, so we'd
999 * like to avoid the possibility.
1000 * So, on entry to the handler we detect whether we interrupted an
1001 * existing activation in its critical region -- if so, we pop the current
1002 * activation and restart the handler using the previous one.
1004 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
1007 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1008 * see the correct pointer to the pt_regs
1011 movq %rdi, %rsp /* we don't return, adjust the stack frame */
1014 ENTER_IRQ_STACK old_rsp=%r10
1015 call xen_evtchn_do_upcall
1018 #ifndef CONFIG_PREEMPT
1019 call xen_maybe_preempt_hcall
1022 END(xen_do_hypervisor_callback)
1025 * Hypervisor uses this for application faults while it executes.
1026 * We get here for two reasons:
1027 * 1. Fault while reloading DS, ES, FS or GS
1028 * 2. Fault while executing IRET
1029 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1030 * registers that could be reloaded and zeroed the others.
1031 * Category 2 we fix up by killing the current process. We cannot use the
1032 * normal Linux return path in this case because if we use the IRET hypercall
1033 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1034 * We distinguish between categories by comparing each saved segment register
1035 * with its current contents: any discrepancy means we in category 1.
1037 ENTRY(xen_failsafe_callback)
1040 cmpw %cx, 0x10(%rsp)
1043 cmpw %cx, 0x18(%rsp)
1046 cmpw %cx, 0x20(%rsp)
1049 cmpw %cx, 0x28(%rsp)
1051 /* All segments match their saved values => Category 2 (Bad IRET). */
1056 UNWIND_HINT_IRET_REGS offset=8
1057 jmp general_protection
1058 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1062 UNWIND_HINT_IRET_REGS
1063 pushq $-1 /* orig_ax = -1 => not a system call */
1064 ALLOC_PT_GPREGS_ON_STACK
1067 ENCODE_FRAME_POINTER
1069 END(xen_failsafe_callback)
1071 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1072 xen_hvm_callback_vector xen_evtchn_do_upcall
1074 #endif /* CONFIG_XEN */
1076 #if IS_ENABLED(CONFIG_HYPERV)
1077 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1078 hyperv_callback_vector hyperv_vector_handler
1079 #endif /* CONFIG_HYPERV */
1081 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1082 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1083 idtentry stack_segment do_stack_segment has_error_code=1
1086 idtentry xendebug do_debug has_error_code=0
1087 idtentry xenint3 do_int3 has_error_code=0
1090 idtentry general_protection do_general_protection has_error_code=1
1091 idtentry page_fault do_page_fault has_error_code=1
1093 #ifdef CONFIG_KVM_GUEST
1094 idtentry async_page_fault do_async_page_fault has_error_code=1
1097 #ifdef CONFIG_X86_MCE
1098 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1102 * Save all registers in pt_regs, and switch gs if needed.
1103 * Use slow, but surefire "are we in kernel?" check.
1104 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1106 ENTRY(paranoid_entry)
1111 ENCODE_FRAME_POINTER 8
1113 movl $MSR_GS_BASE, %ecx
1116 js 1f /* negative -> in kernel */
1123 * "Paranoid" exit path from exception stack. This is invoked
1124 * only on return from non-NMI IST interrupts that came
1125 * from kernel space.
1127 * We may be returning to very strange contexts (e.g. very early
1128 * in syscall entry), so checking for preemption here would
1129 * be complicated. Fortunately, we there's no good reason
1130 * to try to handle preemption here.
1132 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1134 ENTRY(paranoid_exit)
1136 DISABLE_INTERRUPTS(CLBR_ANY)
1137 TRACE_IRQS_OFF_DEBUG
1138 testl %ebx, %ebx /* swapgs needed? */
1139 jnz .Lparanoid_exit_no_swapgs
1142 jmp .Lparanoid_exit_restore
1143 .Lparanoid_exit_no_swapgs:
1144 TRACE_IRQS_IRETQ_DEBUG
1145 .Lparanoid_exit_restore:
1146 jmp restore_regs_and_return_to_kernel
1150 * Save all registers in pt_regs, and switch gs if needed.
1151 * Return: EBX=0: came from user mode; EBX=1: otherwise
1158 ENCODE_FRAME_POINTER 8
1160 testb $3, CS+8(%rsp)
1161 jz .Lerror_kernelspace
1164 * We entered from user mode or we're pretending to have entered
1165 * from user mode due to an IRET fault.
1169 .Lerror_entry_from_usermode_after_swapgs:
1171 * We need to tell lockdep that IRQs are off. We can't do this until
1172 * we fix gsbase, and we should do it before enter_from_user_mode
1173 * (which can take locks).
1176 CALL_enter_from_user_mode
1184 * There are two places in the kernel that can potentially fault with
1185 * usergs. Handle them here. B stepping K8s sometimes report a
1186 * truncated RIP for IRET exceptions returning to compat mode. Check
1187 * for these here too.
1189 .Lerror_kernelspace:
1191 leaq native_irq_return_iret(%rip), %rcx
1192 cmpq %rcx, RIP+8(%rsp)
1194 movl %ecx, %eax /* zero extend */
1195 cmpq %rax, RIP+8(%rsp)
1197 cmpq $.Lgs_change, RIP+8(%rsp)
1198 jne .Lerror_entry_done
1201 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1202 * gsbase and proceed. We'll fix up the exception and land in
1203 * .Lgs_change's error handler with kernel gsbase.
1206 jmp .Lerror_entry_done
1209 /* Fix truncated RIP */
1210 movq %rcx, RIP+8(%rsp)
1215 * We came from an IRET to user mode, so we have user gsbase.
1216 * Switch to kernel gsbase:
1221 * Pretend that the exception came from user mode: set up pt_regs
1222 * as if we faulted immediately after IRET and clear EBX so that
1223 * error_exit knows that we will be returning to user mode.
1229 jmp .Lerror_entry_from_usermode_after_swapgs
1234 * On entry, EBX is a "return to kernel mode" flag:
1235 * 1: already in kernel mode, don't need SWAPGS
1236 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1240 DISABLE_INTERRUPTS(CLBR_ANY)
1247 /* Runs on exception stack */
1248 /* XXX: broken on Xen PV */
1250 UNWIND_HINT_IRET_REGS
1252 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1253 * the iretq it performs will take us out of NMI context.
1254 * This means that we can have nested NMIs where the next
1255 * NMI is using the top of the stack of the previous NMI. We
1256 * can't let it execute because the nested NMI will corrupt the
1257 * stack of the previous NMI. NMI handlers are not re-entrant
1260 * To handle this case we do the following:
1261 * Check the a special location on the stack that contains
1262 * a variable that is set when NMIs are executing.
1263 * The interrupted task's stack is also checked to see if it
1265 * If the variable is not set and the stack is not the NMI
1267 * o Set the special variable on the stack
1268 * o Copy the interrupt frame into an "outermost" location on the
1270 * o Copy the interrupt frame into an "iret" location on the stack
1271 * o Continue processing the NMI
1272 * If the variable is set or the previous stack is the NMI stack:
1273 * o Modify the "iret" location to jump to the repeat_nmi
1274 * o return back to the first NMI
1276 * Now on exit of the first NMI, we first clear the stack variable
1277 * The NMI stack will tell any nested NMIs at that point that it is
1278 * nested. Then we pop the stack normally with iret, and if there was
1279 * a nested NMI that updated the copy interrupt stack frame, a
1280 * jump will be made to the repeat_nmi code that will handle the second
1283 * However, espfix prevents us from directly returning to userspace
1284 * with a single IRET instruction. Similarly, IRET to user mode
1285 * can fault. We therefore handle NMIs from user space like
1286 * other IST entries.
1291 /* Use %rdx as our temp variable throughout */
1294 testb $3, CS-RIP+8(%rsp)
1295 jz .Lnmi_from_kernel
1298 * NMI from user mode. We need to run on the thread stack, but we
1299 * can't go through the normal entry paths: NMIs are masked, and
1300 * we don't want to enable interrupts, because then we'll end
1301 * up in an awkward situation in which IRQs are on but NMIs
1304 * We also must not push anything to the stack before switching
1305 * stacks lest we corrupt the "NMI executing" variable.
1311 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1312 UNWIND_HINT_IRET_REGS base=%rdx offset=8
1313 pushq 5*8(%rdx) /* pt_regs->ss */
1314 pushq 4*8(%rdx) /* pt_regs->rsp */
1315 pushq 3*8(%rdx) /* pt_regs->flags */
1316 pushq 2*8(%rdx) /* pt_regs->cs */
1317 pushq 1*8(%rdx) /* pt_regs->rip */
1318 UNWIND_HINT_IRET_REGS
1319 pushq $-1 /* pt_regs->orig_ax */
1320 pushq %rdi /* pt_regs->di */
1321 pushq %rsi /* pt_regs->si */
1322 pushq (%rdx) /* pt_regs->dx */
1323 pushq %rcx /* pt_regs->cx */
1324 pushq %rax /* pt_regs->ax */
1325 pushq %r8 /* pt_regs->r8 */
1326 pushq %r9 /* pt_regs->r9 */
1327 pushq %r10 /* pt_regs->r10 */
1328 pushq %r11 /* pt_regs->r11 */
1329 pushq %rbx /* pt_regs->rbx */
1330 pushq %rbp /* pt_regs->rbp */
1331 pushq %r12 /* pt_regs->r12 */
1332 pushq %r13 /* pt_regs->r13 */
1333 pushq %r14 /* pt_regs->r14 */
1334 pushq %r15 /* pt_regs->r15 */
1336 ENCODE_FRAME_POINTER
1339 * At this point we no longer need to worry about stack damage
1340 * due to nesting -- we're on the normal thread stack and we're
1341 * done with the NMI stack.
1349 * Return back to user mode. We must *not* do the normal exit
1350 * work, because we don't want to enable interrupts.
1352 jmp swapgs_restore_regs_and_return_to_usermode
1356 * Here's what our stack frame will look like:
1357 * +---------------------------------------------------------+
1359 * | original Return RSP |
1360 * | original RFLAGS |
1363 * +---------------------------------------------------------+
1364 * | temp storage for rdx |
1365 * +---------------------------------------------------------+
1366 * | "NMI executing" variable |
1367 * +---------------------------------------------------------+
1368 * | iret SS } Copied from "outermost" frame |
1369 * | iret Return RSP } on each loop iteration; overwritten |
1370 * | iret RFLAGS } by a nested NMI to force another |
1371 * | iret CS } iteration if needed. |
1373 * +---------------------------------------------------------+
1374 * | outermost SS } initialized in first_nmi; |
1375 * | outermost Return RSP } will not be changed before |
1376 * | outermost RFLAGS } NMI processing is done. |
1377 * | outermost CS } Copied to "iret" frame on each |
1378 * | outermost RIP } iteration. |
1379 * +---------------------------------------------------------+
1381 * +---------------------------------------------------------+
1383 * The "original" frame is used by hardware. Before re-enabling
1384 * NMIs, we need to be done with it, and we need to leave enough
1385 * space for the asm code here.
1387 * We return by executing IRET while RSP points to the "iret" frame.
1388 * That will either return for real or it will loop back into NMI
1391 * The "outermost" frame is copied to the "iret" frame on each
1392 * iteration of the loop, so each iteration starts with the "iret"
1393 * frame pointing to the final return target.
1397 * Determine whether we're a nested NMI.
1399 * If we interrupted kernel code between repeat_nmi and
1400 * end_repeat_nmi, then we are a nested NMI. We must not
1401 * modify the "iret" frame because it's being written by
1402 * the outer NMI. That's okay; the outer NMI handler is
1403 * about to about to call do_nmi anyway, so we can just
1404 * resume the outer NMI.
1407 movq $repeat_nmi, %rdx
1410 movq $end_repeat_nmi, %rdx
1416 * Now check "NMI executing". If it's set, then we're nested.
1417 * This will not detect if we interrupted an outer NMI just
1424 * Now test if the previous stack was an NMI stack. This covers
1425 * the case where we interrupt an outer NMI after it clears
1426 * "NMI executing" but before IRET. We need to be careful, though:
1427 * there is one case in which RSP could point to the NMI stack
1428 * despite there being no NMI active: naughty userspace controls
1429 * RSP at the very beginning of the SYSCALL targets. We can
1430 * pull a fast one on naughty userspace, though: we program
1431 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1432 * if it controls the kernel's RSP. We set DF before we clear
1436 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1437 cmpq %rdx, 4*8(%rsp)
1438 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1441 subq $EXCEPTION_STKSZ, %rdx
1442 cmpq %rdx, 4*8(%rsp)
1443 /* If it is below the NMI stack, it is a normal NMI */
1446 /* Ah, it is within the NMI stack. */
1448 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1449 jz first_nmi /* RSP was user controlled. */
1451 /* This is a nested NMI. */
1455 * Modify the "iret" frame to point to repeat_nmi, forcing another
1456 * iteration of NMI handling.
1459 leaq -10*8(%rsp), %rdx
1466 /* Put stack back */
1472 /* We are returning to kernel mode, so this cannot result in a fault. */
1479 /* Make room for "NMI executing". */
1482 /* Leave room for the "iret" frame */
1485 /* Copy the "original" frame to the "outermost" frame */
1489 UNWIND_HINT_IRET_REGS
1491 /* Everything up to here is safe from nested NMIs */
1493 #ifdef CONFIG_DEBUG_ENTRY
1495 * For ease of testing, unmask NMIs right away. Disabled by
1496 * default because IRET is very expensive.
1499 pushq %rsp /* RSP (minus 8 because of the previous push) */
1500 addq $8, (%rsp) /* Fix up RSP */
1502 pushq $__KERNEL_CS /* CS */
1504 INTERRUPT_RETURN /* continues at repeat_nmi below */
1505 UNWIND_HINT_IRET_REGS
1511 * If there was a nested NMI, the first NMI's iret will return
1512 * here. But NMIs are still enabled and we can take another
1513 * nested NMI. The nested NMI checks the interrupted RIP to see
1514 * if it is between repeat_nmi and end_repeat_nmi, and if so
1515 * it will just return, as we are about to repeat an NMI anyway.
1516 * This makes it safe to copy to the stack frame that a nested
1519 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1520 * we're repeating an NMI, gsbase has the same value that it had on
1521 * the first iteration. paranoid_entry will load the kernel
1522 * gsbase if needed before we call do_nmi. "NMI executing"
1525 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1528 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1529 * here must not modify the "iret" frame while we're writing to
1530 * it or it will end up containing garbage.
1540 * Everything below this point can be preempted by a nested NMI.
1541 * If this happens, then the inner NMI will change the "iret"
1542 * frame to point back to repeat_nmi.
1544 pushq $-1 /* ORIG_RAX: no syscall to restart */
1545 ALLOC_PT_GPREGS_ON_STACK
1548 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1549 * as we should not be calling schedule in NMI context.
1550 * Even with normal interrupts enabled. An NMI should not be
1551 * setting NEED_RESCHED or anything that normal interrupts and
1552 * exceptions might do.
1557 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1562 testl %ebx, %ebx /* swapgs needed? */
1570 /* Point RSP at the "iret" frame. */
1571 REMOVE_PT_GPREGS_FROM_STACK 6*8
1574 * Clear "NMI executing". Set DF first so that we can easily
1575 * distinguish the remaining code between here and IRET from
1576 * the SYSCALL entry and exit paths. On a native kernel, we
1577 * could just inspect RIP, but, on paravirt kernels,
1578 * INTERRUPT_RETURN can translate into a jump into a
1582 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1585 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1586 * stack in a single instruction. We are returning to kernel
1587 * mode, so this cannot result in a fault.
1592 ENTRY(ignore_sysret)
1598 ENTRY(rewind_stack_do_exit)
1600 /* Prevent any naive code from trying to unwind to our caller. */
1603 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1604 leaq -PTREGS_SIZE(%rax), %rsp
1605 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE
1608 END(rewind_stack_do_exit)