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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Compatibility mode system call entry point for x86-64.
4 *
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
6 */
7 #include "calling.h"
8 #include <asm/asm-offsets.h>
9 #include <asm/current.h>
10 #include <asm/errno.h>
11 #include <asm/ia32_unistd.h>
12 #include <asm/thread_info.h>
13 #include <asm/segment.h>
14 #include <asm/irqflags.h>
15 #include <asm/asm.h>
16 #include <asm/smap.h>
17 #include <linux/linkage.h>
18 #include <linux/err.h>
19
20 .section .entry.text, "ax"
21
22 /*
23 * 32-bit SYSENTER entry.
24 *
25 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
26 * on 64-bit kernels running on Intel CPUs.
27 *
28 * The SYSENTER instruction, in principle, should *only* occur in the
29 * vDSO. In practice, a small number of Android devices were shipped
30 * with a copy of Bionic that inlined a SYSENTER instruction. This
31 * never happened in any of Google's Bionic versions -- it only happened
32 * in a narrow range of Intel-provided versions.
33 *
34 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
35 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
36 * SYSENTER does not save anything on the stack,
37 * and does not save old RIP (!!!), RSP, or RFLAGS.
38 *
39 * Arguments:
40 * eax system call number
41 * ebx arg1
42 * ecx arg2
43 * edx arg3
44 * esi arg4
45 * edi arg5
46 * ebp user stack
47 * 0(%ebp) arg6
48 */
49 ENTRY(entry_SYSENTER_compat)
50 /* Interrupts are off on entry. */
51 SWAPGS
52 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
53
54 /*
55 * User tracing code (ptrace or signal handlers) might assume that
56 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
57 * syscall. Just in case the high bits are nonzero, zero-extend
58 * the syscall number. (This could almost certainly be deleted
59 * with no ill effects.)
60 */
61 movl %eax, %eax
62
63 /* Construct struct pt_regs on stack */
64 pushq $__USER32_DS /* pt_regs->ss */
65 pushq %rbp /* pt_regs->sp (stashed in bp) */
66
67 /*
68 * Push flags. This is nasty. First, interrupts are currently
69 * off, but we need pt_regs->flags to have IF set. Second, even
70 * if TF was set when SYSENTER started, it's clear by now. We fix
71 * that later using TIF_SINGLESTEP.
72 */
73 pushfq /* pt_regs->flags (except IF = 0) */
74 orl $X86_EFLAGS_IF, (%rsp) /* Fix saved flags */
75 pushq $__USER32_CS /* pt_regs->cs */
76 pushq $0 /* pt_regs->ip = 0 (placeholder) */
77 pushq %rax /* pt_regs->orig_ax */
78 pushq %rdi /* pt_regs->di */
79 pushq %rsi /* pt_regs->si */
80 pushq %rdx /* pt_regs->dx */
81 pushq %rcx /* pt_regs->cx */
82 pushq $-ENOSYS /* pt_regs->ax */
83 pushq $0 /* pt_regs->r8 = 0 */
84 pushq $0 /* pt_regs->r9 = 0 */
85 pushq $0 /* pt_regs->r10 = 0 */
86 pushq $0 /* pt_regs->r11 = 0 */
87 pushq %rbx /* pt_regs->rbx */
88 pushq %rbp /* pt_regs->rbp (will be overwritten) */
89 pushq $0 /* pt_regs->r12 = 0 */
90 pushq $0 /* pt_regs->r13 = 0 */
91 pushq $0 /* pt_regs->r14 = 0 */
92 pushq $0 /* pt_regs->r15 = 0 */
93 cld
94
95 /*
96 * SYSENTER doesn't filter flags, so we need to clear NT and AC
97 * ourselves. To save a few cycles, we can check whether
98 * either was set instead of doing an unconditional popfq.
99 * This needs to happen before enabling interrupts so that
100 * we don't get preempted with NT set.
101 *
102 * If TF is set, we will single-step all the way to here -- do_debug
103 * will ignore all the traps. (Yes, this is slow, but so is
104 * single-stepping in general. This allows us to avoid having
105 * a more complicated code to handle the case where a user program
106 * forces us to single-step through the SYSENTER entry code.)
107 *
108 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
109 * out-of-line as an optimization: NT is unlikely to be set in the
110 * majority of the cases and instead of polluting the I$ unnecessarily,
111 * we're keeping that code behind a branch which will predict as
112 * not-taken and therefore its instructions won't be fetched.
113 */
114 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
115 jnz .Lsysenter_fix_flags
116 .Lsysenter_flags_fixed:
117
118 /*
119 * User mode is traced as though IRQs are on, and SYSENTER
120 * turned them off.
121 */
122 TRACE_IRQS_OFF
123
124 movq %rsp, %rdi
125 call do_fast_syscall_32
126 /* XEN PV guests always use IRET path */
127 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
128 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
129 jmp sysret32_from_system_call
130
131 .Lsysenter_fix_flags:
132 pushq $X86_EFLAGS_FIXED
133 popfq
134 jmp .Lsysenter_flags_fixed
135 GLOBAL(__end_entry_SYSENTER_compat)
136 ENDPROC(entry_SYSENTER_compat)
137
138 /*
139 * 32-bit SYSCALL entry.
140 *
141 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
142 * on 64-bit kernels running on AMD CPUs.
143 *
144 * The SYSCALL instruction, in principle, should *only* occur in the
145 * vDSO. In practice, it appears that this really is the case.
146 * As evidence:
147 *
148 * - The calling convention for SYSCALL has changed several times without
149 * anyone noticing.
150 *
151 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
152 * user task that did SYSCALL without immediately reloading SS
153 * would randomly crash.
154 *
155 * - Most programmers do not directly target AMD CPUs, and the 32-bit
156 * SYSCALL instruction does not exist on Intel CPUs. Even on AMD
157 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
158 * because the SYSCALL instruction in legacy/native 32-bit mode (as
159 * opposed to compat mode) is sufficiently poorly designed as to be
160 * essentially unusable.
161 *
162 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
163 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
164 * programmed MSRs. RFLAGS gets masked by a value from another MSR
165 * (so CLD and CLAC are not needed). SYSCALL does not save anything on
166 * the stack and does not change RSP.
167 *
168 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
169 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
170 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
171 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
172 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
173 *
174 * Arguments:
175 * eax system call number
176 * ecx return address
177 * ebx arg1
178 * ebp arg2 (note: not saved in the stack frame, should not be touched)
179 * edx arg3
180 * esi arg4
181 * edi arg5
182 * esp user stack
183 * 0(%esp) arg6
184 */
185 ENTRY(entry_SYSCALL_compat)
186 /* Interrupts are off on entry. */
187 swapgs
188
189 /* Stash user ESP and switch to the kernel stack. */
190 movl %esp, %r8d
191 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
192
193 /* Construct struct pt_regs on stack */
194 pushq $__USER32_DS /* pt_regs->ss */
195 pushq %r8 /* pt_regs->sp */
196 pushq %r11 /* pt_regs->flags */
197 pushq $__USER32_CS /* pt_regs->cs */
198 pushq %rcx /* pt_regs->ip */
199 GLOBAL(entry_SYSCALL_compat_after_hwframe)
200 movl %eax, %eax /* discard orig_ax high bits */
201 pushq %rax /* pt_regs->orig_ax */
202 pushq %rdi /* pt_regs->di */
203 pushq %rsi /* pt_regs->si */
204 pushq %rdx /* pt_regs->dx */
205 pushq %rbp /* pt_regs->cx (stashed in bp) */
206 pushq $-ENOSYS /* pt_regs->ax */
207 pushq $0 /* pt_regs->r8 = 0 */
208 pushq $0 /* pt_regs->r9 = 0 */
209 pushq $0 /* pt_regs->r10 = 0 */
210 pushq $0 /* pt_regs->r11 = 0 */
211 pushq %rbx /* pt_regs->rbx */
212 pushq %rbp /* pt_regs->rbp (will be overwritten) */
213 pushq $0 /* pt_regs->r12 = 0 */
214 pushq $0 /* pt_regs->r13 = 0 */
215 pushq $0 /* pt_regs->r14 = 0 */
216 pushq $0 /* pt_regs->r15 = 0 */
217
218 /*
219 * User mode is traced as though IRQs are on, and SYSENTER
220 * turned them off.
221 */
222 TRACE_IRQS_OFF
223
224 movq %rsp, %rdi
225 call do_fast_syscall_32
226 /* XEN PV guests always use IRET path */
227 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
228 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
229
230 /* Opportunistic SYSRET */
231 sysret32_from_system_call:
232 TRACE_IRQS_ON /* User mode traces as IRQs on. */
233 movq RBX(%rsp), %rbx /* pt_regs->rbx */
234 movq RBP(%rsp), %rbp /* pt_regs->rbp */
235 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */
236 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */
237 addq $RAX, %rsp /* Skip r8-r15 */
238 popq %rax /* pt_regs->rax */
239 popq %rdx /* Skip pt_regs->cx */
240 popq %rdx /* pt_regs->dx */
241 popq %rsi /* pt_regs->si */
242 popq %rdi /* pt_regs->di */
243
244 /*
245 * USERGS_SYSRET32 does:
246 * GSBASE = user's GS base
247 * EIP = ECX
248 * RFLAGS = R11
249 * CS = __USER32_CS
250 * SS = __USER_DS
251 *
252 * ECX will not match pt_regs->cx, but we're returning to a vDSO
253 * trampoline that will fix up RCX, so this is okay.
254 *
255 * R12-R15 are callee-saved, so they contain whatever was in them
256 * when the system call started, which is already known to user
257 * code. We zero R8-R10 to avoid info leaks.
258 */
259 xorq %r8, %r8
260 xorq %r9, %r9
261 xorq %r10, %r10
262 movq RSP-ORIG_RAX(%rsp), %rsp
263 swapgs
264 sysretl
265 END(entry_SYSCALL_compat)
266
267 /*
268 * 32-bit legacy system call entry.
269 *
270 * 32-bit x86 Linux system calls traditionally used the INT $0x80
271 * instruction. INT $0x80 lands here.
272 *
273 * This entry point can be used by 32-bit and 64-bit programs to perform
274 * 32-bit system calls. Instances of INT $0x80 can be found inline in
275 * various programs and libraries. It is also used by the vDSO's
276 * __kernel_vsyscall fallback for hardware that doesn't support a faster
277 * entry method. Restarted 32-bit system calls also fall back to INT
278 * $0x80 regardless of what instruction was originally used to do the
279 * system call.
280 *
281 * This is considered a slow path. It is not used by most libc
282 * implementations on modern hardware except during process startup.
283 *
284 * Arguments:
285 * eax system call number
286 * ebx arg1
287 * ecx arg2
288 * edx arg3
289 * esi arg4
290 * edi arg5
291 * ebp arg6
292 */
293 ENTRY(entry_INT80_compat)
294 /*
295 * Interrupts are off on entry.
296 */
297 ASM_CLAC /* Do this early to minimize exposure */
298 SWAPGS
299
300 /*
301 * User tracing code (ptrace or signal handlers) might assume that
302 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
303 * syscall. Just in case the high bits are nonzero, zero-extend
304 * the syscall number. (This could almost certainly be deleted
305 * with no ill effects.)
306 */
307 movl %eax, %eax
308
309 pushq %rax /* pt_regs->orig_ax */
310
311 /* switch to thread stack expects orig_ax to be pushed */
312 call switch_to_thread_stack
313
314 pushq %rdi /* pt_regs->di */
315 pushq %rsi /* pt_regs->si */
316 pushq %rdx /* pt_regs->dx */
317 pushq %rcx /* pt_regs->cx */
318 pushq $-ENOSYS /* pt_regs->ax */
319 pushq $0 /* pt_regs->r8 = 0 */
320 pushq $0 /* pt_regs->r9 = 0 */
321 pushq $0 /* pt_regs->r10 = 0 */
322 pushq $0 /* pt_regs->r11 = 0 */
323 pushq %rbx /* pt_regs->rbx */
324 pushq %rbp /* pt_regs->rbp */
325 pushq %r12 /* pt_regs->r12 */
326 pushq %r13 /* pt_regs->r13 */
327 pushq %r14 /* pt_regs->r14 */
328 pushq %r15 /* pt_regs->r15 */
329 cld
330
331 /*
332 * User mode is traced as though IRQs are on, and the interrupt
333 * gate turned them off.
334 */
335 TRACE_IRQS_OFF
336
337 movq %rsp, %rdi
338 call do_int80_syscall_32
339 .Lsyscall_32_done:
340
341 /* Go back to user mode. */
342 TRACE_IRQS_ON
343 jmp swapgs_restore_regs_and_return_to_usermode
344 END(entry_INT80_compat)
345
346 ENTRY(stub32_clone)
347 /*
348 * The 32-bit clone ABI is: clone(..., int tls_val, int *child_tidptr).
349 * The 64-bit clone ABI is: clone(..., int *child_tidptr, int tls_val).
350 *
351 * The native 64-bit kernel's sys_clone() implements the latter,
352 * so we need to swap arguments here before calling it:
353 */
354 xchg %r8, %rcx
355 jmp sys_clone
356 ENDPROC(stub32_clone)