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1 #ifndef _ASM_X86_ACPI_H
2 #define _ASM_X86_ACPI_H
3
4 /*
5 * Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2001 Patrick Mochel <mochel@osdl.org>
7 *
8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 */
26 #include <acpi/pdc_intel.h>
27
28 #include <asm/numa.h>
29 #include <asm/processor.h>
30 #include <asm/mmu.h>
31 #include <asm/mpspec.h>
32 #include <asm/realmode.h>
33
34 #define COMPILER_DEPENDENT_INT64 long long
35 #define COMPILER_DEPENDENT_UINT64 unsigned long long
36
37 /*
38 * Calling conventions:
39 *
40 * ACPI_SYSTEM_XFACE - Interfaces to host OS (handlers, threads)
41 * ACPI_EXTERNAL_XFACE - External ACPI interfaces
42 * ACPI_INTERNAL_XFACE - Internal ACPI interfaces
43 * ACPI_INTERNAL_VAR_XFACE - Internal variable-parameter list interfaces
44 */
45 #define ACPI_SYSTEM_XFACE
46 #define ACPI_EXTERNAL_XFACE
47 #define ACPI_INTERNAL_XFACE
48 #define ACPI_INTERNAL_VAR_XFACE
49
50 /* Asm macros */
51
52 #define ACPI_FLUSH_CPU_CACHE() wbinvd()
53
54 int __acpi_acquire_global_lock(unsigned int *lock);
55 int __acpi_release_global_lock(unsigned int *lock);
56
57 #define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \
58 ((Acq) = __acpi_acquire_global_lock(&facs->global_lock))
59
60 #define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \
61 ((Acq) = __acpi_release_global_lock(&facs->global_lock))
62
63 /*
64 * Math helper asm macros
65 */
66 #define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
67 asm("divl %2;" \
68 : "=a"(q32), "=d"(r32) \
69 : "r"(d32), \
70 "0"(n_lo), "1"(n_hi))
71
72
73 #define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
74 asm("shrl $1,%2 ;" \
75 "rcrl $1,%3;" \
76 : "=r"(n_hi), "=r"(n_lo) \
77 : "0"(n_hi), "1"(n_lo))
78
79 #ifdef CONFIG_ACPI
80 extern int acpi_lapic;
81 extern int acpi_ioapic;
82 extern int acpi_noirq;
83 extern int acpi_strict;
84 extern int acpi_disabled;
85 extern int acpi_pci_disabled;
86 extern int acpi_skip_timer_override;
87 extern int acpi_use_timer_override;
88 extern int acpi_fix_pin2_polarity;
89 extern int acpi_disable_cmcff;
90
91 extern u8 acpi_sci_flags;
92 extern int acpi_sci_override_gsi;
93 void acpi_pic_sci_set_trigger(unsigned int, u16);
94
95 extern int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
96 int trigger, int polarity);
97
98 static inline void disable_acpi(void)
99 {
100 acpi_disabled = 1;
101 acpi_pci_disabled = 1;
102 acpi_noirq = 1;
103 }
104
105 extern int acpi_gsi_to_irq(u32 gsi, unsigned int *irq);
106
107 static inline void acpi_noirq_set(void) { acpi_noirq = 1; }
108 static inline void acpi_disable_pci(void)
109 {
110 acpi_pci_disabled = 1;
111 acpi_noirq_set();
112 }
113
114 /* Low-level suspend routine. */
115 extern int (*acpi_suspend_lowlevel)(void);
116
117 /* Physical address to resume after wakeup */
118 #define acpi_wakeup_address ((unsigned long)(real_mode_header->wakeup_start))
119
120 /*
121 * Check if the CPU can handle C2 and deeper
122 */
123 static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
124 {
125 /*
126 * Early models (<=5) of AMD Opterons are not supposed to go into
127 * C2 state.
128 *
129 * Steppings 0x0A and later are good
130 */
131 if (boot_cpu_data.x86 == 0x0F &&
132 boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
133 boot_cpu_data.x86_model <= 0x05 &&
134 boot_cpu_data.x86_mask < 0x0A)
135 return 1;
136 else if (amd_e400_c1e_detected)
137 return 1;
138 else
139 return max_cstate;
140 }
141
142 static inline bool arch_has_acpi_pdc(void)
143 {
144 struct cpuinfo_x86 *c = &cpu_data(0);
145 return (c->x86_vendor == X86_VENDOR_INTEL ||
146 c->x86_vendor == X86_VENDOR_CENTAUR);
147 }
148
149 static inline void arch_acpi_set_pdc_bits(u32 *buf)
150 {
151 struct cpuinfo_x86 *c = &cpu_data(0);
152
153 buf[2] |= ACPI_PDC_C_CAPABILITY_SMP;
154
155 if (cpu_has(c, X86_FEATURE_EST))
156 buf[2] |= ACPI_PDC_EST_CAPABILITY_SWSMP;
157
158 if (cpu_has(c, X86_FEATURE_ACPI))
159 buf[2] |= ACPI_PDC_T_FFH;
160
161 /*
162 * If mwait/monitor is unsupported, C2/C3_FFH will be disabled
163 */
164 if (!cpu_has(c, X86_FEATURE_MWAIT))
165 buf[2] &= ~(ACPI_PDC_C_C2C3_FFH);
166 }
167
168 #else /* !CONFIG_ACPI */
169
170 #define acpi_lapic 0
171 #define acpi_ioapic 0
172 #define acpi_disable_cmcff 0
173 static inline void acpi_noirq_set(void) { }
174 static inline void acpi_disable_pci(void) { }
175 static inline void disable_acpi(void) { }
176
177 #endif /* !CONFIG_ACPI */
178
179 #define ARCH_HAS_POWER_INIT 1
180
181 #ifdef CONFIG_ACPI_NUMA
182 extern int acpi_numa;
183 extern int x86_acpi_numa_init(void);
184 #endif /* CONFIG_ACPI_NUMA */
185
186 #define acpi_unlazy_tlb(x) leave_mm(x)
187
188 #endif /* _ASM_X86_ACPI_H */