arch/x86/include/asm/bigsmp/apic.h

   1 #ifndef __ASM_MACH_APIC_H
   2 #define __ASM_MACH_APIC_H
   3
   4 #define xapic_phys_to_log_apicid(cpu) (per_cpu(x86_bios_cpu_apicid, cpu))
   5
   6 static inline int bigsmp_apic_id_registered(void)
   7 {
   8         return 1;
   9 }
  10
  11 static inline const cpumask_t *bigsmp_target_cpus(void)
  12 {
  13 #ifdef CONFIG_SMP
  14         return &cpu_online_map;
  15 #else
  16         return &cpumask_of_cpu(0);
  17 #endif
  18 }
  19
  20 #define APIC_DFR_VALUE          (APIC_DFR_FLAT)
  21
  22 static inline unsigned long
  23 bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid)
  24 {
  25         return 0;
  26 }
  27
  28 static inline unsigned long bigsmp_check_apicid_present(int bit)
  29 {
  30         return 1;
  31 }
  32
  33 static inline unsigned long calculate_ldr(int cpu)
  34 {
  35         unsigned long val, id;
  36         val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
  37         id = xapic_phys_to_log_apicid(cpu);
  38         val |= SET_APIC_LOGICAL_ID(id);
  39         return val;
  40 }
  41
  42 /*
  43  * Set up the logical destination ID.
  44  *
  45  * Intel recommends to set DFR, LDR and TPR before enabling
  46  * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
  47  * document number 292116).  So here it goes...
  48  */
  49 static inline void bigsmp_init_apic_ldr(void)
  50 {
  51         unsigned long val;
  52         int cpu = smp_processor_id();
  53
  54         apic_write(APIC_DFR, APIC_DFR_VALUE);
  55         val = calculate_ldr(cpu);
  56         apic_write(APIC_LDR, val);
  57 }
  58
  59 static inline void bigsmp_setup_apic_routing(void)
  60 {
  61         printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
  62                 "Physflat", nr_ioapics);
  63 }
  64
  65 static inline int bigsmp_apicid_to_node(int logical_apicid)
  66 {
  67         return apicid_2_node[hard_smp_processor_id()];
  68 }
  69
  70 static inline int bigsmp_cpu_present_to_apicid(int mps_cpu)
  71 {
  72         if (mps_cpu < nr_cpu_ids)
  73                 return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
  74
  75         return BAD_APICID;
  76 }
  77
  78 static inline physid_mask_t bigsmp_apicid_to_cpu_present(int phys_apicid)
  79 {
  80         return physid_mask_of_physid(phys_apicid);
  81 }
  82
  83 extern u8 cpu_2_logical_apicid[];
  84 /* Mapping from cpu number to logical apicid */
  85 static inline int bigsmp_cpu_to_logical_apicid(int cpu)
  86 {
  87         if (cpu >= nr_cpu_ids)
  88                 return BAD_APICID;
  89         return cpu_physical_id(cpu);
  90 }
  91
  92 static inline physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
  93 {
  94         /* For clustered we don't have a good way to do this yet - hack */
  95         return physids_promote(0xFFL);
  96 }
  97
  98 static inline void bigsmp_setup_portio_remap(void)
  99 {
 100 }
 101
 102 static inline int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
 103 {
 104         return 1;
 105 }
 106
 107 /* As we are using single CPU as destination, pick only one CPU here */
 108 static inline unsigned int bigsmp_cpu_mask_to_apicid(const cpumask_t *cpumask)
 109 {
 110         return bigsmp_cpu_to_logical_apicid(first_cpu(*cpumask));
 111 }
 112
 113 static inline unsigned int
 114 bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
 115                               const struct cpumask *andmask)
 116 {
 117         int cpu;
 118
 119         /*
 120          * We're using fixed IRQ delivery, can only return one phys APIC ID.
 121          * May as well be the first.
 122          */
 123         for_each_cpu_and(cpu, cpumask, andmask) {
 124                 if (cpumask_test_cpu(cpu, cpu_online_mask))
 125                         break;
 126         }
 127         if (cpu < nr_cpu_ids)
 128                 return bigsmp_cpu_to_logical_apicid(cpu);
 129
 130         return BAD_APICID;
 131 }
 132
 133 static inline int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb)
 134 {
 135         return cpuid_apic >> index_msb;
 136 }
 137
 138 #endif /* __ASM_MACH_APIC_H */