arch/x86/include/asm/fpu/xcr.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_X86_FPU_XCR_H
   3 #define _ASM_X86_FPU_XCR_H
   4
   5 /*
   6  * MXCSR and XCR definitions:
   7  */
   8
   9 static inline void ldmxcsr(u32 mxcsr)
  10 {
  11         asm volatile("ldmxcsr %0" :: "m" (mxcsr));
  12 }
  13
  14 extern unsigned int mxcsr_feature_mask;
  15
  16 #define XCR_XFEATURE_ENABLED_MASK       0x00000000
  17
  18 static inline u64 xgetbv(u32 index)
  19 {
  20         u32 eax, edx;
  21
  22         asm volatile("xgetbv" : "=a" (eax), "=d" (edx) : "c" (index));
  23         return eax + ((u64)edx << 32);
  24 }
  25
  26 static inline void xsetbv(u32 index, u64 value)
  27 {
  28         u32 eax = value;
  29         u32 edx = value >> 32;
  30
  31         asm volatile("xsetbv" :: "a" (eax), "d" (edx), "c" (index));
  32 }
  33
  34 #endif /* _ASM_X86_FPU_XCR_H */