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git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - arch/x86/include/asm/irq_vectors.h
1 #ifndef _ASM_X86_IRQ_VECTORS_H
2 #define _ASM_X86_IRQ_VECTORS_H
4 #include <linux/threads.h>
6 * Linux IRQ vector layout.
8 * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
9 * be defined by Linux. They are used as a jump table by the CPU when a
10 * given vector is triggered - by a CPU-external, CPU-internal or
11 * software-triggered event.
13 * Linux sets the kernel code address each entry jumps to early during
14 * bootup, and never changes them. This is the general layout of the
17 * Vectors 0 ... 31 : system traps and exceptions - hardcoded events
18 * Vectors 32 ... 127 : device interrupts
19 * Vector 128 : legacy int80 syscall interface
20 * Vectors 129 ... INVALIDATE_TLB_VECTOR_START-1 except 204 : device interrupts
21 * Vectors INVALIDATE_TLB_VECTOR_START ... 255 : special interrupts
23 * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
25 * This file enumerates the exact layout of them:
28 #define NMI_VECTOR 0x02
29 #define MCE_VECTOR 0x12
32 * IDT vectors usable for external interrupt sources start at 0x20.
33 * (0x80 is the syscall vector, 0x30-0x3f are for ISA)
35 #define FIRST_EXTERNAL_VECTOR 0x20
37 * We start allocating at 0x21 to spread out vectors evenly between
38 * priority levels. (0x80 is the syscall vector)
40 #define VECTOR_OFFSET_START 1
43 * Reserve the lowest usable vector (and hence lowest priority) 0x20 for
44 * triggering cleanup after irq migration. 0x21-0x2f will still be used
45 * for device interrupts.
47 #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
49 #define IA32_SYSCALL_VECTOR 0x80
52 * Vectors 0x30-0x3f are used for ISA interrupts.
53 * round up to the next 16-vector boundary
55 #define ISA_IRQ_VECTOR(irq) (((FIRST_EXTERNAL_VECTOR + 16) & ~15) + irq)
58 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
60 * some of the following vectors are 'rare', they are merged
61 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
62 * TLB, reschedule and local APIC vectors are performance-critical.
65 #define SPURIOUS_APIC_VECTOR 0xff
69 #if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
70 # error SPURIOUS_APIC_VECTOR definition error
73 #define ERROR_APIC_VECTOR 0xfe
74 #define RESCHEDULE_VECTOR 0xfd
75 #define CALL_FUNCTION_VECTOR 0xfc
76 #define CALL_FUNCTION_SINGLE_VECTOR 0xfb
77 #define THERMAL_APIC_VECTOR 0xfa
78 #define THRESHOLD_APIC_VECTOR 0xf9
79 #define REBOOT_VECTOR 0xf8
82 * Generic system vector for platform specific use
84 #define X86_PLATFORM_IPI_VECTOR 0xf7
86 /* Vector for KVM to deliver posted interrupt IPI */
87 #ifdef CONFIG_HAVE_KVM
88 #define POSTED_INTR_VECTOR 0xf2
89 #define POSTED_INTR_WAKEUP_VECTOR 0xf1
95 #define IRQ_WORK_VECTOR 0xf6
97 #define UV_BAU_MESSAGE 0xf5
99 /* Vector on which hypervisor callbacks will be delivered */
100 #define HYPERVISOR_CALLBACK_VECTOR 0xf3
103 * Local APIC timer IRQ vector is on a different priority level,
104 * to work around the 'lost local interrupt if more than 2 IRQ
105 * sources per level' errata.
107 #define LOCAL_TIMER_VECTOR 0xef
109 #define NR_VECTORS 256
111 #ifdef CONFIG_X86_LOCAL_APIC
112 #define FIRST_SYSTEM_VECTOR LOCAL_TIMER_VECTOR
114 #define FIRST_SYSTEM_VECTOR NR_VECTORS
119 #define FIRST_VM86_IRQ 3
120 #define LAST_VM86_IRQ 15
123 static inline int invalid_vm86_irq(int irq
)
125 return irq
< FIRST_VM86_IRQ
|| irq
> LAST_VM86_IRQ
;
130 * Size the maximum number of interrupts.
132 * If the irq_desc[] array has a sparse layout, we can size things
133 * generously - it scales up linearly with the maximum number of CPUs,
134 * and the maximum number of IO-APICs, whichever is higher.
136 * In other cases we size more conservatively, to not create too large
140 #define NR_IRQS_LEGACY 16
142 #define CPU_VECTOR_LIMIT (64 * NR_CPUS)
143 #define IO_APIC_VECTOR_LIMIT (32 * MAX_IO_APICS)
145 #if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_PCI_MSI)
147 (CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ? \
148 (NR_VECTORS + CPU_VECTOR_LIMIT) : \
149 (NR_VECTORS + IO_APIC_VECTOR_LIMIT))
150 #elif defined(CONFIG_X86_IO_APIC)
151 #define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT)
152 #elif defined(CONFIG_PCI_MSI)
153 #define NR_IRQS (NR_VECTORS + CPU_VECTOR_LIMIT)
155 #define NR_IRQS NR_IRQS_LEGACY
158 #endif /* _ASM_X86_IRQ_VECTORS_H */