arch/x86/include/asm/kvm_host.h

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This header defines architecture specific interfaces, x86 version
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2.  See
   7  * the COPYING file in the top-level directory.
   8  *
   9  */
  10
  11 #ifndef _ASM_X86_KVM_HOST_H
  12 #define _ASM_X86_KVM_HOST_H
  13
  14 #include <linux/types.h>
  15 #include <linux/mm.h>
  16 #include <linux/mmu_notifier.h>
  17 #include <linux/tracepoint.h>
  18 #include <linux/cpumask.h>
  19 #include <linux/irq_work.h>
  20
  21 #include <linux/kvm.h>
  22 #include <linux/kvm_para.h>
  23 #include <linux/kvm_types.h>
  24 #include <linux/perf_event.h>
  25 #include <linux/pvclock_gtod.h>
  26 #include <linux/clocksource.h>
  27
  28 #include <asm/pvclock-abi.h>
  29 #include <asm/desc.h>
  30 #include <asm/mtrr.h>
  31 #include <asm/msr-index.h>
  32 #include <asm/asm.h>
  33
  34 #define KVM_MAX_VCPUS 255
  35 #define KVM_SOFT_MAX_VCPUS 160
  36 #define KVM_USER_MEM_SLOTS 125
  37 /* memory slots that are not exposed to userspace */
  38 #define KVM_PRIVATE_MEM_SLOTS 3
  39 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
  40
  41 #define KVM_MMIO_SIZE 16
  42
  43 #define KVM_PIO_PAGE_OFFSET 1
  44 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
  45
  46 #define KVM_IRQCHIP_NUM_PINS  KVM_IOAPIC_NUM_PINS
  47
  48 #define CR0_RESERVED_BITS                                               \
  49         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  50                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  51                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  52
  53 #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
  54 #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
  55 #define CR3_PCID_ENABLED_RESERVED_BITS 0xFFFFFF0000000000ULL
  56 #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS |    \
  57                                   0xFFFFFF0000000000ULL)
  58 #define CR4_RESERVED_BITS                                               \
  59         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  60                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  61                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
  62                           | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
  63                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  64
  65 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  66
  67
  68
  69 #define INVALID_PAGE (~(hpa_t)0)
  70 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  71
  72 #define UNMAPPED_GVA (~(gpa_t)0)
  73
  74 /* KVM Hugepage definitions for x86 */
  75 #define KVM_NR_PAGE_SIZES       3
  76 #define KVM_HPAGE_GFN_SHIFT(x)  (((x) - 1) * 9)
  77 #define KVM_HPAGE_SHIFT(x)      (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
  78 #define KVM_HPAGE_SIZE(x)       (1UL << KVM_HPAGE_SHIFT(x))
  79 #define KVM_HPAGE_MASK(x)       (~(KVM_HPAGE_SIZE(x) - 1))
  80 #define KVM_PAGES_PER_HPAGE(x)  (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
  81
  82 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
  83 {
  84         /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
  85         return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
  86                 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
  87 }
  88
  89 #define SELECTOR_TI_MASK (1 << 2)
  90 #define SELECTOR_RPL_MASK 0x03
  91
  92 #define IOPL_SHIFT 12
  93
  94 #define KVM_PERMILLE_MMU_PAGES 20
  95 #define KVM_MIN_ALLOC_MMU_PAGES 64
  96 #define KVM_MMU_HASH_SHIFT 10
  97 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
  98 #define KVM_MIN_FREE_MMU_PAGES 5
  99 #define KVM_REFILL_PAGES 25
 100 #define KVM_MAX_CPUID_ENTRIES 80
 101 #define KVM_NR_FIXED_MTRR_REGION 88
 102 #define KVM_NR_VAR_MTRR 8
 103
 104 #define ASYNC_PF_PER_VCPU 64
 105
 106 struct kvm_vcpu;
 107 struct kvm;
 108 struct kvm_async_pf;
 109
 110 enum kvm_reg {
 111         VCPU_REGS_RAX = 0,
 112         VCPU_REGS_RCX = 1,
 113         VCPU_REGS_RDX = 2,
 114         VCPU_REGS_RBX = 3,
 115         VCPU_REGS_RSP = 4,
 116         VCPU_REGS_RBP = 5,
 117         VCPU_REGS_RSI = 6,
 118         VCPU_REGS_RDI = 7,
 119 #ifdef CONFIG_X86_64
 120         VCPU_REGS_R8 = 8,
 121         VCPU_REGS_R9 = 9,
 122         VCPU_REGS_R10 = 10,
 123         VCPU_REGS_R11 = 11,
 124         VCPU_REGS_R12 = 12,
 125         VCPU_REGS_R13 = 13,
 126         VCPU_REGS_R14 = 14,
 127         VCPU_REGS_R15 = 15,
 128 #endif
 129         VCPU_REGS_RIP,
 130         NR_VCPU_REGS
 131 };
 132
 133 enum kvm_reg_ex {
 134         VCPU_EXREG_PDPTR = NR_VCPU_REGS,
 135         VCPU_EXREG_CR3,
 136         VCPU_EXREG_RFLAGS,
 137         VCPU_EXREG_CPL,
 138         VCPU_EXREG_SEGMENTS,
 139 };
 140
 141 enum {
 142         VCPU_SREG_ES,
 143         VCPU_SREG_CS,
 144         VCPU_SREG_SS,
 145         VCPU_SREG_DS,
 146         VCPU_SREG_FS,
 147         VCPU_SREG_GS,
 148         VCPU_SREG_TR,
 149         VCPU_SREG_LDTR,
 150 };
 151
 152 #include <asm/kvm_emulate.h>
 153
 154 #define KVM_NR_MEM_OBJS 40
 155
 156 #define KVM_NR_DB_REGS  4
 157
 158 #define DR6_BD          (1 << 13)
 159 #define DR6_BS          (1 << 14)
 160 #define DR6_FIXED_1     0xffff0ff0
 161 #define DR6_VOLATILE    0x0000e00f
 162
 163 #define DR7_BP_EN_MASK  0x000000ff
 164 #define DR7_GE          (1 << 9)
 165 #define DR7_GD          (1 << 13)
 166 #define DR7_FIXED_1     0x00000400
 167 #define DR7_VOLATILE    0xffff23ff
 168
 169 /* apic attention bits */
 170 #define KVM_APIC_CHECK_VAPIC    0
 171 /*
 172  * The following bit is set with PV-EOI, unset on EOI.
 173  * We detect PV-EOI changes by guest by comparing
 174  * this bit with PV-EOI in guest memory.
 175  * See the implementation in apic_update_pv_eoi.
 176  */
 177 #define KVM_APIC_PV_EOI_PENDING 1
 178
 179 /*
 180  * We don't want allocation failures within the mmu code, so we preallocate
 181  * enough memory for a single page fault in a cache.
 182  */
 183 struct kvm_mmu_memory_cache {
 184         int nobjs;
 185         void *objects[KVM_NR_MEM_OBJS];
 186 };
 187
 188 /*
 189  * kvm_mmu_page_role, below, is defined as:
 190  *
 191  *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)
 192  *   bits 4:7 - page table level for this shadow (1-4)
 193  *   bits 8:9 - page table quadrant for 2-level guests
 194  *   bit   16 - direct mapping of virtual to physical mapping at gfn
 195  *              used for real mode and two-dimensional paging
 196  *   bits 17:19 - common access permissions for all ptes in this shadow page
 197  */
 198 union kvm_mmu_page_role {
 199         unsigned word;
 200         struct {
 201                 unsigned level:4;
 202                 unsigned cr4_pae:1;
 203                 unsigned quadrant:2;
 204                 unsigned pad_for_nice_hex_output:6;
 205                 unsigned direct:1;
 206                 unsigned access:3;
 207                 unsigned invalid:1;
 208                 unsigned nxe:1;
 209                 unsigned cr0_wp:1;
 210                 unsigned smep_andnot_wp:1;
 211         };
 212 };
 213
 214 struct kvm_mmu_page {
 215         struct list_head link;
 216         struct hlist_node hash_link;
 217
 218         /*
 219          * The following two entries are used to key the shadow page in the
 220          * hash table.
 221          */
 222         gfn_t gfn;
 223         union kvm_mmu_page_role role;
 224
 225         u64 *spt;
 226         /* hold the gfn of each spte inside spt */
 227         gfn_t *gfns;
 228         bool unsync;
 229         int root_count;          /* Currently serving as active root */
 230         unsigned int unsync_children;
 231         unsigned long parent_ptes;      /* Reverse mapping for parent_pte */
 232
 233         /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen.  */
 234         unsigned long mmu_valid_gen;
 235
 236         DECLARE_BITMAP(unsync_child_bitmap, 512);
 237
 238 #ifdef CONFIG_X86_32
 239         /*
 240          * Used out of the mmu-lock to avoid reading spte values while an
 241          * update is in progress; see the comments in __get_spte_lockless().
 242          */
 243         int clear_spte_count;
 244 #endif
 245
 246         /* Number of writes since the last time traversal visited this page.  */
 247         int write_flooding_count;
 248 };
 249
 250 struct kvm_pio_request {
 251         unsigned long count;
 252         int in;
 253         int port;
 254         int size;
 255 };
 256
 257 /*
 258  * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
 259  * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
 260  * mode.
 261  */
 262 struct kvm_mmu {
 263         void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
 264         unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
 265         u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
 266         int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
 267                           bool prefault);
 268         void (*inject_page_fault)(struct kvm_vcpu *vcpu,
 269                                   struct x86_exception *fault);
 270         gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
 271                             struct x86_exception *exception);
 272         gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
 273         int (*sync_page)(struct kvm_vcpu *vcpu,
 274                          struct kvm_mmu_page *sp);
 275         void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
 276         void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
 277                            u64 *spte, const void *pte);
 278         hpa_t root_hpa;
 279         int root_level;
 280         int shadow_root_level;
 281         union kvm_mmu_page_role base_role;
 282         bool direct_map;
 283
 284         /*
 285          * Bitmap; bit set = permission fault
 286          * Byte index: page fault error code [4:1]
 287          * Bit index: pte permissions in ACC_* format
 288          */
 289         u8 permissions[16];
 290
 291         u64 *pae_root;
 292         u64 *lm_root;
 293         u64 rsvd_bits_mask[2][4];
 294         u64 bad_mt_xwr;
 295
 296         /*
 297          * Bitmap: bit set = last pte in walk
 298          * index[0:1]: level (zero-based)
 299          * index[2]: pte.ps
 300          */
 301         u8 last_pte_bitmap;
 302
 303         bool nx;
 304
 305         u64 pdptrs[4]; /* pae */
 306 };
 307
 308 enum pmc_type {
 309         KVM_PMC_GP = 0,
 310         KVM_PMC_FIXED,
 311 };
 312
 313 struct kvm_pmc {
 314         enum pmc_type type;
 315         u8 idx;
 316         u64 counter;
 317         u64 eventsel;
 318         struct perf_event *perf_event;
 319         struct kvm_vcpu *vcpu;
 320 };
 321
 322 struct kvm_pmu {
 323         unsigned nr_arch_gp_counters;
 324         unsigned nr_arch_fixed_counters;
 325         unsigned available_event_types;
 326         u64 fixed_ctr_ctrl;
 327         u64 global_ctrl;
 328         u64 global_status;
 329         u64 global_ovf_ctrl;
 330         u64 counter_bitmask[2];
 331         u64 global_ctrl_mask;
 332         u64 reserved_bits;
 333         u8 version;
 334         struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
 335         struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
 336         struct irq_work irq_work;
 337         u64 reprogram_pmi;
 338 };
 339
 340 struct kvm_vcpu_arch {
 341         /*
 342          * rip and regs accesses must go through
 343          * kvm_{register,rip}_{read,write} functions.
 344          */
 345         unsigned long regs[NR_VCPU_REGS];
 346         u32 regs_avail;
 347         u32 regs_dirty;
 348
 349         unsigned long cr0;
 350         unsigned long cr0_guest_owned_bits;
 351         unsigned long cr2;
 352         unsigned long cr3;
 353         unsigned long cr4;
 354         unsigned long cr4_guest_owned_bits;
 355         unsigned long cr8;
 356         u32 hflags;
 357         u64 efer;
 358         u64 apic_base;
 359         struct kvm_lapic *apic;    /* kernel irqchip context */
 360         unsigned long apic_attention;
 361         int32_t apic_arb_prio;
 362         int mp_state;
 363         u64 ia32_misc_enable_msr;
 364         bool tpr_access_reporting;
 365
 366         /*
 367          * Paging state of the vcpu
 368          *
 369          * If the vcpu runs in guest mode with two level paging this still saves
 370          * the paging mode of the l1 guest. This context is always used to
 371          * handle faults.
 372          */
 373         struct kvm_mmu mmu;
 374
 375         /*
 376          * Paging state of an L2 guest (used for nested npt)
 377          *
 378          * This context will save all necessary information to walk page tables
 379          * of the an L2 guest. This context is only initialized for page table
 380          * walking and not for faulting since we never handle l2 page faults on
 381          * the host.
 382          */
 383         struct kvm_mmu nested_mmu;
 384
 385         /*
 386          * Pointer to the mmu context currently used for
 387          * gva_to_gpa translations.
 388          */
 389         struct kvm_mmu *walk_mmu;
 390
 391         struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
 392         struct kvm_mmu_memory_cache mmu_page_cache;
 393         struct kvm_mmu_memory_cache mmu_page_header_cache;
 394
 395         struct fpu guest_fpu;
 396         u64 xcr0;
 397         u64 guest_supported_xcr0;
 398         u32 guest_xstate_size;
 399
 400         struct kvm_pio_request pio;
 401         void *pio_data;
 402
 403         u8 event_exit_inst_len;
 404
 405         struct kvm_queued_exception {
 406                 bool pending;
 407                 bool has_error_code;
 408                 bool reinject;
 409                 u8 nr;
 410                 u32 error_code;
 411         } exception;
 412
 413         struct kvm_queued_interrupt {
 414                 bool pending;
 415                 bool soft;
 416                 u8 nr;
 417         } interrupt;
 418
 419         int halt_request; /* real mode on Intel only */
 420
 421         int cpuid_nent;
 422         struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
 423         /* emulate context */
 424
 425         struct x86_emulate_ctxt emulate_ctxt;
 426         bool emulate_regs_need_sync_to_vcpu;
 427         bool emulate_regs_need_sync_from_vcpu;
 428         int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
 429
 430         gpa_t time;
 431         struct pvclock_vcpu_time_info hv_clock;
 432         unsigned int hw_tsc_khz;
 433         struct gfn_to_hva_cache pv_time;
 434         bool pv_time_enabled;
 435         /* set guest stopped flag in pvclock flags field */
 436         bool pvclock_set_guest_stopped_request;
 437
 438         struct {
 439                 u64 msr_val;
 440                 u64 last_steal;
 441                 u64 accum_steal;
 442                 struct gfn_to_hva_cache stime;
 443                 struct kvm_steal_time steal;
 444         } st;
 445
 446         u64 last_guest_tsc;
 447         u64 last_kernel_ns;
 448         u64 last_host_tsc;
 449         u64 tsc_offset_adjustment;
 450         u64 this_tsc_nsec;
 451         u64 this_tsc_write;
 452         u8  this_tsc_generation;
 453         bool tsc_catchup;
 454         bool tsc_always_catchup;
 455         s8 virtual_tsc_shift;
 456         u32 virtual_tsc_mult;
 457         u32 virtual_tsc_khz;
 458         s64 ia32_tsc_adjust_msr;
 459
 460         atomic_t nmi_queued;  /* unprocessed asynchronous NMIs */
 461         unsigned nmi_pending; /* NMI queued after currently running handler */
 462         bool nmi_injected;    /* Trying to inject an NMI this entry */
 463
 464         struct mtrr_state_type mtrr_state;
 465         u32 pat;
 466
 467         int switch_db_regs;
 468         unsigned long db[KVM_NR_DB_REGS];
 469         unsigned long dr6;
 470         unsigned long dr7;
 471         unsigned long eff_db[KVM_NR_DB_REGS];
 472         unsigned long guest_debug_dr7;
 473
 474         u64 mcg_cap;
 475         u64 mcg_status;
 476         u64 mcg_ctl;
 477         u64 *mce_banks;
 478
 479         /* Cache MMIO info */
 480         u64 mmio_gva;
 481         unsigned access;
 482         gfn_t mmio_gfn;
 483
 484         struct kvm_pmu pmu;
 485
 486         /* used for guest single stepping over the given code position */
 487         unsigned long singlestep_rip;
 488
 489         /* fields used by HYPER-V emulation */
 490         u64 hv_vapic;
 491
 492         cpumask_var_t wbinvd_dirty_mask;
 493
 494         unsigned long last_retry_eip;
 495         unsigned long last_retry_addr;
 496
 497         struct {
 498                 bool halted;
 499                 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
 500                 struct gfn_to_hva_cache data;
 501                 u64 msr_val;
 502                 u32 id;
 503                 bool send_user_only;
 504         } apf;
 505
 506         /* OSVW MSRs (AMD only) */
 507         struct {
 508                 u64 length;
 509                 u64 status;
 510         } osvw;
 511
 512         struct {
 513                 u64 msr_val;
 514                 struct gfn_to_hva_cache data;
 515         } pv_eoi;
 516
 517         /*
 518          * Indicate whether the access faults on its page table in guest
 519          * which is set when fix page fault and used to detect unhandeable
 520          * instruction.
 521          */
 522         bool write_fault_to_shadow_pgtable;
 523
 524         /* set at EPT violation at this point */
 525         unsigned long exit_qualification;
 526
 527         /* pv related host specific info */
 528         struct {
 529                 bool pv_unhalted;
 530         } pv;
 531 };
 532
 533 struct kvm_lpage_info {
 534         int write_count;
 535 };
 536
 537 struct kvm_arch_memory_slot {
 538         unsigned long *rmap[KVM_NR_PAGE_SIZES];
 539         struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
 540 };
 541
 542 struct kvm_apic_map {
 543         struct rcu_head rcu;
 544         u8 ldr_bits;
 545         /* fields bellow are used to decode ldr values in different modes */
 546         u32 cid_shift, cid_mask, lid_mask;
 547         struct kvm_lapic *phys_map[256];
 548         /* first index is cluster id second is cpu id in a cluster */
 549         struct kvm_lapic *logical_map[16][16];
 550 };
 551
 552 struct kvm_arch {
 553         unsigned int n_used_mmu_pages;
 554         unsigned int n_requested_mmu_pages;
 555         unsigned int n_max_mmu_pages;
 556         unsigned int indirect_shadow_pages;
 557         unsigned long mmu_valid_gen;
 558         struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
 559         /*
 560          * Hash table of struct kvm_mmu_page.
 561          */
 562         struct list_head active_mmu_pages;
 563         struct list_head zapped_obsolete_pages;
 564
 565         struct list_head assigned_dev_head;
 566         struct iommu_domain *iommu_domain;
 567         bool iommu_noncoherent;
 568 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
 569         atomic_t noncoherent_dma_count;
 570         struct kvm_pic *vpic;
 571         struct kvm_ioapic *vioapic;
 572         struct kvm_pit *vpit;
 573         int vapics_in_nmi_mode;
 574         struct mutex apic_map_lock;
 575         struct kvm_apic_map *apic_map;
 576
 577         unsigned int tss_addr;
 578         struct page *apic_access_page;
 579
 580         gpa_t wall_clock;
 581
 582         struct page *ept_identity_pagetable;
 583         bool ept_identity_pagetable_done;
 584         gpa_t ept_identity_map_addr;
 585
 586         unsigned long irq_sources_bitmap;
 587         s64 kvmclock_offset;
 588         raw_spinlock_t tsc_write_lock;
 589         u64 last_tsc_nsec;
 590         u64 last_tsc_write;
 591         u32 last_tsc_khz;
 592         u64 cur_tsc_nsec;
 593         u64 cur_tsc_write;
 594         u64 cur_tsc_offset;
 595         u8  cur_tsc_generation;
 596         int nr_vcpus_matched_tsc;
 597
 598         spinlock_t pvclock_gtod_sync_lock;
 599         bool use_master_clock;
 600         u64 master_kernel_ns;
 601         cycle_t master_cycle_now;
 602
 603         struct kvm_xen_hvm_config xen_hvm_config;
 604
 605         /* fields used by HYPER-V emulation */
 606         u64 hv_guest_os_id;
 607         u64 hv_hypercall;
 608         u64 hv_tsc_page;
 609
 610         #ifdef CONFIG_KVM_MMU_AUDIT
 611         int audit_point;
 612         #endif
 613 };
 614
 615 struct kvm_vm_stat {
 616         u32 mmu_shadow_zapped;
 617         u32 mmu_pte_write;
 618         u32 mmu_pte_updated;
 619         u32 mmu_pde_zapped;
 620         u32 mmu_flooded;
 621         u32 mmu_recycled;
 622         u32 mmu_cache_miss;
 623         u32 mmu_unsync;
 624         u32 remote_tlb_flush;
 625         u32 lpages;
 626 };
 627
 628 struct kvm_vcpu_stat {
 629         u32 pf_fixed;
 630         u32 pf_guest;
 631         u32 tlb_flush;
 632         u32 invlpg;
 633
 634         u32 exits;
 635         u32 io_exits;
 636         u32 mmio_exits;
 637         u32 signal_exits;
 638         u32 irq_window_exits;
 639         u32 nmi_window_exits;
 640         u32 halt_exits;
 641         u32 halt_wakeup;
 642         u32 request_irq_exits;
 643         u32 irq_exits;
 644         u32 host_state_reload;
 645         u32 efer_reload;
 646         u32 fpu_reload;
 647         u32 insn_emulation;
 648         u32 insn_emulation_fail;
 649         u32 hypercalls;
 650         u32 irq_injections;
 651         u32 nmi_injections;
 652 };
 653
 654 struct x86_instruction_info;
 655
 656 struct msr_data {
 657         bool host_initiated;
 658         u32 index;
 659         u64 data;
 660 };
 661
 662 struct kvm_x86_ops {
 663         int (*cpu_has_kvm_support)(void);          /* __init */
 664         int (*disabled_by_bios)(void);             /* __init */
 665         int (*hardware_enable)(void *dummy);
 666         void (*hardware_disable)(void *dummy);
 667         void (*check_processor_compatibility)(void *rtn);
 668         int (*hardware_setup)(void);               /* __init */
 669         void (*hardware_unsetup)(void);            /* __exit */
 670         bool (*cpu_has_accelerated_tpr)(void);
 671         void (*cpuid_update)(struct kvm_vcpu *vcpu);
 672
 673         /* Create, but do not attach this VCPU */
 674         struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
 675         void (*vcpu_free)(struct kvm_vcpu *vcpu);
 676         void (*vcpu_reset)(struct kvm_vcpu *vcpu);
 677
 678         void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
 679         void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
 680         void (*vcpu_put)(struct kvm_vcpu *vcpu);
 681
 682         void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);
 683         int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
 684         int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
 685         u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
 686         void (*get_segment)(struct kvm_vcpu *vcpu,
 687                             struct kvm_segment *var, int seg);
 688         int (*get_cpl)(struct kvm_vcpu *vcpu);
 689         void (*set_segment)(struct kvm_vcpu *vcpu,
 690                             struct kvm_segment *var, int seg);
 691         void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
 692         void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
 693         void (*decache_cr3)(struct kvm_vcpu *vcpu);
 694         void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
 695         void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
 696         void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
 697         int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
 698         void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
 699         void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
 700         void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
 701         void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
 702         void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
 703         void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
 704         void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
 705         unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
 706         void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
 707         void (*fpu_activate)(struct kvm_vcpu *vcpu);
 708         void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
 709
 710         void (*tlb_flush)(struct kvm_vcpu *vcpu);
 711
 712         void (*run)(struct kvm_vcpu *vcpu);
 713         int (*handle_exit)(struct kvm_vcpu *vcpu);
 714         void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
 715         void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
 716         u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
 717         void (*patch_hypercall)(struct kvm_vcpu *vcpu,
 718                                 unsigned char *hypercall_addr);
 719         void (*set_irq)(struct kvm_vcpu *vcpu);
 720         void (*set_nmi)(struct kvm_vcpu *vcpu);
 721         void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
 722                                 bool has_error_code, u32 error_code,
 723                                 bool reinject);
 724         void (*cancel_injection)(struct kvm_vcpu *vcpu);
 725         int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
 726         int (*nmi_allowed)(struct kvm_vcpu *vcpu);
 727         bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
 728         void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
 729         int (*enable_nmi_window)(struct kvm_vcpu *vcpu);
 730         int (*enable_irq_window)(struct kvm_vcpu *vcpu);
 731         void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
 732         int (*vm_has_apicv)(struct kvm *kvm);
 733         void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
 734         void (*hwapic_isr_update)(struct kvm *kvm, int isr);
 735         void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
 736         void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set);
 737         void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
 738         void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
 739         int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
 740         int (*get_tdp_level)(void);
 741         u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
 742         int (*get_lpage_level)(void);
 743         bool (*rdtscp_supported)(void);
 744         bool (*invpcid_supported)(void);
 745         void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
 746
 747         void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
 748
 749         void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
 750
 751         bool (*has_wbinvd_exit)(void);
 752
 753         void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
 754         u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu);
 755         void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
 756
 757         u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
 758         u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
 759
 760         void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
 761
 762         int (*check_intercept)(struct kvm_vcpu *vcpu,
 763                                struct x86_instruction_info *info,
 764                                enum x86_intercept_stage stage);
 765         void (*handle_external_intr)(struct kvm_vcpu *vcpu);
 766 };
 767
 768 struct kvm_arch_async_pf {
 769         u32 token;
 770         gfn_t gfn;
 771         unsigned long cr3;
 772         bool direct_map;
 773 };
 774
 775 extern struct kvm_x86_ops *kvm_x86_ops;
 776
 777 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
 778                                            s64 adjustment)
 779 {
 780         kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
 781 }
 782
 783 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
 784 {
 785         kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
 786 }
 787
 788 int kvm_mmu_module_init(void);
 789 void kvm_mmu_module_exit(void);
 790
 791 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
 792 int kvm_mmu_create(struct kvm_vcpu *vcpu);
 793 void kvm_mmu_setup(struct kvm_vcpu *vcpu);
 794 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
 795                 u64 dirty_mask, u64 nx_mask, u64 x_mask);
 796
 797 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
 798 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
 799 void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
 800                                      struct kvm_memory_slot *slot,
 801                                      gfn_t gfn_offset, unsigned long mask);
 802 void kvm_mmu_zap_all(struct kvm *kvm);
 803 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm);
 804 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
 805 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
 806
 807 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
 808
 809 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
 810                           const void *val, int bytes);
 811 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
 812
 813 extern bool tdp_enabled;
 814
 815 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
 816
 817 /* control of guest tsc rate supported? */
 818 extern bool kvm_has_tsc_control;
 819 /* minimum supported tsc_khz for guests */
 820 extern u32  kvm_min_guest_tsc_khz;
 821 /* maximum supported tsc_khz for guests */
 822 extern u32  kvm_max_guest_tsc_khz;
 823
 824 enum emulation_result {
 825         EMULATE_DONE,         /* no further processing */
 826         EMULATE_USER_EXIT,    /* kvm_run ready for userspace exit */
 827         EMULATE_FAIL,         /* can't emulate this instruction */
 828 };
 829
 830 #define EMULTYPE_NO_DECODE          (1 << 0)
 831 #define EMULTYPE_TRAP_UD            (1 << 1)
 832 #define EMULTYPE_SKIP               (1 << 2)
 833 #define EMULTYPE_RETRY              (1 << 3)
 834 #define EMULTYPE_NO_REEXECUTE       (1 << 4)
 835 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
 836                             int emulation_type, void *insn, int insn_len);
 837
 838 static inline int emulate_instruction(struct kvm_vcpu *vcpu,
 839                         int emulation_type)
 840 {
 841         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
 842 }
 843
 844 void kvm_enable_efer_bits(u64);
 845 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
 846 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
 847 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
 848
 849 struct x86_emulate_ctxt;
 850
 851 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
 852 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
 853 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
 854 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
 855
 856 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
 857 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
 858 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector);
 859
 860 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
 861                     int reason, bool has_error_code, u32 error_code);
 862
 863 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
 864 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
 865 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
 866 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
 867 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
 868 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
 869 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
 870 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
 871 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
 872 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
 873
 874 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
 875 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
 876
 877 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
 878 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 879 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
 880
 881 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
 882 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
 883 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
 884 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
 885 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
 886 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 887                             gfn_t gfn, void *data, int offset, int len,
 888                             u32 access);
 889 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
 890 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
 891
 892 static inline int __kvm_irq_line_state(unsigned long *irq_state,
 893                                        int irq_source_id, int level)
 894 {
 895         /* Logical OR for level trig interrupt */
 896         if (level)
 897                 __set_bit(irq_source_id, irq_state);
 898         else
 899                 __clear_bit(irq_source_id, irq_state);
 900
 901         return !!(*irq_state);
 902 }
 903
 904 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
 905 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
 906
 907 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
 908
 909 int fx_init(struct kvm_vcpu *vcpu);
 910
 911 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
 912 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
 913                        const u8 *new, int bytes);
 914 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
 915 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
 916 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
 917 int kvm_mmu_load(struct kvm_vcpu *vcpu);
 918 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
 919 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
 920 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
 921 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
 922                               struct x86_exception *exception);
 923 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
 924                                struct x86_exception *exception);
 925 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
 926                                struct x86_exception *exception);
 927 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
 928                                 struct x86_exception *exception);
 929
 930 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
 931
 932 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
 933                        void *insn, int insn_len);
 934 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
 935 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu);
 936
 937 void kvm_enable_tdp(void);
 938 void kvm_disable_tdp(void);
 939
 940 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
 941 {
 942         return gpa;
 943 }
 944
 945 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
 946 {
 947         struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
 948
 949         return (struct kvm_mmu_page *)page_private(page);
 950 }
 951
 952 static inline u16 kvm_read_ldt(void)
 953 {
 954         u16 ldt;
 955         asm("sldt %0" : "=g"(ldt));
 956         return ldt;
 957 }
 958
 959 static inline void kvm_load_ldt(u16 sel)
 960 {
 961         asm("lldt %0" : : "rm"(sel));
 962 }
 963
 964 #ifdef CONFIG_X86_64
 965 static inline unsigned long read_msr(unsigned long msr)
 966 {
 967         u64 value;
 968
 969         rdmsrl(msr, value);
 970         return value;
 971 }
 972 #endif
 973
 974 static inline u32 get_rdx_init_val(void)
 975 {
 976         return 0x600; /* P6 family */
 977 }
 978
 979 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
 980 {
 981         kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
 982 }
 983
 984 #define TSS_IOPB_BASE_OFFSET 0x66
 985 #define TSS_BASE_SIZE 0x68
 986 #define TSS_IOPB_SIZE (65536 / 8)
 987 #define TSS_REDIRECTION_SIZE (256 / 8)
 988 #define RMODE_TSS_SIZE                                                  \
 989         (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
 990
 991 enum {
 992         TASK_SWITCH_CALL = 0,
 993         TASK_SWITCH_IRET = 1,
 994         TASK_SWITCH_JMP = 2,
 995         TASK_SWITCH_GATE = 3,
 996 };
 997
 998 #define HF_GIF_MASK             (1 << 0)
 999 #define HF_HIF_MASK             (1 << 1)
1000 #define HF_VINTR_MASK           (1 << 2)
1001 #define HF_NMI_MASK             (1 << 3)
1002 #define HF_IRET_MASK            (1 << 4)
1003 #define HF_GUEST_MASK           (1 << 5) /* VCPU is in guest-mode */
1004
1005 /*
1006  * Hardware virtualization extension instructions may fault if a
1007  * reboot turns off virtualization while processes are running.
1008  * Trap the fault and ignore the instruction if that happens.
1009  */
1010 asmlinkage void kvm_spurious_fault(void);
1011
1012 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn)      \
1013         "666: " insn "\n\t" \
1014         "668: \n\t"                           \
1015         ".pushsection .fixup, \"ax\" \n" \
1016         "667: \n\t" \
1017         cleanup_insn "\n\t"                   \
1018         "cmpb $0, kvm_rebooting \n\t"         \
1019         "jne 668b \n\t"                       \
1020         __ASM_SIZE(push) " $666b \n\t"        \
1021         "call kvm_spurious_fault \n\t"        \
1022         ".popsection \n\t" \
1023         _ASM_EXTABLE(666b, 667b)
1024
1025 #define __kvm_handle_fault_on_reboot(insn)              \
1026         ____kvm_handle_fault_on_reboot(insn, "")
1027
1028 #define KVM_ARCH_WANT_MMU_NOTIFIER
1029 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
1030 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1031 int kvm_age_hva(struct kvm *kvm, unsigned long hva);
1032 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1033 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1034 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
1035 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1036 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1037 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1038 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1039 void kvm_vcpu_reset(struct kvm_vcpu *vcpu);
1040
1041 void kvm_define_shared_msr(unsigned index, u32 msr);
1042 void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1043
1044 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1045
1046 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1047                                      struct kvm_async_pf *work);
1048 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1049                                  struct kvm_async_pf *work);
1050 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1051                                struct kvm_async_pf *work);
1052 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1053 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1054
1055 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1056
1057 int kvm_is_in_guest(void);
1058
1059 void kvm_pmu_init(struct kvm_vcpu *vcpu);
1060 void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
1061 void kvm_pmu_reset(struct kvm_vcpu *vcpu);
1062 void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu);
1063 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr);
1064 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
1065 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
1066 int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
1067 void kvm_handle_pmu_event(struct kvm_vcpu *vcpu);
1068 void kvm_deliver_pmi(struct kvm_vcpu *vcpu);
1069
1070 #endif /* _ASM_X86_KVM_HOST_H */