arch/x86/include/asm/kvm_host.h

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This header defines architecture specific interfaces, x86 version
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2.  See
   7  * the COPYING file in the top-level directory.
   8  *
   9  */
  10
  11 #ifndef _ASM_X86_KVM_HOST_H
  12 #define _ASM_X86_KVM_HOST_H
  13
  14 #include <linux/types.h>
  15 #include <linux/mm.h>
  16 #include <linux/mmu_notifier.h>
  17 #include <linux/tracepoint.h>
  18 #include <linux/cpumask.h>
  19 #include <linux/irq_work.h>
  20
  21 #include <linux/kvm.h>
  22 #include <linux/kvm_para.h>
  23 #include <linux/kvm_types.h>
  24 #include <linux/perf_event.h>
  25
  26 #include <asm/pvclock-abi.h>
  27 #include <asm/desc.h>
  28 #include <asm/mtrr.h>
  29 #include <asm/msr-index.h>
  30 #include <asm/asm.h>
  31
  32 #define KVM_MAX_VCPUS 254
  33 #define KVM_SOFT_MAX_VCPUS 160
  34 #define KVM_MEMORY_SLOTS 32
  35 /* memory slots that does not exposed to userspace */
  36 #define KVM_PRIVATE_MEM_SLOTS 4
  37 #define KVM_MEM_SLOTS_NUM (KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS)
  38
  39 #define KVM_MMIO_SIZE 16
  40
  41 #define KVM_PIO_PAGE_OFFSET 1
  42 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
  43
  44 #define CR0_RESERVED_BITS                                               \
  45         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  46                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  47                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  48
  49 #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
  50 #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
  51 #define CR3_PCID_ENABLED_RESERVED_BITS 0xFFFFFF0000000000ULL
  52 #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS |    \
  53                                   0xFFFFFF0000000000ULL)
  54 #define CR4_RESERVED_BITS                                               \
  55         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  56                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  57                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
  58                           | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_RDWRGSFS \
  59                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  60
  61 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  62
  63
  64
  65 #define INVALID_PAGE (~(hpa_t)0)
  66 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  67
  68 #define UNMAPPED_GVA (~(gpa_t)0)
  69
  70 /* KVM Hugepage definitions for x86 */
  71 #define KVM_NR_PAGE_SIZES       3
  72 #define KVM_HPAGE_GFN_SHIFT(x)  (((x) - 1) * 9)
  73 #define KVM_HPAGE_SHIFT(x)      (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
  74 #define KVM_HPAGE_SIZE(x)       (1UL << KVM_HPAGE_SHIFT(x))
  75 #define KVM_HPAGE_MASK(x)       (~(KVM_HPAGE_SIZE(x) - 1))
  76 #define KVM_PAGES_PER_HPAGE(x)  (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
  77
  78 #define SELECTOR_TI_MASK (1 << 2)
  79 #define SELECTOR_RPL_MASK 0x03
  80
  81 #define IOPL_SHIFT 12
  82
  83 #define KVM_PERMILLE_MMU_PAGES 20
  84 #define KVM_MIN_ALLOC_MMU_PAGES 64
  85 #define KVM_MMU_HASH_SHIFT 10
  86 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
  87 #define KVM_MIN_FREE_MMU_PAGES 5
  88 #define KVM_REFILL_PAGES 25
  89 #define KVM_MAX_CPUID_ENTRIES 80
  90 #define KVM_NR_FIXED_MTRR_REGION 88
  91 #define KVM_NR_VAR_MTRR 8
  92
  93 #define ASYNC_PF_PER_VCPU 64
  94
  95 extern raw_spinlock_t kvm_lock;
  96 extern struct list_head vm_list;
  97
  98 struct kvm_vcpu;
  99 struct kvm;
 100 struct kvm_async_pf;
 101
 102 enum kvm_reg {
 103         VCPU_REGS_RAX = 0,
 104         VCPU_REGS_RCX = 1,
 105         VCPU_REGS_RDX = 2,
 106         VCPU_REGS_RBX = 3,
 107         VCPU_REGS_RSP = 4,
 108         VCPU_REGS_RBP = 5,
 109         VCPU_REGS_RSI = 6,
 110         VCPU_REGS_RDI = 7,
 111 #ifdef CONFIG_X86_64
 112         VCPU_REGS_R8 = 8,
 113         VCPU_REGS_R9 = 9,
 114         VCPU_REGS_R10 = 10,
 115         VCPU_REGS_R11 = 11,
 116         VCPU_REGS_R12 = 12,
 117         VCPU_REGS_R13 = 13,
 118         VCPU_REGS_R14 = 14,
 119         VCPU_REGS_R15 = 15,
 120 #endif
 121         VCPU_REGS_RIP,
 122         NR_VCPU_REGS
 123 };
 124
 125 enum kvm_reg_ex {
 126         VCPU_EXREG_PDPTR = NR_VCPU_REGS,
 127         VCPU_EXREG_CR3,
 128         VCPU_EXREG_RFLAGS,
 129         VCPU_EXREG_CPL,
 130         VCPU_EXREG_SEGMENTS,
 131 };
 132
 133 enum {
 134         VCPU_SREG_ES,
 135         VCPU_SREG_CS,
 136         VCPU_SREG_SS,
 137         VCPU_SREG_DS,
 138         VCPU_SREG_FS,
 139         VCPU_SREG_GS,
 140         VCPU_SREG_TR,
 141         VCPU_SREG_LDTR,
 142 };
 143
 144 #include <asm/kvm_emulate.h>
 145
 146 #define KVM_NR_MEM_OBJS 40
 147
 148 #define KVM_NR_DB_REGS  4
 149
 150 #define DR6_BD          (1 << 13)
 151 #define DR6_BS          (1 << 14)
 152 #define DR6_FIXED_1     0xffff0ff0
 153 #define DR6_VOLATILE    0x0000e00f
 154
 155 #define DR7_BP_EN_MASK  0x000000ff
 156 #define DR7_GE          (1 << 9)
 157 #define DR7_GD          (1 << 13)
 158 #define DR7_FIXED_1     0x00000400
 159 #define DR7_VOLATILE    0xffff23ff
 160
 161 /* apic attention bits */
 162 #define KVM_APIC_CHECK_VAPIC    0
 163 /*
 164  * The following bit is set with PV-EOI, unset on EOI.
 165  * We detect PV-EOI changes by guest by comparing
 166  * this bit with PV-EOI in guest memory.
 167  * See the implementation in apic_update_pv_eoi.
 168  */
 169 #define KVM_APIC_PV_EOI_PENDING 1
 170
 171 /*
 172  * We don't want allocation failures within the mmu code, so we preallocate
 173  * enough memory for a single page fault in a cache.
 174  */
 175 struct kvm_mmu_memory_cache {
 176         int nobjs;
 177         void *objects[KVM_NR_MEM_OBJS];
 178 };
 179
 180 /*
 181  * kvm_mmu_page_role, below, is defined as:
 182  *
 183  *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)
 184  *   bits 4:7 - page table level for this shadow (1-4)
 185  *   bits 8:9 - page table quadrant for 2-level guests
 186  *   bit   16 - direct mapping of virtual to physical mapping at gfn
 187  *              used for real mode and two-dimensional paging
 188  *   bits 17:19 - common access permissions for all ptes in this shadow page
 189  */
 190 union kvm_mmu_page_role {
 191         unsigned word;
 192         struct {
 193                 unsigned level:4;
 194                 unsigned cr4_pae:1;
 195                 unsigned quadrant:2;
 196                 unsigned pad_for_nice_hex_output:6;
 197                 unsigned direct:1;
 198                 unsigned access:3;
 199                 unsigned invalid:1;
 200                 unsigned nxe:1;
 201                 unsigned cr0_wp:1;
 202                 unsigned smep_andnot_wp:1;
 203         };
 204 };
 205
 206 struct kvm_mmu_page {
 207         struct list_head link;
 208         struct hlist_node hash_link;
 209
 210         /*
 211          * The following two entries are used to key the shadow page in the
 212          * hash table.
 213          */
 214         gfn_t gfn;
 215         union kvm_mmu_page_role role;
 216
 217         u64 *spt;
 218         /* hold the gfn of each spte inside spt */
 219         gfn_t *gfns;
 220         /*
 221          * One bit set per slot which has memory
 222          * in this shadow page.
 223          */
 224         DECLARE_BITMAP(slot_bitmap, KVM_MEM_SLOTS_NUM);
 225         bool unsync;
 226         int root_count;          /* Currently serving as active root */
 227         unsigned int unsync_children;
 228         unsigned long parent_ptes;      /* Reverse mapping for parent_pte */
 229         DECLARE_BITMAP(unsync_child_bitmap, 512);
 230
 231 #ifdef CONFIG_X86_32
 232         int clear_spte_count;
 233 #endif
 234
 235         int write_flooding_count;
 236 };
 237
 238 struct kvm_pio_request {
 239         unsigned long count;
 240         int in;
 241         int port;
 242         int size;
 243 };
 244
 245 /*
 246  * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
 247  * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
 248  * mode.
 249  */
 250 struct kvm_mmu {
 251         void (*new_cr3)(struct kvm_vcpu *vcpu);
 252         void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
 253         unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
 254         u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
 255         int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
 256                           bool prefault);
 257         void (*inject_page_fault)(struct kvm_vcpu *vcpu,
 258                                   struct x86_exception *fault);
 259         void (*free)(struct kvm_vcpu *vcpu);
 260         gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
 261                             struct x86_exception *exception);
 262         gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
 263         int (*sync_page)(struct kvm_vcpu *vcpu,
 264                          struct kvm_mmu_page *sp);
 265         void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
 266         void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
 267                            u64 *spte, const void *pte);
 268         hpa_t root_hpa;
 269         int root_level;
 270         int shadow_root_level;
 271         union kvm_mmu_page_role base_role;
 272         bool direct_map;
 273
 274         /*
 275          * Bitmap; bit set = permission fault
 276          * Byte index: page fault error code [4:1]
 277          * Bit index: pte permissions in ACC_* format
 278          */
 279         u8 permissions[16];
 280
 281         u64 *pae_root;
 282         u64 *lm_root;
 283         u64 rsvd_bits_mask[2][4];
 284
 285         /*
 286          * Bitmap: bit set = last pte in walk
 287          * index[0:1]: level (zero-based)
 288          * index[2]: pte.ps
 289          */
 290         u8 last_pte_bitmap;
 291
 292         bool nx;
 293
 294         u64 pdptrs[4]; /* pae */
 295 };
 296
 297 enum pmc_type {
 298         KVM_PMC_GP = 0,
 299         KVM_PMC_FIXED,
 300 };
 301
 302 struct kvm_pmc {
 303         enum pmc_type type;
 304         u8 idx;
 305         u64 counter;
 306         u64 eventsel;
 307         struct perf_event *perf_event;
 308         struct kvm_vcpu *vcpu;
 309 };
 310
 311 struct kvm_pmu {
 312         unsigned nr_arch_gp_counters;
 313         unsigned nr_arch_fixed_counters;
 314         unsigned available_event_types;
 315         u64 fixed_ctr_ctrl;
 316         u64 global_ctrl;
 317         u64 global_status;
 318         u64 global_ovf_ctrl;
 319         u64 counter_bitmask[2];
 320         u64 global_ctrl_mask;
 321         u8 version;
 322         struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
 323         struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
 324         struct irq_work irq_work;
 325         u64 reprogram_pmi;
 326 };
 327
 328 struct kvm_vcpu_arch {
 329         /*
 330          * rip and regs accesses must go through
 331          * kvm_{register,rip}_{read,write} functions.
 332          */
 333         unsigned long regs[NR_VCPU_REGS];
 334         u32 regs_avail;
 335         u32 regs_dirty;
 336
 337         unsigned long cr0;
 338         unsigned long cr0_guest_owned_bits;
 339         unsigned long cr2;
 340         unsigned long cr3;
 341         unsigned long cr4;
 342         unsigned long cr4_guest_owned_bits;
 343         unsigned long cr8;
 344         u32 hflags;
 345         u64 efer;
 346         u64 apic_base;
 347         struct kvm_lapic *apic;    /* kernel irqchip context */
 348         unsigned long apic_attention;
 349         int32_t apic_arb_prio;
 350         int mp_state;
 351         int sipi_vector;
 352         u64 ia32_misc_enable_msr;
 353         bool tpr_access_reporting;
 354
 355         /*
 356          * Paging state of the vcpu
 357          *
 358          * If the vcpu runs in guest mode with two level paging this still saves
 359          * the paging mode of the l1 guest. This context is always used to
 360          * handle faults.
 361          */
 362         struct kvm_mmu mmu;
 363
 364         /*
 365          * Paging state of an L2 guest (used for nested npt)
 366          *
 367          * This context will save all necessary information to walk page tables
 368          * of the an L2 guest. This context is only initialized for page table
 369          * walking and not for faulting since we never handle l2 page faults on
 370          * the host.
 371          */
 372         struct kvm_mmu nested_mmu;
 373
 374         /*
 375          * Pointer to the mmu context currently used for
 376          * gva_to_gpa translations.
 377          */
 378         struct kvm_mmu *walk_mmu;
 379
 380         struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
 381         struct kvm_mmu_memory_cache mmu_page_cache;
 382         struct kvm_mmu_memory_cache mmu_page_header_cache;
 383
 384         struct fpu guest_fpu;
 385         u64 xcr0;
 386
 387         struct kvm_pio_request pio;
 388         void *pio_data;
 389
 390         u8 event_exit_inst_len;
 391
 392         struct kvm_queued_exception {
 393                 bool pending;
 394                 bool has_error_code;
 395                 bool reinject;
 396                 u8 nr;
 397                 u32 error_code;
 398         } exception;
 399
 400         struct kvm_queued_interrupt {
 401                 bool pending;
 402                 bool soft;
 403                 u8 nr;
 404         } interrupt;
 405
 406         int halt_request; /* real mode on Intel only */
 407
 408         int cpuid_nent;
 409         struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
 410         /* emulate context */
 411
 412         struct x86_emulate_ctxt emulate_ctxt;
 413         bool emulate_regs_need_sync_to_vcpu;
 414         bool emulate_regs_need_sync_from_vcpu;
 415         int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
 416
 417         gpa_t time;
 418         struct pvclock_vcpu_time_info hv_clock;
 419         unsigned int hw_tsc_khz;
 420         unsigned int time_offset;
 421         struct page *time_page;
 422         /* set guest stopped flag in pvclock flags field */
 423         bool pvclock_set_guest_stopped_request;
 424
 425         struct {
 426                 u64 msr_val;
 427                 u64 last_steal;
 428                 u64 accum_steal;
 429                 struct gfn_to_hva_cache stime;
 430                 struct kvm_steal_time steal;
 431         } st;
 432
 433         u64 last_guest_tsc;
 434         u64 last_kernel_ns;
 435         u64 last_host_tsc;
 436         u64 tsc_offset_adjustment;
 437         u64 this_tsc_nsec;
 438         u64 this_tsc_write;
 439         u8  this_tsc_generation;
 440         bool tsc_catchup;
 441         bool tsc_always_catchup;
 442         s8 virtual_tsc_shift;
 443         u32 virtual_tsc_mult;
 444         u32 virtual_tsc_khz;
 445
 446         atomic_t nmi_queued;  /* unprocessed asynchronous NMIs */
 447         unsigned nmi_pending; /* NMI queued after currently running handler */
 448         bool nmi_injected;    /* Trying to inject an NMI this entry */
 449
 450         struct mtrr_state_type mtrr_state;
 451         u32 pat;
 452
 453         int switch_db_regs;
 454         unsigned long db[KVM_NR_DB_REGS];
 455         unsigned long dr6;
 456         unsigned long dr7;
 457         unsigned long eff_db[KVM_NR_DB_REGS];
 458         unsigned long guest_debug_dr7;
 459
 460         u64 mcg_cap;
 461         u64 mcg_status;
 462         u64 mcg_ctl;
 463         u64 *mce_banks;
 464
 465         /* Cache MMIO info */
 466         u64 mmio_gva;
 467         unsigned access;
 468         gfn_t mmio_gfn;
 469
 470         struct kvm_pmu pmu;
 471
 472         /* used for guest single stepping over the given code position */
 473         unsigned long singlestep_rip;
 474
 475         /* fields used by HYPER-V emulation */
 476         u64 hv_vapic;
 477
 478         cpumask_var_t wbinvd_dirty_mask;
 479
 480         unsigned long last_retry_eip;
 481         unsigned long last_retry_addr;
 482
 483         struct {
 484                 bool halted;
 485                 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
 486                 struct gfn_to_hva_cache data;
 487                 u64 msr_val;
 488                 u32 id;
 489                 bool send_user_only;
 490         } apf;
 491
 492         /* OSVW MSRs (AMD only) */
 493         struct {
 494                 u64 length;
 495                 u64 status;
 496         } osvw;
 497
 498         struct {
 499                 u64 msr_val;
 500                 struct gfn_to_hva_cache data;
 501         } pv_eoi;
 502 };
 503
 504 struct kvm_lpage_info {
 505         int write_count;
 506 };
 507
 508 struct kvm_arch_memory_slot {
 509         unsigned long *rmap[KVM_NR_PAGE_SIZES];
 510         struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
 511 };
 512
 513 struct kvm_apic_map {
 514         struct rcu_head rcu;
 515         u8 ldr_bits;
 516         /* fields bellow are used to decode ldr values in different modes */
 517         u32 cid_shift, cid_mask, lid_mask;
 518         struct kvm_lapic *phys_map[256];
 519         /* first index is cluster id second is cpu id in a cluster */
 520         struct kvm_lapic *logical_map[16][16];
 521 };
 522
 523 struct kvm_arch {
 524         unsigned int n_used_mmu_pages;
 525         unsigned int n_requested_mmu_pages;
 526         unsigned int n_max_mmu_pages;
 527         unsigned int indirect_shadow_pages;
 528         struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
 529         /*
 530          * Hash table of struct kvm_mmu_page.
 531          */
 532         struct list_head active_mmu_pages;
 533         struct list_head assigned_dev_head;
 534         struct iommu_domain *iommu_domain;
 535         int iommu_flags;
 536         struct kvm_pic *vpic;
 537         struct kvm_ioapic *vioapic;
 538         struct kvm_pit *vpit;
 539         int vapics_in_nmi_mode;
 540         struct mutex apic_map_lock;
 541         struct kvm_apic_map *apic_map;
 542
 543         unsigned int tss_addr;
 544         struct page *apic_access_page;
 545
 546         gpa_t wall_clock;
 547
 548         struct page *ept_identity_pagetable;
 549         bool ept_identity_pagetable_done;
 550         gpa_t ept_identity_map_addr;
 551
 552         unsigned long irq_sources_bitmap;
 553         s64 kvmclock_offset;
 554         raw_spinlock_t tsc_write_lock;
 555         u64 last_tsc_nsec;
 556         u64 last_tsc_write;
 557         u32 last_tsc_khz;
 558         u64 cur_tsc_nsec;
 559         u64 cur_tsc_write;
 560         u64 cur_tsc_offset;
 561         u8  cur_tsc_generation;
 562
 563         struct kvm_xen_hvm_config xen_hvm_config;
 564
 565         /* fields used by HYPER-V emulation */
 566         u64 hv_guest_os_id;
 567         u64 hv_hypercall;
 568
 569         #ifdef CONFIG_KVM_MMU_AUDIT
 570         int audit_point;
 571         #endif
 572 };
 573
 574 struct kvm_vm_stat {
 575         u32 mmu_shadow_zapped;
 576         u32 mmu_pte_write;
 577         u32 mmu_pte_updated;
 578         u32 mmu_pde_zapped;
 579         u32 mmu_flooded;
 580         u32 mmu_recycled;
 581         u32 mmu_cache_miss;
 582         u32 mmu_unsync;
 583         u32 remote_tlb_flush;
 584         u32 lpages;
 585 };
 586
 587 struct kvm_vcpu_stat {
 588         u32 pf_fixed;
 589         u32 pf_guest;
 590         u32 tlb_flush;
 591         u32 invlpg;
 592
 593         u32 exits;
 594         u32 io_exits;
 595         u32 mmio_exits;
 596         u32 signal_exits;
 597         u32 irq_window_exits;
 598         u32 nmi_window_exits;
 599         u32 halt_exits;
 600         u32 halt_wakeup;
 601         u32 request_irq_exits;
 602         u32 irq_exits;
 603         u32 host_state_reload;
 604         u32 efer_reload;
 605         u32 fpu_reload;
 606         u32 insn_emulation;
 607         u32 insn_emulation_fail;
 608         u32 hypercalls;
 609         u32 irq_injections;
 610         u32 nmi_injections;
 611 };
 612
 613 struct x86_instruction_info;
 614
 615 struct kvm_x86_ops {
 616         int (*cpu_has_kvm_support)(void);          /* __init */
 617         int (*disabled_by_bios)(void);             /* __init */
 618         int (*hardware_enable)(void *dummy);
 619         void (*hardware_disable)(void *dummy);
 620         void (*check_processor_compatibility)(void *rtn);
 621         int (*hardware_setup)(void);               /* __init */
 622         void (*hardware_unsetup)(void);            /* __exit */
 623         bool (*cpu_has_accelerated_tpr)(void);
 624         void (*cpuid_update)(struct kvm_vcpu *vcpu);
 625
 626         /* Create, but do not attach this VCPU */
 627         struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
 628         void (*vcpu_free)(struct kvm_vcpu *vcpu);
 629         int (*vcpu_reset)(struct kvm_vcpu *vcpu);
 630
 631         void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
 632         void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
 633         void (*vcpu_put)(struct kvm_vcpu *vcpu);
 634
 635         void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);
 636         int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
 637         int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
 638         u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
 639         void (*get_segment)(struct kvm_vcpu *vcpu,
 640                             struct kvm_segment *var, int seg);
 641         int (*get_cpl)(struct kvm_vcpu *vcpu);
 642         void (*set_segment)(struct kvm_vcpu *vcpu,
 643                             struct kvm_segment *var, int seg);
 644         void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
 645         void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
 646         void (*decache_cr3)(struct kvm_vcpu *vcpu);
 647         void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
 648         void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
 649         void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
 650         int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
 651         void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
 652         void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
 653         void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
 654         void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
 655         void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
 656         void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
 657         void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
 658         unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
 659         void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
 660         void (*fpu_activate)(struct kvm_vcpu *vcpu);
 661         void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
 662
 663         void (*tlb_flush)(struct kvm_vcpu *vcpu);
 664
 665         void (*run)(struct kvm_vcpu *vcpu);
 666         int (*handle_exit)(struct kvm_vcpu *vcpu);
 667         void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
 668         void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
 669         u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
 670         void (*patch_hypercall)(struct kvm_vcpu *vcpu,
 671                                 unsigned char *hypercall_addr);
 672         void (*set_irq)(struct kvm_vcpu *vcpu);
 673         void (*set_nmi)(struct kvm_vcpu *vcpu);
 674         void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
 675                                 bool has_error_code, u32 error_code,
 676                                 bool reinject);
 677         void (*cancel_injection)(struct kvm_vcpu *vcpu);
 678         int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
 679         int (*nmi_allowed)(struct kvm_vcpu *vcpu);
 680         bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
 681         void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
 682         void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
 683         void (*enable_irq_window)(struct kvm_vcpu *vcpu);
 684         void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
 685         int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
 686         int (*get_tdp_level)(void);
 687         u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
 688         int (*get_lpage_level)(void);
 689         bool (*rdtscp_supported)(void);
 690         bool (*invpcid_supported)(void);
 691         void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
 692
 693         void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
 694
 695         void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
 696
 697         bool (*has_wbinvd_exit)(void);
 698
 699         void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
 700         void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
 701
 702         u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
 703         u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
 704
 705         void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
 706
 707         int (*check_intercept)(struct kvm_vcpu *vcpu,
 708                                struct x86_instruction_info *info,
 709                                enum x86_intercept_stage stage);
 710 };
 711
 712 struct kvm_arch_async_pf {
 713         u32 token;
 714         gfn_t gfn;
 715         unsigned long cr3;
 716         bool direct_map;
 717 };
 718
 719 extern struct kvm_x86_ops *kvm_x86_ops;
 720
 721 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
 722                                            s64 adjustment)
 723 {
 724         kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
 725 }
 726
 727 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
 728 {
 729         kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
 730 }
 731
 732 int kvm_mmu_module_init(void);
 733 void kvm_mmu_module_exit(void);
 734
 735 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
 736 int kvm_mmu_create(struct kvm_vcpu *vcpu);
 737 int kvm_mmu_setup(struct kvm_vcpu *vcpu);
 738 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
 739                 u64 dirty_mask, u64 nx_mask, u64 x_mask);
 740
 741 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
 742 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
 743 void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
 744                                      struct kvm_memory_slot *slot,
 745                                      gfn_t gfn_offset, unsigned long mask);
 746 void kvm_mmu_zap_all(struct kvm *kvm);
 747 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
 748 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
 749
 750 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
 751
 752 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
 753                           const void *val, int bytes);
 754 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
 755
 756 extern bool tdp_enabled;
 757
 758 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
 759
 760 /* control of guest tsc rate supported? */
 761 extern bool kvm_has_tsc_control;
 762 /* minimum supported tsc_khz for guests */
 763 extern u32  kvm_min_guest_tsc_khz;
 764 /* maximum supported tsc_khz for guests */
 765 extern u32  kvm_max_guest_tsc_khz;
 766
 767 enum emulation_result {
 768         EMULATE_DONE,       /* no further processing */
 769         EMULATE_DO_MMIO,      /* kvm_run filled with mmio request */
 770         EMULATE_FAIL,         /* can't emulate this instruction */
 771 };
 772
 773 #define EMULTYPE_NO_DECODE          (1 << 0)
 774 #define EMULTYPE_TRAP_UD            (1 << 1)
 775 #define EMULTYPE_SKIP               (1 << 2)
 776 #define EMULTYPE_RETRY              (1 << 3)
 777 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
 778                             int emulation_type, void *insn, int insn_len);
 779
 780 static inline int emulate_instruction(struct kvm_vcpu *vcpu,
 781                         int emulation_type)
 782 {
 783         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
 784 }
 785
 786 void kvm_enable_efer_bits(u64);
 787 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
 788 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
 789
 790 struct x86_emulate_ctxt;
 791
 792 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
 793 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
 794 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
 795 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
 796
 797 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
 798 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
 799
 800 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
 801                     int reason, bool has_error_code, u32 error_code);
 802
 803 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
 804 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
 805 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
 806 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
 807 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
 808 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
 809 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
 810 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
 811 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
 812 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
 813
 814 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
 815 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
 816
 817 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
 818 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 819 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
 820
 821 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
 822 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
 823 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
 824 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
 825 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
 826 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 827                             gfn_t gfn, void *data, int offset, int len,
 828                             u32 access);
 829 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
 830 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
 831
 832 static inline int __kvm_irq_line_state(unsigned long *irq_state,
 833                                        int irq_source_id, int level)
 834 {
 835         /* Logical OR for level trig interrupt */
 836         if (level)
 837                 __set_bit(irq_source_id, irq_state);
 838         else
 839                 __clear_bit(irq_source_id, irq_state);
 840
 841         return !!(*irq_state);
 842 }
 843
 844 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
 845 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
 846
 847 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
 848
 849 int fx_init(struct kvm_vcpu *vcpu);
 850
 851 void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
 852 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
 853                        const u8 *new, int bytes);
 854 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
 855 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
 856 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
 857 int kvm_mmu_load(struct kvm_vcpu *vcpu);
 858 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
 859 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
 860 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access);
 861 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
 862                               struct x86_exception *exception);
 863 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
 864                                struct x86_exception *exception);
 865 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
 866                                struct x86_exception *exception);
 867 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
 868                                 struct x86_exception *exception);
 869
 870 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
 871
 872 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
 873                        void *insn, int insn_len);
 874 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
 875
 876 void kvm_enable_tdp(void);
 877 void kvm_disable_tdp(void);
 878
 879 int complete_pio(struct kvm_vcpu *vcpu);
 880 bool kvm_check_iopl(struct kvm_vcpu *vcpu);
 881
 882 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
 883 {
 884         return gpa;
 885 }
 886
 887 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
 888 {
 889         struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
 890
 891         return (struct kvm_mmu_page *)page_private(page);
 892 }
 893
 894 static inline u16 kvm_read_ldt(void)
 895 {
 896         u16 ldt;
 897         asm("sldt %0" : "=g"(ldt));
 898         return ldt;
 899 }
 900
 901 static inline void kvm_load_ldt(u16 sel)
 902 {
 903         asm("lldt %0" : : "rm"(sel));
 904 }
 905
 906 #ifdef CONFIG_X86_64
 907 static inline unsigned long read_msr(unsigned long msr)
 908 {
 909         u64 value;
 910
 911         rdmsrl(msr, value);
 912         return value;
 913 }
 914 #endif
 915
 916 static inline u32 get_rdx_init_val(void)
 917 {
 918         return 0x600; /* P6 family */
 919 }
 920
 921 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
 922 {
 923         kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
 924 }
 925
 926 #define TSS_IOPB_BASE_OFFSET 0x66
 927 #define TSS_BASE_SIZE 0x68
 928 #define TSS_IOPB_SIZE (65536 / 8)
 929 #define TSS_REDIRECTION_SIZE (256 / 8)
 930 #define RMODE_TSS_SIZE                                                  \
 931         (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
 932
 933 enum {
 934         TASK_SWITCH_CALL = 0,
 935         TASK_SWITCH_IRET = 1,
 936         TASK_SWITCH_JMP = 2,
 937         TASK_SWITCH_GATE = 3,
 938 };
 939
 940 #define HF_GIF_MASK             (1 << 0)
 941 #define HF_HIF_MASK             (1 << 1)
 942 #define HF_VINTR_MASK           (1 << 2)
 943 #define HF_NMI_MASK             (1 << 3)
 944 #define HF_IRET_MASK            (1 << 4)
 945 #define HF_GUEST_MASK           (1 << 5) /* VCPU is in guest-mode */
 946
 947 /*
 948  * Hardware virtualization extension instructions may fault if a
 949  * reboot turns off virtualization while processes are running.
 950  * Trap the fault and ignore the instruction if that happens.
 951  */
 952 asmlinkage void kvm_spurious_fault(void);
 953 extern bool kvm_rebooting;
 954
 955 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn)      \
 956         "666: " insn "\n\t" \
 957         "668: \n\t"                           \
 958         ".pushsection .fixup, \"ax\" \n" \
 959         "667: \n\t" \
 960         cleanup_insn "\n\t"                   \
 961         "cmpb $0, kvm_rebooting \n\t"         \
 962         "jne 668b \n\t"                       \
 963         __ASM_SIZE(push) " $666b \n\t"        \
 964         "call kvm_spurious_fault \n\t"        \
 965         ".popsection \n\t" \
 966         _ASM_EXTABLE(666b, 667b)
 967
 968 #define __kvm_handle_fault_on_reboot(insn)              \
 969         ____kvm_handle_fault_on_reboot(insn, "")
 970
 971 #define KVM_ARCH_WANT_MMU_NOTIFIER
 972 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
 973 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
 974 int kvm_age_hva(struct kvm *kvm, unsigned long hva);
 975 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
 976 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
 977 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
 978 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
 979 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
 980 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
 981
 982 void kvm_define_shared_msr(unsigned index, u32 msr);
 983 void kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
 984
 985 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
 986
 987 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
 988                                      struct kvm_async_pf *work);
 989 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
 990                                  struct kvm_async_pf *work);
 991 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
 992                                struct kvm_async_pf *work);
 993 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
 994 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
 995
 996 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
 997
 998 int kvm_is_in_guest(void);
 999
1000 void kvm_pmu_init(struct kvm_vcpu *vcpu);
1001 void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
1002 void kvm_pmu_reset(struct kvm_vcpu *vcpu);
1003 void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu);
1004 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr);
1005 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
1006 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data);
1007 int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
1008 void kvm_handle_pmu_event(struct kvm_vcpu *vcpu);
1009 void kvm_deliver_pmi(struct kvm_vcpu *vcpu);
1010
1011 #endif /* _ASM_X86_KVM_HOST_H */