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1 #ifndef _ASM_X86_PARAVIRT_TYPES_H
2 #define _ASM_X86_PARAVIRT_TYPES_H
3
4 /* Bitmask of what can be clobbered: usually at least eax. */
5 #define CLBR_NONE 0
6 #define CLBR_EAX (1 << 0)
7 #define CLBR_ECX (1 << 1)
8 #define CLBR_EDX (1 << 2)
9 #define CLBR_EDI (1 << 3)
10
11 #ifdef CONFIG_X86_32
12 /* CLBR_ANY should match all regs platform has. For i386, that's just it */
13 #define CLBR_ANY ((1 << 4) - 1)
14
15 #define CLBR_ARG_REGS (CLBR_EAX | CLBR_EDX | CLBR_ECX)
16 #define CLBR_RET_REG (CLBR_EAX | CLBR_EDX)
17 #define CLBR_SCRATCH (0)
18 #else
19 #define CLBR_RAX CLBR_EAX
20 #define CLBR_RCX CLBR_ECX
21 #define CLBR_RDX CLBR_EDX
22 #define CLBR_RDI CLBR_EDI
23 #define CLBR_RSI (1 << 4)
24 #define CLBR_R8 (1 << 5)
25 #define CLBR_R9 (1 << 6)
26 #define CLBR_R10 (1 << 7)
27 #define CLBR_R11 (1 << 8)
28
29 #define CLBR_ANY ((1 << 9) - 1)
30
31 #define CLBR_ARG_REGS (CLBR_RDI | CLBR_RSI | CLBR_RDX | \
32 CLBR_RCX | CLBR_R8 | CLBR_R9)
33 #define CLBR_RET_REG (CLBR_RAX)
34 #define CLBR_SCRATCH (CLBR_R10 | CLBR_R11)
35
36 #endif /* X86_64 */
37
38 #define CLBR_CALLEE_SAVE ((CLBR_ARG_REGS | CLBR_SCRATCH) & ~CLBR_RET_REG)
39
40 #ifndef __ASSEMBLY__
41
42 #include <asm/desc_defs.h>
43 #include <asm/kmap_types.h>
44 #include <asm/pgtable_types.h>
45
46 struct page;
47 struct thread_struct;
48 struct desc_ptr;
49 struct tss_struct;
50 struct mm_struct;
51 struct desc_struct;
52 struct task_struct;
53 struct cpumask;
54
55 /*
56 * Wrapper type for pointers to code which uses the non-standard
57 * calling convention. See PV_CALL_SAVE_REGS_THUNK below.
58 */
59 struct paravirt_callee_save {
60 void *func;
61 };
62
63 /* general info */
64 struct pv_info {
65 unsigned int kernel_rpl;
66 int shared_kernel_pmd;
67
68 #ifdef CONFIG_X86_64
69 u16 extra_user_64bit_cs; /* __USER_CS if none */
70 #endif
71
72 int paravirt_enabled;
73 const char *name;
74 };
75
76 struct pv_init_ops {
77 /*
78 * Patch may replace one of the defined code sequences with
79 * arbitrary code, subject to the same register constraints.
80 * This generally means the code is not free to clobber any
81 * registers other than EAX. The patch function should return
82 * the number of bytes of code generated, as we nop pad the
83 * rest in generic code.
84 */
85 unsigned (*patch)(u8 type, u16 clobber, void *insnbuf,
86 unsigned long addr, unsigned len);
87 };
88
89
90 struct pv_lazy_ops {
91 /* Set deferred update mode, used for batching operations. */
92 void (*enter)(void);
93 void (*leave)(void);
94 void (*flush)(void);
95 };
96
97 struct pv_time_ops {
98 unsigned long long (*sched_clock)(void);
99 unsigned long long (*steal_clock)(int cpu);
100 };
101
102 struct pv_cpu_ops {
103 /* hooks for various privileged instructions */
104 unsigned long (*get_debugreg)(int regno);
105 void (*set_debugreg)(int regno, unsigned long value);
106
107 void (*clts)(void);
108
109 unsigned long (*read_cr0)(void);
110 void (*write_cr0)(unsigned long);
111
112 unsigned long (*read_cr4_safe)(void);
113 unsigned long (*read_cr4)(void);
114 void (*write_cr4)(unsigned long);
115
116 #ifdef CONFIG_X86_64
117 unsigned long (*read_cr8)(void);
118 void (*write_cr8)(unsigned long);
119 #endif
120
121 /* Segment descriptor handling */
122 void (*load_tr_desc)(void);
123 void (*load_gdt)(const struct desc_ptr *);
124 void (*load_idt)(const struct desc_ptr *);
125 /* store_gdt has been removed. */
126 void (*store_idt)(struct desc_ptr *);
127 void (*set_ldt)(const void *desc, unsigned entries);
128 unsigned long (*store_tr)(void);
129 void (*load_tls)(struct thread_struct *t, unsigned int cpu);
130 #ifdef CONFIG_X86_64
131 void (*load_gs_index)(unsigned int idx);
132 #endif
133 void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum,
134 const void *desc);
135 void (*write_gdt_entry)(struct desc_struct *,
136 int entrynum, const void *desc, int size);
137 void (*write_idt_entry)(gate_desc *,
138 int entrynum, const gate_desc *gate);
139 void (*alloc_ldt)(struct desc_struct *ldt, unsigned entries);
140 void (*free_ldt)(struct desc_struct *ldt, unsigned entries);
141
142 void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t);
143
144 void (*set_iopl_mask)(unsigned mask);
145
146 void (*wbinvd)(void);
147 void (*io_delay)(void);
148
149 /* cpuid emulation, mostly so that caps bits can be disabled */
150 void (*cpuid)(unsigned int *eax, unsigned int *ebx,
151 unsigned int *ecx, unsigned int *edx);
152
153 /* MSR, PMC and TSR operations.
154 err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */
155 u64 (*read_msr)(unsigned int msr, int *err);
156 int (*write_msr)(unsigned int msr, unsigned low, unsigned high);
157
158 u64 (*read_pmc)(int counter);
159
160 #ifdef CONFIG_X86_32
161 /*
162 * Atomically enable interrupts and return to userspace. This
163 * is only used in 32-bit kernels. 64-bit kernels use
164 * usergs_sysret32 instead.
165 */
166 void (*irq_enable_sysexit)(void);
167 #endif
168
169 /*
170 * Switch to usermode gs and return to 64-bit usermode using
171 * sysret. Only used in 64-bit kernels to return to 64-bit
172 * processes. Usermode register state, including %rsp, must
173 * already be restored.
174 */
175 void (*usergs_sysret64)(void);
176
177 /*
178 * Switch to usermode gs and return to 32-bit usermode using
179 * sysret. Used to return to 32-on-64 compat processes.
180 * Other usermode register state, including %esp, must already
181 * be restored.
182 */
183 void (*usergs_sysret32)(void);
184
185 /* Normal iret. Jump to this with the standard iret stack
186 frame set up. */
187 void (*iret)(void);
188
189 void (*swapgs)(void);
190
191 void (*start_context_switch)(struct task_struct *prev);
192 void (*end_context_switch)(struct task_struct *next);
193 };
194
195 struct pv_irq_ops {
196 /*
197 * Get/set interrupt state. save_fl and restore_fl are only
198 * expected to use X86_EFLAGS_IF; all other bits
199 * returned from save_fl are undefined, and may be ignored by
200 * restore_fl.
201 *
202 * NOTE: These functions callers expect the callee to preserve
203 * more registers than the standard C calling convention.
204 */
205 struct paravirt_callee_save save_fl;
206 struct paravirt_callee_save restore_fl;
207 struct paravirt_callee_save irq_disable;
208 struct paravirt_callee_save irq_enable;
209
210 void (*safe_halt)(void);
211 void (*halt)(void);
212
213 #ifdef CONFIG_X86_64
214 void (*adjust_exception_frame)(void);
215 #endif
216 };
217
218 struct pv_apic_ops {
219 #ifdef CONFIG_X86_LOCAL_APIC
220 void (*startup_ipi_hook)(int phys_apicid,
221 unsigned long start_eip,
222 unsigned long start_esp);
223 #endif
224 };
225
226 struct pv_mmu_ops {
227 unsigned long (*read_cr2)(void);
228 void (*write_cr2)(unsigned long);
229
230 unsigned long (*read_cr3)(void);
231 void (*write_cr3)(unsigned long);
232
233 /*
234 * Hooks for intercepting the creation/use/destruction of an
235 * mm_struct.
236 */
237 void (*activate_mm)(struct mm_struct *prev,
238 struct mm_struct *next);
239 void (*dup_mmap)(struct mm_struct *oldmm,
240 struct mm_struct *mm);
241 void (*exit_mmap)(struct mm_struct *mm);
242
243
244 /* TLB operations */
245 void (*flush_tlb_user)(void);
246 void (*flush_tlb_kernel)(void);
247 void (*flush_tlb_single)(unsigned long addr);
248 void (*flush_tlb_others)(const struct cpumask *cpus,
249 struct mm_struct *mm,
250 unsigned long start,
251 unsigned long end);
252
253 /* Hooks for allocating and freeing a pagetable top-level */
254 int (*pgd_alloc)(struct mm_struct *mm);
255 void (*pgd_free)(struct mm_struct *mm, pgd_t *pgd);
256
257 /*
258 * Hooks for allocating/releasing pagetable pages when they're
259 * attached to a pagetable
260 */
261 void (*alloc_pte)(struct mm_struct *mm, unsigned long pfn);
262 void (*alloc_pmd)(struct mm_struct *mm, unsigned long pfn);
263 void (*alloc_pud)(struct mm_struct *mm, unsigned long pfn);
264 void (*release_pte)(unsigned long pfn);
265 void (*release_pmd)(unsigned long pfn);
266 void (*release_pud)(unsigned long pfn);
267
268 /* Pagetable manipulation functions */
269 void (*set_pte)(pte_t *ptep, pte_t pteval);
270 void (*set_pte_at)(struct mm_struct *mm, unsigned long addr,
271 pte_t *ptep, pte_t pteval);
272 void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval);
273 void (*set_pmd_at)(struct mm_struct *mm, unsigned long addr,
274 pmd_t *pmdp, pmd_t pmdval);
275 void (*pte_update)(struct mm_struct *mm, unsigned long addr,
276 pte_t *ptep);
277 void (*pte_update_defer)(struct mm_struct *mm,
278 unsigned long addr, pte_t *ptep);
279 void (*pmd_update)(struct mm_struct *mm, unsigned long addr,
280 pmd_t *pmdp);
281 void (*pmd_update_defer)(struct mm_struct *mm,
282 unsigned long addr, pmd_t *pmdp);
283
284 pte_t (*ptep_modify_prot_start)(struct mm_struct *mm, unsigned long addr,
285 pte_t *ptep);
286 void (*ptep_modify_prot_commit)(struct mm_struct *mm, unsigned long addr,
287 pte_t *ptep, pte_t pte);
288
289 struct paravirt_callee_save pte_val;
290 struct paravirt_callee_save make_pte;
291
292 struct paravirt_callee_save pgd_val;
293 struct paravirt_callee_save make_pgd;
294
295 #if CONFIG_PGTABLE_LEVELS >= 3
296 #ifdef CONFIG_X86_PAE
297 void (*set_pte_atomic)(pte_t *ptep, pte_t pteval);
298 void (*pte_clear)(struct mm_struct *mm, unsigned long addr,
299 pte_t *ptep);
300 void (*pmd_clear)(pmd_t *pmdp);
301
302 #endif /* CONFIG_X86_PAE */
303
304 void (*set_pud)(pud_t *pudp, pud_t pudval);
305
306 struct paravirt_callee_save pmd_val;
307 struct paravirt_callee_save make_pmd;
308
309 #if CONFIG_PGTABLE_LEVELS == 4
310 struct paravirt_callee_save pud_val;
311 struct paravirt_callee_save make_pud;
312
313 void (*set_pgd)(pgd_t *pudp, pgd_t pgdval);
314 #endif /* CONFIG_PGTABLE_LEVELS == 4 */
315 #endif /* CONFIG_PGTABLE_LEVELS >= 3 */
316
317 struct pv_lazy_ops lazy_mode;
318
319 /* dom0 ops */
320
321 /* Sometimes the physical address is a pfn, and sometimes its
322 an mfn. We can tell which is which from the index. */
323 void (*set_fixmap)(unsigned /* enum fixed_addresses */ idx,
324 phys_addr_t phys, pgprot_t flags);
325 };
326
327 struct arch_spinlock;
328 #ifdef CONFIG_SMP
329 #include <asm/spinlock_types.h>
330 #else
331 typedef u16 __ticket_t;
332 #endif
333
334 struct qspinlock;
335
336 struct pv_lock_ops {
337 #ifdef CONFIG_QUEUED_SPINLOCKS
338 void (*queued_spin_lock_slowpath)(struct qspinlock *lock, u32 val);
339 struct paravirt_callee_save queued_spin_unlock;
340
341 void (*wait)(u8 *ptr, u8 val);
342 void (*kick)(int cpu);
343 #else /* !CONFIG_QUEUED_SPINLOCKS */
344 struct paravirt_callee_save lock_spinning;
345 void (*unlock_kick)(struct arch_spinlock *lock, __ticket_t ticket);
346 #endif /* !CONFIG_QUEUED_SPINLOCKS */
347 };
348
349 /* This contains all the paravirt structures: we get a convenient
350 * number for each function using the offset which we use to indicate
351 * what to patch. */
352 struct paravirt_patch_template {
353 struct pv_init_ops pv_init_ops;
354 struct pv_time_ops pv_time_ops;
355 struct pv_cpu_ops pv_cpu_ops;
356 struct pv_irq_ops pv_irq_ops;
357 struct pv_apic_ops pv_apic_ops;
358 struct pv_mmu_ops pv_mmu_ops;
359 struct pv_lock_ops pv_lock_ops;
360 };
361
362 extern struct pv_info pv_info;
363 extern struct pv_init_ops pv_init_ops;
364 extern struct pv_time_ops pv_time_ops;
365 extern struct pv_cpu_ops pv_cpu_ops;
366 extern struct pv_irq_ops pv_irq_ops;
367 extern struct pv_apic_ops pv_apic_ops;
368 extern struct pv_mmu_ops pv_mmu_ops;
369 extern struct pv_lock_ops pv_lock_ops;
370
371 #define PARAVIRT_PATCH(x) \
372 (offsetof(struct paravirt_patch_template, x) / sizeof(void *))
373
374 #define paravirt_type(op) \
375 [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \
376 [paravirt_opptr] "i" (&(op))
377 #define paravirt_clobber(clobber) \
378 [paravirt_clobber] "i" (clobber)
379
380 /*
381 * Generate some code, and mark it as patchable by the
382 * apply_paravirt() alternate instruction patcher.
383 */
384 #define _paravirt_alt(insn_string, type, clobber) \
385 "771:\n\t" insn_string "\n" "772:\n" \
386 ".pushsection .parainstructions,\"a\"\n" \
387 _ASM_ALIGN "\n" \
388 _ASM_PTR " 771b\n" \
389 " .byte " type "\n" \
390 " .byte 772b-771b\n" \
391 " .short " clobber "\n" \
392 ".popsection\n"
393
394 /* Generate patchable code, with the default asm parameters. */
395 #define paravirt_alt(insn_string) \
396 _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]")
397
398 /* Simple instruction patching code. */
399 #define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t"
400
401 #define DEF_NATIVE(ops, name, code) \
402 __visible extern const char start_##ops##_##name[], end_##ops##_##name[]; \
403 asm(NATIVE_LABEL("start_", ops, name) code NATIVE_LABEL("end_", ops, name))
404
405 unsigned paravirt_patch_nop(void);
406 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len);
407 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len);
408 unsigned paravirt_patch_ignore(unsigned len);
409 unsigned paravirt_patch_call(void *insnbuf,
410 const void *target, u16 tgt_clobbers,
411 unsigned long addr, u16 site_clobbers,
412 unsigned len);
413 unsigned paravirt_patch_jmp(void *insnbuf, const void *target,
414 unsigned long addr, unsigned len);
415 unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf,
416 unsigned long addr, unsigned len);
417
418 unsigned paravirt_patch_insns(void *insnbuf, unsigned len,
419 const char *start, const char *end);
420
421 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
422 unsigned long addr, unsigned len);
423
424 int paravirt_disable_iospace(void);
425
426 /*
427 * This generates an indirect call based on the operation type number.
428 * The type number, computed in PARAVIRT_PATCH, is derived from the
429 * offset into the paravirt_patch_template structure, and can therefore be
430 * freely converted back into a structure offset.
431 */
432 #define PARAVIRT_CALL "call *%c[paravirt_opptr];"
433
434 /*
435 * These macros are intended to wrap calls through one of the paravirt
436 * ops structs, so that they can be later identified and patched at
437 * runtime.
438 *
439 * Normally, a call to a pv_op function is a simple indirect call:
440 * (pv_op_struct.operations)(args...).
441 *
442 * Unfortunately, this is a relatively slow operation for modern CPUs,
443 * because it cannot necessarily determine what the destination
444 * address is. In this case, the address is a runtime constant, so at
445 * the very least we can patch the call to e a simple direct call, or
446 * ideally, patch an inline implementation into the callsite. (Direct
447 * calls are essentially free, because the call and return addresses
448 * are completely predictable.)
449 *
450 * For i386, these macros rely on the standard gcc "regparm(3)" calling
451 * convention, in which the first three arguments are placed in %eax,
452 * %edx, %ecx (in that order), and the remaining arguments are placed
453 * on the stack. All caller-save registers (eax,edx,ecx) are expected
454 * to be modified (either clobbered or used for return values).
455 * X86_64, on the other hand, already specifies a register-based calling
456 * conventions, returning at %rax, with parameteres going on %rdi, %rsi,
457 * %rdx, and %rcx. Note that for this reason, x86_64 does not need any
458 * special handling for dealing with 4 arguments, unlike i386.
459 * However, x86_64 also have to clobber all caller saved registers, which
460 * unfortunately, are quite a bit (r8 - r11)
461 *
462 * The call instruction itself is marked by placing its start address
463 * and size into the .parainstructions section, so that
464 * apply_paravirt() in arch/i386/kernel/alternative.c can do the
465 * appropriate patching under the control of the backend pv_init_ops
466 * implementation.
467 *
468 * Unfortunately there's no way to get gcc to generate the args setup
469 * for the call, and then allow the call itself to be generated by an
470 * inline asm. Because of this, we must do the complete arg setup and
471 * return value handling from within these macros. This is fairly
472 * cumbersome.
473 *
474 * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments.
475 * It could be extended to more arguments, but there would be little
476 * to be gained from that. For each number of arguments, there are
477 * the two VCALL and CALL variants for void and non-void functions.
478 *
479 * When there is a return value, the invoker of the macro must specify
480 * the return type. The macro then uses sizeof() on that type to
481 * determine whether its a 32 or 64 bit value, and places the return
482 * in the right register(s) (just %eax for 32-bit, and %edx:%eax for
483 * 64-bit). For x86_64 machines, it just returns at %rax regardless of
484 * the return value size.
485 *
486 * 64-bit arguments are passed as a pair of adjacent 32-bit arguments
487 * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments
488 * in low,high order
489 *
490 * Small structures are passed and returned in registers. The macro
491 * calling convention can't directly deal with this, so the wrapper
492 * functions must do this.
493 *
494 * These PVOP_* macros are only defined within this header. This
495 * means that all uses must be wrapped in inline functions. This also
496 * makes sure the incoming and outgoing types are always correct.
497 */
498 #ifdef CONFIG_X86_32
499 #define PVOP_VCALL_ARGS \
500 unsigned long __eax = __eax, __edx = __edx, __ecx = __ecx
501 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
502
503 #define PVOP_CALL_ARG1(x) "a" ((unsigned long)(x))
504 #define PVOP_CALL_ARG2(x) "d" ((unsigned long)(x))
505 #define PVOP_CALL_ARG3(x) "c" ((unsigned long)(x))
506
507 #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \
508 "=c" (__ecx)
509 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS
510
511 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax), "=d" (__edx)
512 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
513
514 #define EXTRA_CLOBBERS
515 #define VEXTRA_CLOBBERS
516 #else /* CONFIG_X86_64 */
517 /* [re]ax isn't an arg, but the return val */
518 #define PVOP_VCALL_ARGS \
519 unsigned long __edi = __edi, __esi = __esi, \
520 __edx = __edx, __ecx = __ecx, __eax = __eax
521 #define PVOP_CALL_ARGS PVOP_VCALL_ARGS
522
523 #define PVOP_CALL_ARG1(x) "D" ((unsigned long)(x))
524 #define PVOP_CALL_ARG2(x) "S" ((unsigned long)(x))
525 #define PVOP_CALL_ARG3(x) "d" ((unsigned long)(x))
526 #define PVOP_CALL_ARG4(x) "c" ((unsigned long)(x))
527
528 #define PVOP_VCALL_CLOBBERS "=D" (__edi), \
529 "=S" (__esi), "=d" (__edx), \
530 "=c" (__ecx)
531 #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax)
532
533 /* void functions are still allowed [re]ax for scratch */
534 #define PVOP_VCALLEE_CLOBBERS "=a" (__eax)
535 #define PVOP_CALLEE_CLOBBERS PVOP_VCALLEE_CLOBBERS
536
537 #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11"
538 #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11"
539 #endif /* CONFIG_X86_32 */
540
541 #ifdef CONFIG_PARAVIRT_DEBUG
542 #define PVOP_TEST_NULL(op) BUG_ON(op == NULL)
543 #else
544 #define PVOP_TEST_NULL(op) ((void)op)
545 #endif
546
547 #define ____PVOP_CALL(rettype, op, clbr, call_clbr, extra_clbr, \
548 pre, post, ...) \
549 ({ \
550 rettype __ret; \
551 PVOP_CALL_ARGS; \
552 PVOP_TEST_NULL(op); \
553 /* This is 32-bit specific, but is okay in 64-bit */ \
554 /* since this condition will never hold */ \
555 if (sizeof(rettype) > sizeof(unsigned long)) { \
556 asm volatile(pre \
557 paravirt_alt(PARAVIRT_CALL) \
558 post \
559 : call_clbr \
560 : paravirt_type(op), \
561 paravirt_clobber(clbr), \
562 ##__VA_ARGS__ \
563 : "memory", "cc" extra_clbr); \
564 __ret = (rettype)((((u64)__edx) << 32) | __eax); \
565 } else { \
566 asm volatile(pre \
567 paravirt_alt(PARAVIRT_CALL) \
568 post \
569 : call_clbr \
570 : paravirt_type(op), \
571 paravirt_clobber(clbr), \
572 ##__VA_ARGS__ \
573 : "memory", "cc" extra_clbr); \
574 __ret = (rettype)__eax; \
575 } \
576 __ret; \
577 })
578
579 #define __PVOP_CALL(rettype, op, pre, post, ...) \
580 ____PVOP_CALL(rettype, op, CLBR_ANY, PVOP_CALL_CLOBBERS, \
581 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
582
583 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \
584 ____PVOP_CALL(rettype, op.func, CLBR_RET_REG, \
585 PVOP_CALLEE_CLOBBERS, , \
586 pre, post, ##__VA_ARGS__)
587
588
589 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \
590 ({ \
591 PVOP_VCALL_ARGS; \
592 PVOP_TEST_NULL(op); \
593 asm volatile(pre \
594 paravirt_alt(PARAVIRT_CALL) \
595 post \
596 : call_clbr \
597 : paravirt_type(op), \
598 paravirt_clobber(clbr), \
599 ##__VA_ARGS__ \
600 : "memory", "cc" extra_clbr); \
601 })
602
603 #define __PVOP_VCALL(op, pre, post, ...) \
604 ____PVOP_VCALL(op, CLBR_ANY, PVOP_VCALL_CLOBBERS, \
605 VEXTRA_CLOBBERS, \
606 pre, post, ##__VA_ARGS__)
607
608 #define __PVOP_VCALLEESAVE(op, pre, post, ...) \
609 ____PVOP_VCALL(op.func, CLBR_RET_REG, \
610 PVOP_VCALLEE_CLOBBERS, , \
611 pre, post, ##__VA_ARGS__)
612
613
614
615 #define PVOP_CALL0(rettype, op) \
616 __PVOP_CALL(rettype, op, "", "")
617 #define PVOP_VCALL0(op) \
618 __PVOP_VCALL(op, "", "")
619
620 #define PVOP_CALLEE0(rettype, op) \
621 __PVOP_CALLEESAVE(rettype, op, "", "")
622 #define PVOP_VCALLEE0(op) \
623 __PVOP_VCALLEESAVE(op, "", "")
624
625
626 #define PVOP_CALL1(rettype, op, arg1) \
627 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
628 #define PVOP_VCALL1(op, arg1) \
629 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1))
630
631 #define PVOP_CALLEE1(rettype, op, arg1) \
632 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1))
633 #define PVOP_VCALLEE1(op, arg1) \
634 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1))
635
636
637 #define PVOP_CALL2(rettype, op, arg1, arg2) \
638 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
639 PVOP_CALL_ARG2(arg2))
640 #define PVOP_VCALL2(op, arg1, arg2) \
641 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
642 PVOP_CALL_ARG2(arg2))
643
644 #define PVOP_CALLEE2(rettype, op, arg1, arg2) \
645 __PVOP_CALLEESAVE(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
646 PVOP_CALL_ARG2(arg2))
647 #define PVOP_VCALLEE2(op, arg1, arg2) \
648 __PVOP_VCALLEESAVE(op, "", "", PVOP_CALL_ARG1(arg1), \
649 PVOP_CALL_ARG2(arg2))
650
651
652 #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \
653 __PVOP_CALL(rettype, op, "", "", PVOP_CALL_ARG1(arg1), \
654 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
655 #define PVOP_VCALL3(op, arg1, arg2, arg3) \
656 __PVOP_VCALL(op, "", "", PVOP_CALL_ARG1(arg1), \
657 PVOP_CALL_ARG2(arg2), PVOP_CALL_ARG3(arg3))
658
659 /* This is the only difference in x86_64. We can make it much simpler */
660 #ifdef CONFIG_X86_32
661 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
662 __PVOP_CALL(rettype, op, \
663 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
664 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
665 PVOP_CALL_ARG3(arg3), [_arg4] "mr" ((u32)(arg4)))
666 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
667 __PVOP_VCALL(op, \
668 "push %[_arg4];", "lea 4(%%esp),%%esp;", \
669 "0" ((u32)(arg1)), "1" ((u32)(arg2)), \
670 "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4)))
671 #else
672 #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \
673 __PVOP_CALL(rettype, op, "", "", \
674 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
675 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
676 #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \
677 __PVOP_VCALL(op, "", "", \
678 PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
679 PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
680 #endif
681
682 /* Lazy mode for batching updates / context switch */
683 enum paravirt_lazy_mode {
684 PARAVIRT_LAZY_NONE,
685 PARAVIRT_LAZY_MMU,
686 PARAVIRT_LAZY_CPU,
687 };
688
689 enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
690 void paravirt_start_context_switch(struct task_struct *prev);
691 void paravirt_end_context_switch(struct task_struct *next);
692
693 void paravirt_enter_lazy_mmu(void);
694 void paravirt_leave_lazy_mmu(void);
695 void paravirt_flush_lazy_mmu(void);
696
697 void _paravirt_nop(void);
698 u32 _paravirt_ident_32(u32);
699 u64 _paravirt_ident_64(u64);
700
701 #define paravirt_nop ((void *)_paravirt_nop)
702
703 /* These all sit in the .parainstructions section to tell us what to patch. */
704 struct paravirt_patch_site {
705 u8 *instr; /* original instructions */
706 u8 instrtype; /* type of this instruction */
707 u8 len; /* length of original instruction */
708 u16 clobbers; /* what registers you may clobber */
709 };
710
711 extern struct paravirt_patch_site __parainstructions[],
712 __parainstructions_end[];
713
714 #endif /* __ASSEMBLY__ */
715
716 #endif /* _ASM_X86_PARAVIRT_TYPES_H */