1 #ifndef _ASM_X86_PGTABLE_DEFS_H
2 #define _ASM_X86_PGTABLE_DEFS_H
4 #include <linux/const.h>
5 #include <asm/page_types.h>
7 #define FIRST_USER_ADDRESS 0UL
9 #define _PAGE_BIT_PRESENT 0 /* is present */
10 #define _PAGE_BIT_RW 1 /* writeable */
11 #define _PAGE_BIT_USER 2 /* userspace addressable */
12 #define _PAGE_BIT_PWT 3 /* page write through */
13 #define _PAGE_BIT_PCD 4 /* page cache disabled */
14 #define _PAGE_BIT_ACCESSED 5 /* was accessed (raised by CPU) */
15 #define _PAGE_BIT_DIRTY 6 /* was written to (raised by CPU) */
16 #define _PAGE_BIT_PSE 7 /* 4 MB (or 2MB) page */
17 #define _PAGE_BIT_PAT 7 /* on 4KB pages */
18 #define _PAGE_BIT_GLOBAL 8 /* Global TLB entry PPro+ */
19 #define _PAGE_BIT_SOFTW1 9 /* available for programmer */
20 #define _PAGE_BIT_SOFTW2 10 /* " */
21 #define _PAGE_BIT_SOFTW3 11 /* " */
22 #define _PAGE_BIT_PAT_LARGE 12 /* On 2MB or 1GB pages */
23 #define _PAGE_BIT_SOFTW4 58 /* available for programmer */
24 #define _PAGE_BIT_PKEY_BIT0 59 /* Protection Keys, bit 1/4 */
25 #define _PAGE_BIT_PKEY_BIT1 60 /* Protection Keys, bit 2/4 */
26 #define _PAGE_BIT_PKEY_BIT2 61 /* Protection Keys, bit 3/4 */
27 #define _PAGE_BIT_PKEY_BIT3 62 /* Protection Keys, bit 4/4 */
28 #define _PAGE_BIT_NX 63 /* No execute: only valid after cpuid check */
30 #define _PAGE_BIT_SPECIAL _PAGE_BIT_SOFTW1
31 #define _PAGE_BIT_CPA_TEST _PAGE_BIT_SOFTW1
32 #define _PAGE_BIT_HIDDEN _PAGE_BIT_SOFTW3 /* hidden by kmemcheck */
33 #define _PAGE_BIT_SOFT_DIRTY _PAGE_BIT_SOFTW3 /* software dirty tracking */
34 #define _PAGE_BIT_DEVMAP _PAGE_BIT_SOFTW4
36 /* If _PAGE_BIT_PRESENT is clear, we use these: */
37 /* - if the user mapped it with PROT_NONE; pte_present gives true */
38 #define _PAGE_BIT_PROTNONE _PAGE_BIT_GLOBAL
40 #define _PAGE_PRESENT (_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
41 #define _PAGE_RW (_AT(pteval_t, 1) << _PAGE_BIT_RW)
42 #define _PAGE_USER (_AT(pteval_t, 1) << _PAGE_BIT_USER)
43 #define _PAGE_PWT (_AT(pteval_t, 1) << _PAGE_BIT_PWT)
44 #define _PAGE_PCD (_AT(pteval_t, 1) << _PAGE_BIT_PCD)
45 #define _PAGE_ACCESSED (_AT(pteval_t, 1) << _PAGE_BIT_ACCESSED)
46 #define _PAGE_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_DIRTY)
47 #define _PAGE_PSE (_AT(pteval_t, 1) << _PAGE_BIT_PSE)
48 #define _PAGE_GLOBAL (_AT(pteval_t, 1) << _PAGE_BIT_GLOBAL)
49 #define _PAGE_SOFTW1 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW1)
50 #define _PAGE_SOFTW2 (_AT(pteval_t, 1) << _PAGE_BIT_SOFTW2)
51 #define _PAGE_PAT (_AT(pteval_t, 1) << _PAGE_BIT_PAT)
52 #define _PAGE_PAT_LARGE (_AT(pteval_t, 1) << _PAGE_BIT_PAT_LARGE)
53 #define _PAGE_SPECIAL (_AT(pteval_t, 1) << _PAGE_BIT_SPECIAL)
54 #define _PAGE_CPA_TEST (_AT(pteval_t, 1) << _PAGE_BIT_CPA_TEST)
55 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
56 #define _PAGE_PKEY_BIT0 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT0)
57 #define _PAGE_PKEY_BIT1 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT1)
58 #define _PAGE_PKEY_BIT2 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT2)
59 #define _PAGE_PKEY_BIT3 (_AT(pteval_t, 1) << _PAGE_BIT_PKEY_BIT3)
61 #define _PAGE_PKEY_BIT0 (_AT(pteval_t, 0))
62 #define _PAGE_PKEY_BIT1 (_AT(pteval_t, 0))
63 #define _PAGE_PKEY_BIT2 (_AT(pteval_t, 0))
64 #define _PAGE_PKEY_BIT3 (_AT(pteval_t, 0))
66 #define __HAVE_ARCH_PTE_SPECIAL
68 #define _PAGE_PKEY_MASK (_PAGE_PKEY_BIT0 | \
73 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
74 #define _PAGE_KNL_ERRATUM_MASK (_PAGE_DIRTY | _PAGE_ACCESSED)
76 #define _PAGE_KNL_ERRATUM_MASK 0
79 #ifdef CONFIG_KMEMCHECK
80 #define _PAGE_HIDDEN (_AT(pteval_t, 1) << _PAGE_BIT_HIDDEN)
82 #define _PAGE_HIDDEN (_AT(pteval_t, 0))
86 * The same hidden bit is used by kmemcheck, but since kmemcheck
87 * works on kernel pages while soft-dirty engine on user space,
88 * they do not conflict with each other.
91 #ifdef CONFIG_MEM_SOFT_DIRTY
92 #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 1) << _PAGE_BIT_SOFT_DIRTY)
94 #define _PAGE_SOFT_DIRTY (_AT(pteval_t, 0))
98 * Tracking soft dirty bit when a page goes to a swap is tricky.
99 * We need a bit which can be stored in pte _and_ not conflict
100 * with swap entry format. On x86 bits 6 and 7 are *not* involved
101 * into swap entry computation, but bit 6 is used for nonlinear
102 * file mapping, so we borrow bit 7 for soft dirty tracking.
104 * Please note that this bit must be treated as swap dirty page
105 * mark if and only if the PTE has present bit clear!
107 #ifdef CONFIG_MEM_SOFT_DIRTY
108 #define _PAGE_SWP_SOFT_DIRTY _PAGE_PSE
110 #define _PAGE_SWP_SOFT_DIRTY (_AT(pteval_t, 0))
113 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
114 #define _PAGE_NX (_AT(pteval_t, 1) << _PAGE_BIT_NX)
115 #define _PAGE_DEVMAP (_AT(u64, 1) << _PAGE_BIT_DEVMAP)
116 #define __HAVE_ARCH_PTE_DEVMAP
118 #define _PAGE_NX (_AT(pteval_t, 0))
119 #define _PAGE_DEVMAP (_AT(pteval_t, 0))
122 #define _PAGE_PROTNONE (_AT(pteval_t, 1) << _PAGE_BIT_PROTNONE)
124 #define _KERNPG_TABLE (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | \
126 #define _PAGE_TABLE (_KERNPG_TABLE | _PAGE_USER)
129 * Set of bits not changed in pte_modify. The pte's
130 * protection key is treated like _PAGE_RW, for
131 * instance, and is *not* included in this mask since
132 * pte_modify() does modify it.
134 #define _PAGE_CHG_MASK (PTE_PFN_MASK | _PAGE_PCD | _PAGE_PWT | \
135 _PAGE_SPECIAL | _PAGE_ACCESSED | _PAGE_DIRTY | \
137 #define _HPAGE_CHG_MASK (_PAGE_CHG_MASK | _PAGE_PSE)
140 * The cache modes defined here are used to translate between pure SW usage
141 * and the HW defined cache mode bits and/or PAT entries.
143 * The resulting bits for PWT, PCD and PAT should be chosen in a way
144 * to have the WB mode at index 0 (all bits clear). This is the default
145 * right now and likely would break too much if changed.
148 enum page_cache_mode
{
149 _PAGE_CACHE_MODE_WB
= 0,
150 _PAGE_CACHE_MODE_WC
= 1,
151 _PAGE_CACHE_MODE_UC_MINUS
= 2,
152 _PAGE_CACHE_MODE_UC
= 3,
153 _PAGE_CACHE_MODE_WT
= 4,
154 _PAGE_CACHE_MODE_WP
= 5,
155 _PAGE_CACHE_MODE_NUM
= 8
159 #define _PAGE_CACHE_MASK (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)
160 #define _PAGE_NOCACHE (cachemode2protval(_PAGE_CACHE_MODE_UC))
162 #define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
163 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
164 _PAGE_ACCESSED | _PAGE_NX)
166 #define PAGE_SHARED_EXEC __pgprot(_PAGE_PRESENT | _PAGE_RW | \
167 _PAGE_USER | _PAGE_ACCESSED)
168 #define PAGE_COPY_NOEXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
169 _PAGE_ACCESSED | _PAGE_NX)
170 #define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
172 #define PAGE_COPY PAGE_COPY_NOEXEC
173 #define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | \
174 _PAGE_ACCESSED | _PAGE_NX)
175 #define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | \
178 #define __PAGE_KERNEL_EXEC \
179 (_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
180 #define __PAGE_KERNEL (__PAGE_KERNEL_EXEC | _PAGE_NX)
182 #define __PAGE_KERNEL_RO (__PAGE_KERNEL & ~_PAGE_RW)
183 #define __PAGE_KERNEL_RX (__PAGE_KERNEL_EXEC & ~_PAGE_RW)
184 #define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL | _PAGE_NOCACHE)
185 #define __PAGE_KERNEL_VSYSCALL (__PAGE_KERNEL_RX | _PAGE_USER)
186 #define __PAGE_KERNEL_VVAR (__PAGE_KERNEL_RO | _PAGE_USER)
187 #define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
188 #define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
190 #define __PAGE_KERNEL_IO (__PAGE_KERNEL)
191 #define __PAGE_KERNEL_IO_NOCACHE (__PAGE_KERNEL_NOCACHE)
193 #define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
194 #define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
195 #define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
196 #define PAGE_KERNEL_RX __pgprot(__PAGE_KERNEL_RX)
197 #define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
198 #define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
199 #define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
200 #define PAGE_KERNEL_VSYSCALL __pgprot(__PAGE_KERNEL_VSYSCALL)
201 #define PAGE_KERNEL_VVAR __pgprot(__PAGE_KERNEL_VVAR)
203 #define PAGE_KERNEL_IO __pgprot(__PAGE_KERNEL_IO)
204 #define PAGE_KERNEL_IO_NOCACHE __pgprot(__PAGE_KERNEL_IO_NOCACHE)
207 #define __P000 PAGE_NONE
208 #define __P001 PAGE_READONLY
209 #define __P010 PAGE_COPY
210 #define __P011 PAGE_COPY
211 #define __P100 PAGE_READONLY_EXEC
212 #define __P101 PAGE_READONLY_EXEC
213 #define __P110 PAGE_COPY_EXEC
214 #define __P111 PAGE_COPY_EXEC
216 #define __S000 PAGE_NONE
217 #define __S001 PAGE_READONLY
218 #define __S010 PAGE_SHARED
219 #define __S011 PAGE_SHARED
220 #define __S100 PAGE_READONLY_EXEC
221 #define __S101 PAGE_READONLY_EXEC
222 #define __S110 PAGE_SHARED_EXEC
223 #define __S111 PAGE_SHARED_EXEC
226 * early identity mapping pte attrib macros.
229 #define __PAGE_KERNEL_IDENT_LARGE_EXEC __PAGE_KERNEL_LARGE_EXEC
231 #define PTE_IDENT_ATTR 0x003 /* PRESENT+RW */
232 #define PDE_IDENT_ATTR 0x063 /* PRESENT+RW+DIRTY+ACCESSED */
233 #define PGD_IDENT_ATTR 0x001 /* PRESENT (no other attributes) */
237 # include <asm/pgtable_32_types.h>
239 # include <asm/pgtable_64_types.h>
244 #include <linux/types.h>
246 /* Extracts the PFN from a (pte|pmd|pud|pgd)val_t of a 4KB page */
247 #define PTE_PFN_MASK ((pteval_t)PHYSICAL_PAGE_MASK)
250 * Extracts the flags from a (pte|pmd|pud|pgd)val_t
251 * This includes the protection key value.
253 #define PTE_FLAGS_MASK (~PTE_PFN_MASK)
255 typedef struct pgprot
{ pgprotval_t pgprot
; } pgprot_t
;
257 typedef struct { pgdval_t pgd
; } pgd_t
;
259 static inline pgd_t
native_make_pgd(pgdval_t val
)
261 return (pgd_t
) { val
};
264 static inline pgdval_t
native_pgd_val(pgd_t pgd
)
269 static inline pgdval_t
pgd_flags(pgd_t pgd
)
271 return native_pgd_val(pgd
) & PTE_FLAGS_MASK
;
274 #if CONFIG_PGTABLE_LEVELS > 4
275 typedef struct { p4dval_t p4d
; } p4d_t
;
277 static inline p4d_t
native_make_p4d(pudval_t val
)
279 return (p4d_t
) { val
};
282 static inline p4dval_t
native_p4d_val(p4d_t p4d
)
287 #include <asm-generic/pgtable-nop4d.h>
289 static inline p4dval_t
native_p4d_val(p4d_t p4d
)
291 return native_pgd_val(p4d
.pgd
);
295 #if CONFIG_PGTABLE_LEVELS > 3
296 typedef struct { pudval_t pud
; } pud_t
;
298 static inline pud_t
native_make_pud(pmdval_t val
)
300 return (pud_t
) { val
};
303 static inline pudval_t
native_pud_val(pud_t pud
)
308 #include <asm-generic/pgtable-nopud.h>
310 static inline pudval_t
native_pud_val(pud_t pud
)
312 return native_pgd_val(pud
.p4d
.pgd
);
316 #if CONFIG_PGTABLE_LEVELS > 2
317 typedef struct { pmdval_t pmd
; } pmd_t
;
319 static inline pmd_t
native_make_pmd(pmdval_t val
)
321 return (pmd_t
) { val
};
324 static inline pmdval_t
native_pmd_val(pmd_t pmd
)
329 #include <asm-generic/pgtable-nopmd.h>
331 static inline pmdval_t
native_pmd_val(pmd_t pmd
)
333 return native_pgd_val(pmd
.pud
.p4d
.pgd
);
337 static inline p4dval_t
p4d_pfn_mask(p4d_t p4d
)
339 /* No 512 GiB huge pages yet */
343 static inline p4dval_t
p4d_flags_mask(p4d_t p4d
)
345 return ~p4d_pfn_mask(p4d
);
348 static inline p4dval_t
p4d_flags(p4d_t p4d
)
350 return native_p4d_val(p4d
) & p4d_flags_mask(p4d
);
353 static inline pudval_t
pud_pfn_mask(pud_t pud
)
355 if (native_pud_val(pud
) & _PAGE_PSE
)
356 return PHYSICAL_PUD_PAGE_MASK
;
361 static inline pudval_t
pud_flags_mask(pud_t pud
)
363 return ~pud_pfn_mask(pud
);
366 static inline pudval_t
pud_flags(pud_t pud
)
368 return native_pud_val(pud
) & pud_flags_mask(pud
);
371 static inline pmdval_t
pmd_pfn_mask(pmd_t pmd
)
373 if (native_pmd_val(pmd
) & _PAGE_PSE
)
374 return PHYSICAL_PMD_PAGE_MASK
;
379 static inline pmdval_t
pmd_flags_mask(pmd_t pmd
)
381 return ~pmd_pfn_mask(pmd
);
384 static inline pmdval_t
pmd_flags(pmd_t pmd
)
386 return native_pmd_val(pmd
) & pmd_flags_mask(pmd
);
389 static inline pte_t
native_make_pte(pteval_t val
)
391 return (pte_t
) { .pte
= val
};
394 static inline pteval_t
native_pte_val(pte_t pte
)
399 static inline pteval_t
pte_flags(pte_t pte
)
401 return native_pte_val(pte
) & PTE_FLAGS_MASK
;
404 #define pgprot_val(x) ((x).pgprot)
405 #define __pgprot(x) ((pgprot_t) { (x) } )
407 extern uint16_t __cachemode2pte_tbl
[_PAGE_CACHE_MODE_NUM
];
408 extern uint8_t __pte2cachemode_tbl
[8];
410 #define __pte2cm_idx(cb) \
411 ((((cb) >> (_PAGE_BIT_PAT - 2)) & 4) | \
412 (((cb) >> (_PAGE_BIT_PCD - 1)) & 2) | \
413 (((cb) >> _PAGE_BIT_PWT) & 1))
414 #define __cm_idx2pte(i) \
415 ((((i) & 4) << (_PAGE_BIT_PAT - 2)) | \
416 (((i) & 2) << (_PAGE_BIT_PCD - 1)) | \
417 (((i) & 1) << _PAGE_BIT_PWT))
419 static inline unsigned long cachemode2protval(enum page_cache_mode pcm
)
421 if (likely(pcm
== 0))
423 return __cachemode2pte_tbl
[pcm
];
425 static inline pgprot_t
cachemode2pgprot(enum page_cache_mode pcm
)
427 return __pgprot(cachemode2protval(pcm
));
429 static inline enum page_cache_mode
pgprot2cachemode(pgprot_t pgprot
)
431 unsigned long masked
;
433 masked
= pgprot_val(pgprot
) & _PAGE_CACHE_MASK
;
434 if (likely(masked
== 0))
436 return __pte2cachemode_tbl
[__pte2cm_idx(masked
)];
438 static inline pgprot_t
pgprot_4k_2_large(pgprot_t pgprot
)
440 pgprotval_t val
= pgprot_val(pgprot
);
443 pgprot_val(new) = (val
& ~(_PAGE_PAT
| _PAGE_PAT_LARGE
)) |
444 ((val
& _PAGE_PAT
) << (_PAGE_BIT_PAT_LARGE
- _PAGE_BIT_PAT
));
447 static inline pgprot_t
pgprot_large_2_4k(pgprot_t pgprot
)
449 pgprotval_t val
= pgprot_val(pgprot
);
452 pgprot_val(new) = (val
& ~(_PAGE_PAT
| _PAGE_PAT_LARGE
)) |
453 ((val
& _PAGE_PAT_LARGE
) >>
454 (_PAGE_BIT_PAT_LARGE
- _PAGE_BIT_PAT
));
459 typedef struct page
*pgtable_t
;
461 extern pteval_t __supported_pte_mask
;
462 extern void set_nx(void);
463 extern int nx_enabled
;
465 #define pgprot_writecombine pgprot_writecombine
466 extern pgprot_t
pgprot_writecombine(pgprot_t prot
);
468 #define pgprot_writethrough pgprot_writethrough
469 extern pgprot_t
pgprot_writethrough(pgprot_t prot
);
471 /* Indicate that x86 has its own track and untrack pfn vma functions */
472 #define __HAVE_PFNMAP_TRACKING
474 #define __HAVE_PHYS_MEM_ACCESS_PROT
476 pgprot_t
phys_mem_access_prot(struct file
*file
, unsigned long pfn
,
477 unsigned long size
, pgprot_t vma_prot
);
479 /* Install a pte for a particular vaddr in kernel space. */
480 void set_pte_vaddr(unsigned long vaddr
, pte_t pte
);
483 extern void native_pagetable_init(void);
485 #define native_pagetable_init paging_init
489 extern void arch_report_meminfo(struct seq_file
*m
);
500 #ifdef CONFIG_PROC_FS
501 extern void update_page_count(int level
, unsigned long pages
);
503 static inline void update_page_count(int level
, unsigned long pages
) { }
507 * Helper function that returns the kernel pagetable entry controlling
508 * the virtual address 'address'. NULL means no pagetable entry present.
509 * NOTE: the return type is pte_t but if the pmd is PSE then we return it
512 extern pte_t
*lookup_address(unsigned long address
, unsigned int *level
);
513 extern pte_t
*lookup_address_in_pgd(pgd_t
*pgd
, unsigned long address
,
514 unsigned int *level
);
515 extern pmd_t
*lookup_pmd_address(unsigned long address
);
516 extern phys_addr_t
slow_virt_to_phys(void *__address
);
517 extern int kernel_map_pages_in_pgd(pgd_t
*pgd
, u64 pfn
, unsigned long address
,
518 unsigned numpages
, unsigned long page_flags
);
519 #endif /* !__ASSEMBLY__ */
521 #endif /* _ASM_X86_PGTABLE_DEFS_H */