arch/x86/include/asm/processor-cyrix.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * NSC/Cyrix CPU indexed register access. Must be inlined instead of
   4  * macros to ensure correct access ordering
   5  * Access order is always 0x22 (=offset), 0x23 (=value)
   6  *
   7  * When using the old macros a line like
   8  *   setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
   9  * gets expanded to:
  10  *  do {
  11  *    outb((CX86_CCR2), 0x22);
  12  *    outb((({
  13  *        outb((CX86_CCR2), 0x22);
  14  *        inb(0x23);
  15  *    }) | 0x88), 0x23);
  16  *  } while (0);
  17  *
  18  * which in fact violates the access order (= 0x22, 0x22, 0x23, 0x23).
  19  */
  20
  21 static inline u8 getCx86(u8 reg)
  22 {
  23         outb(reg, 0x22);
  24         return inb(0x23);
  25 }
  26
  27 static inline void setCx86(u8 reg, u8 data)
  28 {
  29         outb(reg, 0x22);
  30         outb(data, 0x23);
  31 }
  32
  33 #define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); })
  34
  35 #define setCx86_old(reg, data) do { \
  36         outb((reg), 0x22); \
  37         outb((data), 0x23); \
  38 } while (0)
  39