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1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PLATFORM_H
3 #define _ASM_X86_PLATFORM_H
4
5 #include <asm/bootparam.h>
6
7 struct mpc_bus;
8 struct mpc_cpu;
9 struct mpc_table;
10 struct cpuinfo_x86;
11
12 /**
13 * struct x86_init_mpparse - platform specific mpparse ops
14 * @mpc_record: platform specific mpc record accounting
15 * @setup_ioapic_ids: platform specific ioapic id override
16 * @mpc_apic_id: platform specific mpc apic id assignment
17 * @smp_read_mpc_oem: platform specific oem mpc table setup
18 * @mpc_oem_pci_bus: platform specific pci bus setup (default NULL)
19 * @mpc_oem_bus_info: platform specific mpc bus info
20 * @find_smp_config: find the smp configuration
21 * @get_smp_config: get the smp configuration
22 */
23 struct x86_init_mpparse {
24 void (*mpc_record)(unsigned int mode);
25 void (*setup_ioapic_ids)(void);
26 int (*mpc_apic_id)(struct mpc_cpu *m);
27 void (*smp_read_mpc_oem)(struct mpc_table *mpc);
28 void (*mpc_oem_pci_bus)(struct mpc_bus *m);
29 void (*mpc_oem_bus_info)(struct mpc_bus *m, char *name);
30 void (*find_smp_config)(void);
31 void (*get_smp_config)(unsigned int early);
32 };
33
34 /**
35 * struct x86_init_resources - platform specific resource related ops
36 * @probe_roms: probe BIOS roms
37 * @reserve_resources: reserve the standard resources for the
38 * platform
39 * @memory_setup: platform specific memory setup
40 *
41 */
42 struct x86_init_resources {
43 void (*probe_roms)(void);
44 void (*reserve_resources)(void);
45 char *(*memory_setup)(void);
46 };
47
48 /**
49 * struct x86_init_irqs - platform specific interrupt setup
50 * @pre_vector_init: init code to run before interrupt vectors
51 * are set up.
52 * @intr_init: interrupt init code
53 * @trap_init: platform specific trap setup
54 * @intr_mode_init: interrupt delivery mode setup
55 */
56 struct x86_init_irqs {
57 void (*pre_vector_init)(void);
58 void (*intr_init)(void);
59 void (*trap_init)(void);
60 void (*intr_mode_init)(void);
61 };
62
63 /**
64 * struct x86_init_oem - oem platform specific customizing functions
65 * @arch_setup: platform specific architecture setup
66 * @banner: print a platform specific banner
67 */
68 struct x86_init_oem {
69 void (*arch_setup)(void);
70 void (*banner)(void);
71 };
72
73 /**
74 * struct x86_init_paging - platform specific paging functions
75 * @pagetable_init: platform specific paging initialization call to setup
76 * the kernel pagetables and prepare accessors functions.
77 * Callback must call paging_init(). Called once after the
78 * direct mapping for phys memory is available.
79 */
80 struct x86_init_paging {
81 void (*pagetable_init)(void);
82 };
83
84 /**
85 * struct x86_init_timers - platform specific timer setup
86 * @setup_perpcu_clockev: set up the per cpu clock event device for the
87 * boot cpu
88 * @timer_init: initialize the platform timer (default PIT/HPET)
89 * @wallclock_init: init the wallclock device
90 */
91 struct x86_init_timers {
92 void (*setup_percpu_clockev)(void);
93 void (*timer_init)(void);
94 void (*wallclock_init)(void);
95 };
96
97 /**
98 * struct x86_init_iommu - platform specific iommu setup
99 * @iommu_init: platform specific iommu setup
100 */
101 struct x86_init_iommu {
102 int (*iommu_init)(void);
103 };
104
105 /**
106 * struct x86_init_pci - platform specific pci init functions
107 * @arch_init: platform specific pci arch init call
108 * @init: platform specific pci subsystem init
109 * @init_irq: platform specific pci irq init
110 * @fixup_irqs: platform specific pci irq fixup
111 */
112 struct x86_init_pci {
113 int (*arch_init)(void);
114 int (*init)(void);
115 void (*init_irq)(void);
116 void (*fixup_irqs)(void);
117 };
118
119 /**
120 * struct x86_hyper_init - x86 hypervisor init functions
121 * @init_platform: platform setup
122 * @guest_late_init: guest late init
123 * @x2apic_available: X2APIC detection
124 * @init_mem_mapping: setup early mappings during init_mem_mapping()
125 */
126 struct x86_hyper_init {
127 void (*init_platform)(void);
128 void (*guest_late_init)(void);
129 bool (*x2apic_available)(void);
130 void (*init_mem_mapping)(void);
131 };
132
133 /**
134 * struct x86_init_ops - functions for platform specific setup
135 *
136 */
137 struct x86_init_ops {
138 struct x86_init_resources resources;
139 struct x86_init_mpparse mpparse;
140 struct x86_init_irqs irqs;
141 struct x86_init_oem oem;
142 struct x86_init_paging paging;
143 struct x86_init_timers timers;
144 struct x86_init_iommu iommu;
145 struct x86_init_pci pci;
146 struct x86_hyper_init hyper;
147 };
148
149 /**
150 * struct x86_cpuinit_ops - platform specific cpu hotplug setups
151 * @setup_percpu_clockev: set up the per cpu clock event device
152 * @early_percpu_clock_init: early init of the per cpu clock event device
153 */
154 struct x86_cpuinit_ops {
155 void (*setup_percpu_clockev)(void);
156 void (*early_percpu_clock_init)(void);
157 void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node);
158 };
159
160 struct timespec;
161
162 /**
163 * struct x86_legacy_devices - legacy x86 devices
164 *
165 * @pnpbios: this platform can have a PNPBIOS. If this is disabled the platform
166 * is known to never have a PNPBIOS.
167 *
168 * These are devices known to require LPC or ISA bus. The definition of legacy
169 * devices adheres to the ACPI 5.2.9.3 IA-PC Boot Architecture flag
170 * ACPI_FADT_LEGACY_DEVICES. These devices consist of user visible devices on
171 * the LPC or ISA bus. User visible devices are devices that have end-user
172 * accessible connectors (for example, LPT parallel port). Legacy devices on
173 * the LPC bus consist for example of serial and parallel ports, PS/2 keyboard
174 * / mouse, and the floppy disk controller. A system that lacks all known
175 * legacy devices can assume all devices can be detected exclusively via
176 * standard device enumeration mechanisms including the ACPI namespace.
177 *
178 * A system which has does not have ACPI_FADT_LEGACY_DEVICES enabled must not
179 * have any of the legacy devices enumerated below present.
180 */
181 struct x86_legacy_devices {
182 int pnpbios;
183 };
184
185 /**
186 * enum x86_legacy_i8042_state - i8042 keyboard controller state
187 * @X86_LEGACY_I8042_PLATFORM_ABSENT: the controller is always absent on
188 * given platform/subarch.
189 * @X86_LEGACY_I8042_FIRMWARE_ABSENT: firmware reports that the controller
190 * is absent.
191 * @X86_LEGACY_i8042_EXPECTED_PRESENT: the controller is likely to be
192 * present, the i8042 driver should probe for controller existence.
193 */
194 enum x86_legacy_i8042_state {
195 X86_LEGACY_I8042_PLATFORM_ABSENT,
196 X86_LEGACY_I8042_FIRMWARE_ABSENT,
197 X86_LEGACY_I8042_EXPECTED_PRESENT,
198 };
199
200 /**
201 * struct x86_legacy_features - legacy x86 features
202 *
203 * @i8042: indicated if we expect the device to have i8042 controller
204 * present.
205 * @rtc: this device has a CMOS real-time clock present
206 * @reserve_bios_regions: boot code will search for the EBDA address and the
207 * start of the 640k - 1M BIOS region. If false, the platform must
208 * ensure that its memory map correctly reserves sub-1MB regions as needed.
209 * @devices: legacy x86 devices, refer to struct x86_legacy_devices
210 * documentation for further details.
211 */
212 struct x86_legacy_features {
213 enum x86_legacy_i8042_state i8042;
214 int rtc;
215 int no_vga;
216 int reserve_bios_regions;
217 struct x86_legacy_devices devices;
218 };
219
220 /**
221 * struct x86_hyper_runtime - x86 hypervisor specific runtime callbacks
222 *
223 * @pin_vcpu: pin current vcpu to specified physical cpu (run rarely)
224 */
225 struct x86_hyper_runtime {
226 void (*pin_vcpu)(int cpu);
227 };
228
229 /**
230 * struct x86_platform_ops - platform specific runtime functions
231 * @calibrate_cpu: calibrate CPU
232 * @calibrate_tsc: calibrate TSC, if different from CPU
233 * @get_wallclock: get time from HW clock like RTC etc.
234 * @set_wallclock: set time back to HW clock
235 * @is_untracked_pat_range exclude from PAT logic
236 * @nmi_init enable NMI on cpus
237 * @save_sched_clock_state: save state for sched_clock() on suspend
238 * @restore_sched_clock_state: restore state for sched_clock() on resume
239 * @apic_post_init: adjust apic if needed
240 * @legacy: legacy features
241 * @set_legacy_features: override legacy features. Use of this callback
242 * is highly discouraged. You should only need
243 * this if your hardware platform requires further
244 * custom fine tuning far beyond what may be
245 * possible in x86_early_init_platform_quirks() by
246 * only using the current x86_hardware_subarch
247 * semantics.
248 * @hyper: x86 hypervisor specific runtime callbacks
249 */
250 struct x86_platform_ops {
251 unsigned long (*calibrate_cpu)(void);
252 unsigned long (*calibrate_tsc)(void);
253 void (*get_wallclock)(struct timespec *ts);
254 int (*set_wallclock)(const struct timespec *ts);
255 void (*iommu_shutdown)(void);
256 bool (*is_untracked_pat_range)(u64 start, u64 end);
257 void (*nmi_init)(void);
258 unsigned char (*get_nmi_reason)(void);
259 void (*save_sched_clock_state)(void);
260 void (*restore_sched_clock_state)(void);
261 void (*apic_post_init)(void);
262 struct x86_legacy_features legacy;
263 void (*set_legacy_features)(void);
264 struct x86_hyper_runtime hyper;
265 };
266
267 struct pci_dev;
268
269 struct x86_msi_ops {
270 int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
271 void (*teardown_msi_irq)(unsigned int irq);
272 void (*teardown_msi_irqs)(struct pci_dev *dev);
273 void (*restore_msi_irqs)(struct pci_dev *dev);
274 };
275
276 struct x86_io_apic_ops {
277 unsigned int (*read) (unsigned int apic, unsigned int reg);
278 void (*disable)(void);
279 };
280
281 extern struct x86_init_ops x86_init;
282 extern struct x86_cpuinit_ops x86_cpuinit;
283 extern struct x86_platform_ops x86_platform;
284 extern struct x86_msi_ops x86_msi;
285 extern struct x86_io_apic_ops x86_io_apic_ops;
286
287 extern void x86_early_init_platform_quirks(void);
288 extern void x86_init_noop(void);
289 extern void x86_init_uint_noop(unsigned int unused);
290
291 #endif