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Merge tag 'gvt-fixes-2017-08-23' of https://github.com/01org/gvt-linux into drm-intel...
[mirror_ubuntu-artful-kernel.git] / arch / x86 / kernel / apic / apic_flat_64.c
1 /*
2 * Copyright 2004 James Cleverdon, IBM.
3 * Subject to the GNU Public License, v.2
4 *
5 * Flat APIC subarch code.
6 *
7 * Hacked for x86-64 by James Cleverdon from i386 architecture code by
8 * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
9 * James Cleverdon.
10 */
11 #include <linux/errno.h>
12 #include <linux/threads.h>
13 #include <linux/cpumask.h>
14 #include <linux/string.h>
15 #include <linux/kernel.h>
16 #include <linux/ctype.h>
17 #include <linux/hardirq.h>
18 #include <linux/export.h>
19 #include <asm/smp.h>
20 #include <asm/apic.h>
21 #include <asm/ipi.h>
22
23 #include <linux/acpi.h>
24
25 static struct apic apic_physflat;
26 static struct apic apic_flat;
27
28 struct apic *apic __ro_after_init = &apic_flat;
29 EXPORT_SYMBOL_GPL(apic);
30
31 static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
32 {
33 return 1;
34 }
35
36 /*
37 * Set up the logical destination ID.
38 *
39 * Intel recommends to set DFR, LDR and TPR before enabling
40 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
41 * document number 292116). So here it goes...
42 */
43 void flat_init_apic_ldr(void)
44 {
45 unsigned long val;
46 unsigned long num, id;
47
48 num = smp_processor_id();
49 id = 1UL << num;
50 apic_write(APIC_DFR, APIC_DFR_FLAT);
51 val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
52 val |= SET_APIC_LOGICAL_ID(id);
53 apic_write(APIC_LDR, val);
54 }
55
56 static void _flat_send_IPI_mask(unsigned long mask, int vector)
57 {
58 unsigned long flags;
59
60 local_irq_save(flags);
61 __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
62 local_irq_restore(flags);
63 }
64
65 static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector)
66 {
67 unsigned long mask = cpumask_bits(cpumask)[0];
68
69 _flat_send_IPI_mask(mask, vector);
70 }
71
72 static void
73 flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector)
74 {
75 unsigned long mask = cpumask_bits(cpumask)[0];
76 int cpu = smp_processor_id();
77
78 if (cpu < BITS_PER_LONG)
79 clear_bit(cpu, &mask);
80
81 _flat_send_IPI_mask(mask, vector);
82 }
83
84 static void flat_send_IPI_allbutself(int vector)
85 {
86 int cpu = smp_processor_id();
87 #ifdef CONFIG_HOTPLUG_CPU
88 int hotplug = 1;
89 #else
90 int hotplug = 0;
91 #endif
92 if (hotplug || vector == NMI_VECTOR) {
93 if (!cpumask_equal(cpu_online_mask, cpumask_of(cpu))) {
94 unsigned long mask = cpumask_bits(cpu_online_mask)[0];
95
96 if (cpu < BITS_PER_LONG)
97 clear_bit(cpu, &mask);
98
99 _flat_send_IPI_mask(mask, vector);
100 }
101 } else if (num_online_cpus() > 1) {
102 __default_send_IPI_shortcut(APIC_DEST_ALLBUT,
103 vector, apic->dest_logical);
104 }
105 }
106
107 static void flat_send_IPI_all(int vector)
108 {
109 if (vector == NMI_VECTOR) {
110 flat_send_IPI_mask(cpu_online_mask, vector);
111 } else {
112 __default_send_IPI_shortcut(APIC_DEST_ALLINC,
113 vector, apic->dest_logical);
114 }
115 }
116
117 static unsigned int flat_get_apic_id(unsigned long x)
118 {
119 return (x >> 24) & 0xFF;
120 }
121
122 static unsigned long set_apic_id(unsigned int id)
123 {
124 return (id & 0xFF) << 24;
125 }
126
127 static unsigned int read_xapic_id(void)
128 {
129 return flat_get_apic_id(apic_read(APIC_ID));
130 }
131
132 static int flat_apic_id_registered(void)
133 {
134 return physid_isset(read_xapic_id(), phys_cpu_present_map);
135 }
136
137 static int flat_phys_pkg_id(int initial_apic_id, int index_msb)
138 {
139 return initial_apic_id >> index_msb;
140 }
141
142 static int flat_probe(void)
143 {
144 return 1;
145 }
146
147 static struct apic apic_flat __ro_after_init = {
148 .name = "flat",
149 .probe = flat_probe,
150 .acpi_madt_oem_check = flat_acpi_madt_oem_check,
151 .apic_id_valid = default_apic_id_valid,
152 .apic_id_registered = flat_apic_id_registered,
153
154 .irq_delivery_mode = dest_LowestPrio,
155 .irq_dest_mode = 1, /* logical */
156
157 .target_cpus = online_target_cpus,
158 .disable_esr = 0,
159 .dest_logical = APIC_DEST_LOGICAL,
160 .check_apicid_used = NULL,
161
162 .vector_allocation_domain = flat_vector_allocation_domain,
163 .init_apic_ldr = flat_init_apic_ldr,
164
165 .ioapic_phys_id_map = NULL,
166 .setup_apic_routing = NULL,
167 .cpu_present_to_apicid = default_cpu_present_to_apicid,
168 .apicid_to_cpu_present = NULL,
169 .check_phys_apicid_present = default_check_phys_apicid_present,
170 .phys_pkg_id = flat_phys_pkg_id,
171
172 .get_apic_id = flat_get_apic_id,
173 .set_apic_id = set_apic_id,
174
175 .cpu_mask_to_apicid = flat_cpu_mask_to_apicid,
176
177 .send_IPI = default_send_IPI_single,
178 .send_IPI_mask = flat_send_IPI_mask,
179 .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself,
180 .send_IPI_allbutself = flat_send_IPI_allbutself,
181 .send_IPI_all = flat_send_IPI_all,
182 .send_IPI_self = apic_send_IPI_self,
183
184 .inquire_remote_apic = default_inquire_remote_apic,
185
186 .read = native_apic_mem_read,
187 .write = native_apic_mem_write,
188 .eoi_write = native_apic_mem_write,
189 .icr_read = native_apic_icr_read,
190 .icr_write = native_apic_icr_write,
191 .wait_icr_idle = native_apic_wait_icr_idle,
192 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
193 };
194
195 /*
196 * Physflat mode is used when there are more than 8 CPUs on a system.
197 * We cannot use logical delivery in this case because the mask
198 * overflows, so use physical mode.
199 */
200 static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
201 {
202 #ifdef CONFIG_ACPI
203 /*
204 * Quirk: some x86_64 machines can only use physical APIC mode
205 * regardless of how many processors are present (x86_64 ES7000
206 * is an example).
207 */
208 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
209 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
210 printk(KERN_DEBUG "system APIC only can use physical flat");
211 return 1;
212 }
213
214 if (!strncmp(oem_id, "IBM", 3) && !strncmp(oem_table_id, "EXA", 3)) {
215 printk(KERN_DEBUG "IBM Summit detected, will use apic physical");
216 return 1;
217 }
218 #endif
219
220 return 0;
221 }
222
223 static void physflat_send_IPI_allbutself(int vector)
224 {
225 default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
226 }
227
228 static void physflat_send_IPI_all(int vector)
229 {
230 default_send_IPI_mask_sequence_phys(cpu_online_mask, vector);
231 }
232
233 static int physflat_probe(void)
234 {
235 if (apic == &apic_physflat || num_possible_cpus() > 8)
236 return 1;
237
238 return 0;
239 }
240
241 static struct apic apic_physflat __ro_after_init = {
242
243 .name = "physical flat",
244 .probe = physflat_probe,
245 .acpi_madt_oem_check = physflat_acpi_madt_oem_check,
246 .apic_id_valid = default_apic_id_valid,
247 .apic_id_registered = flat_apic_id_registered,
248
249 .irq_delivery_mode = dest_Fixed,
250 .irq_dest_mode = 0, /* physical */
251
252 .target_cpus = online_target_cpus,
253 .disable_esr = 0,
254 .dest_logical = 0,
255 .check_apicid_used = NULL,
256
257 .vector_allocation_domain = default_vector_allocation_domain,
258 /* not needed, but shouldn't hurt: */
259 .init_apic_ldr = flat_init_apic_ldr,
260
261 .ioapic_phys_id_map = NULL,
262 .setup_apic_routing = NULL,
263 .cpu_present_to_apicid = default_cpu_present_to_apicid,
264 .apicid_to_cpu_present = NULL,
265 .check_phys_apicid_present = default_check_phys_apicid_present,
266 .phys_pkg_id = flat_phys_pkg_id,
267
268 .get_apic_id = flat_get_apic_id,
269 .set_apic_id = set_apic_id,
270
271 .cpu_mask_to_apicid = default_cpu_mask_to_apicid,
272
273 .send_IPI = default_send_IPI_single_phys,
274 .send_IPI_mask = default_send_IPI_mask_sequence_phys,
275 .send_IPI_mask_allbutself = default_send_IPI_mask_allbutself_phys,
276 .send_IPI_allbutself = physflat_send_IPI_allbutself,
277 .send_IPI_all = physflat_send_IPI_all,
278 .send_IPI_self = apic_send_IPI_self,
279
280 .inquire_remote_apic = default_inquire_remote_apic,
281
282 .read = native_apic_mem_read,
283 .write = native_apic_mem_write,
284 .eoi_write = native_apic_mem_write,
285 .icr_read = native_apic_icr_read,
286 .icr_write = native_apic_icr_write,
287 .wait_icr_idle = native_apic_wait_icr_idle,
288 .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
289 };
290
291 /*
292 * We need to check for physflat first, so this order is important.
293 */
294 apic_drivers(apic_physflat, apic_flat);