1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2008, 2009 Intel Corporation.
8 #include <linux/kernel.h>
9 #include <linux/seq_file.h>
10 #include <linux/init.h>
11 #include <linux/debugfs.h>
13 #include <linux/uaccess.h>
18 * Grade an mce by severity. In general the most severe ones are processed
19 * first. Since there are quite a lot of combinations test the bits in a
20 * table-driven way. The rules are simply processed in order, first
23 * Note this is only used for machine check exceptions, the corrected
24 * errors use much simpler rules. The exceptions still check for the corrected
25 * errors, but only to leave them alone for the CMCI handler (except for
29 enum context
{ IN_KERNEL
= 1, IN_USER
= 2, IN_KERNEL_RECOV
= 3 };
30 enum ser
{ SER_REQUIRED
= 1, NO_SER
= 2 };
31 enum exception
{ EXCP_CONTEXT
= 1, NO_EXCP
= 2 };
33 static struct severity
{
37 unsigned char mcgmask
;
40 unsigned char context
;
42 unsigned char covered
;
45 #define MCESEV(s, m, c...) { .sev = MCE_ ## s ## _SEVERITY, .msg = m, ## c }
46 #define KERNEL .context = IN_KERNEL
47 #define USER .context = IN_USER
48 #define KERNEL_RECOV .context = IN_KERNEL_RECOV
49 #define SER .ser = SER_REQUIRED
50 #define NOSER .ser = NO_SER
51 #define EXCP .excp = EXCP_CONTEXT
52 #define NOEXCP .excp = NO_EXCP
53 #define BITCLR(x) .mask = x, .result = 0
54 #define BITSET(x) .mask = x, .result = x
55 #define MCGMASK(x, y) .mcgmask = x, .mcgres = y
56 #define MASK(x, y) .mask = x, .result = y
57 #define MCI_UC_S (MCI_STATUS_UC|MCI_STATUS_S)
58 #define MCI_UC_AR (MCI_STATUS_UC|MCI_STATUS_AR)
59 #define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR)
60 #define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV)
64 BITCLR(MCI_STATUS_VAL
)
68 EXCP
, BITCLR(MCI_STATUS_EN
)
71 PANIC
, "Processor context corrupt",
72 BITSET(MCI_STATUS_PCC
)
74 /* When MCIP is not set something is very confused */
76 PANIC
, "MCIP not set in MCA handler",
77 EXCP
, MCGMASK(MCG_STATUS_MCIP
, 0)
79 /* Neither return not error IP -- no chance to recover -> PANIC */
81 PANIC
, "Neither restart nor error IP",
82 EXCP
, MCGMASK(MCG_STATUS_RIPV
|MCG_STATUS_EIPV
, 0)
85 PANIC
, "In kernel and no restart IP",
86 EXCP
, KERNEL
, MCGMASK(MCG_STATUS_RIPV
, 0)
89 PANIC
, "In kernel and no restart IP",
90 EXCP
, KERNEL_RECOV
, MCGMASK(MCG_STATUS_RIPV
, 0)
93 DEFERRED
, "Deferred error",
94 NOSER
, MASK(MCI_STATUS_UC
|MCI_STATUS_DEFERRED
|MCI_STATUS_POISON
, MCI_STATUS_DEFERRED
)
97 KEEP
, "Corrected error",
98 NOSER
, BITCLR(MCI_STATUS_UC
)
102 * known AO MCACODs reported via MCE or CMC:
104 * SRAO could be signaled either via a machine check exception or
105 * CMCI with the corresponding bit S 1 or 0. So we don't need to
106 * check bit S for SRAO.
109 AO
, "Action optional: memory scrubbing error",
110 SER
, MASK(MCI_STATUS_OVER
|MCI_UC_AR
|MCACOD_SCRUBMSK
, MCI_STATUS_UC
|MCACOD_SCRUB
)
113 AO
, "Action optional: last level cache writeback error",
114 SER
, MASK(MCI_STATUS_OVER
|MCI_UC_AR
|MCACOD
, MCI_STATUS_UC
|MCACOD_L3WB
)
117 /* ignore OVER for UCNA */
119 UCNA
, "Uncorrected no action required",
120 SER
, MASK(MCI_UC_SAR
, MCI_STATUS_UC
)
123 PANIC
, "Illegal combination (UCNA with AR=1)",
125 MASK(MCI_STATUS_OVER
|MCI_UC_SAR
, MCI_STATUS_UC
|MCI_STATUS_AR
)
128 KEEP
, "Non signalled machine check",
129 SER
, BITCLR(MCI_STATUS_S
)
133 PANIC
, "Action required with lost events",
134 SER
, BITSET(MCI_STATUS_OVER
|MCI_UC_SAR
)
137 /* known AR MCACODs: */
138 #ifdef CONFIG_MEMORY_FAILURE
140 KEEP
, "Action required but unaffected thread is continuable",
141 SER
, MASK(MCI_STATUS_OVER
|MCI_UC_SAR
|MCI_ADDR
, MCI_UC_SAR
|MCI_ADDR
),
142 MCGMASK(MCG_STATUS_RIPV
|MCG_STATUS_EIPV
, MCG_STATUS_RIPV
)
145 AR
, "Action required: data load in error recoverable area of kernel",
146 SER
, MASK(MCI_STATUS_OVER
|MCI_UC_SAR
|MCI_ADDR
|MCACOD
, MCI_UC_SAR
|MCI_ADDR
|MCACOD_DATA
),
150 AR
, "Action required: data load error in a user process",
151 SER
, MASK(MCI_STATUS_OVER
|MCI_UC_SAR
|MCI_ADDR
|MCACOD
, MCI_UC_SAR
|MCI_ADDR
|MCACOD_DATA
),
155 AR
, "Action required: instruction fetch error in a user process",
156 SER
, MASK(MCI_STATUS_OVER
|MCI_UC_SAR
|MCI_ADDR
|MCACOD
, MCI_UC_SAR
|MCI_ADDR
|MCACOD_INSTR
),
160 PANIC
, "Data load in unrecoverable area of kernel",
161 SER
, MASK(MCI_STATUS_OVER
|MCI_UC_SAR
|MCI_ADDR
|MCACOD
, MCI_UC_SAR
|MCI_ADDR
|MCACOD_DATA
),
165 PANIC
, "Instruction fetch error in kernel",
166 SER
, MASK(MCI_STATUS_OVER
|MCI_UC_SAR
|MCI_ADDR
|MCACOD
, MCI_UC_SAR
|MCI_ADDR
|MCACOD_INSTR
),
171 PANIC
, "Action required: unknown MCACOD",
172 SER
, MASK(MCI_STATUS_OVER
|MCI_UC_SAR
, MCI_UC_SAR
)
176 SOME
, "Action optional: unknown MCACOD",
177 SER
, MASK(MCI_STATUS_OVER
|MCI_UC_SAR
, MCI_UC_S
)
180 SOME
, "Action optional with lost events",
181 SER
, MASK(MCI_STATUS_OVER
|MCI_UC_SAR
, MCI_STATUS_OVER
|MCI_UC_S
)
185 PANIC
, "Overflowed uncorrected",
186 BITSET(MCI_STATUS_OVER
|MCI_STATUS_UC
)
190 BITSET(MCI_STATUS_UC
)
195 ) /* always matches. keep at end */
198 #define mc_recoverable(mcg) (((mcg) & (MCG_STATUS_RIPV|MCG_STATUS_EIPV)) == \
199 (MCG_STATUS_RIPV|MCG_STATUS_EIPV))
202 * If mcgstatus indicated that ip/cs on the stack were
203 * no good, then "m->cs" will be zero and we will have
204 * to assume the worst case (IN_KERNEL) as we actually
205 * have no idea what we were executing when the machine
207 * If we do have a good "m->cs" (or a faked one in the
208 * case we were executing in VM86 mode) we can use it to
209 * distinguish an exception taken in user from from one
210 * taken in the kernel.
212 static int error_context(struct mce
*m
)
214 if ((m
->cs
& 3) == 3)
216 if (mc_recoverable(m
->mcgstatus
) && ex_has_fault_handler(m
->ip
))
217 return IN_KERNEL_RECOV
;
221 static int mce_severity_amd_smca(struct mce
*m
, enum context err_ctx
)
223 u32 addr
= MSR_AMD64_SMCA_MCx_CONFIG(m
->bank
);
227 * We need to look at the following bits:
228 * - "succor" bit (data poisoning support), and
229 * - TCC bit (Task Context Corrupt)
230 * in MCi_STATUS to determine error severity.
232 if (!mce_flags
.succor
)
233 return MCE_PANIC_SEVERITY
;
235 if (rdmsr_safe(addr
, &low
, &high
))
236 return MCE_PANIC_SEVERITY
;
238 /* TCC (Task context corrupt). If set and if IN_KERNEL, panic. */
239 if ((low
& MCI_CONFIG_MCAX
) &&
240 (m
->status
& MCI_STATUS_TCC
) &&
241 (err_ctx
== IN_KERNEL
))
242 return MCE_PANIC_SEVERITY
;
244 /* ...otherwise invoke hwpoison handler. */
245 return MCE_AR_SEVERITY
;
249 * See AMD Error Scope Hierarchy table in a newer BKDG. For example
250 * 49125_15h_Models_30h-3Fh_BKDG.pdf, section "RAS Features"
252 static int mce_severity_amd(struct mce
*m
, int tolerant
, char **msg
, bool is_excp
)
254 enum context ctx
= error_context(m
);
256 /* Processor Context Corrupt, no need to fumble too much, die! */
257 if (m
->status
& MCI_STATUS_PCC
)
258 return MCE_PANIC_SEVERITY
;
260 if (m
->status
& MCI_STATUS_UC
) {
262 if (ctx
== IN_KERNEL
)
263 return MCE_PANIC_SEVERITY
;
266 * On older systems where overflow_recov flag is not present, we
267 * should simply panic if an error overflow occurs. If
268 * overflow_recov flag is present and set, then software can try
269 * to at least kill process to prolong system operation.
271 if (mce_flags
.overflow_recov
) {
273 return mce_severity_amd_smca(m
, ctx
);
275 /* kill current process */
276 return MCE_AR_SEVERITY
;
278 /* at least one error was not logged */
279 if (m
->status
& MCI_STATUS_OVER
)
280 return MCE_PANIC_SEVERITY
;
284 * For any other case, return MCE_UC_SEVERITY so that we log the
285 * error and exit #MC handler.
287 return MCE_UC_SEVERITY
;
291 * deferred error: poll handler catches these and adds to mce_ring so
292 * memory-failure can take recovery actions.
294 if (m
->status
& MCI_STATUS_DEFERRED
)
295 return MCE_DEFERRED_SEVERITY
;
298 * corrected error: poll handler catches these and passes responsibility
299 * of decoding the error to EDAC
301 return MCE_KEEP_SEVERITY
;
304 static int mce_severity_intel(struct mce
*m
, int tolerant
, char **msg
, bool is_excp
)
306 enum exception excp
= (is_excp
? EXCP_CONTEXT
: NO_EXCP
);
307 enum context ctx
= error_context(m
);
310 for (s
= severities
;; s
++) {
311 if ((m
->status
& s
->mask
) != s
->result
)
313 if ((m
->mcgstatus
& s
->mcgmask
) != s
->mcgres
)
315 if (s
->ser
== SER_REQUIRED
&& !mca_cfg
.ser
)
317 if (s
->ser
== NO_SER
&& mca_cfg
.ser
)
319 if (s
->context
&& ctx
!= s
->context
)
321 if (s
->excp
&& excp
!= s
->excp
)
326 if (s
->sev
>= MCE_UC_SEVERITY
&& ctx
== IN_KERNEL
) {
328 return MCE_PANIC_SEVERITY
;
334 /* Default to mce_severity_intel */
335 int (*mce_severity
)(struct mce
*m
, int tolerant
, char **msg
, bool is_excp
) =
338 void __init
mcheck_vendor_init_severity(void)
340 if (boot_cpu_data
.x86_vendor
== X86_VENDOR_AMD
||
341 boot_cpu_data
.x86_vendor
== X86_VENDOR_HYGON
)
342 mce_severity
= mce_severity_amd
;
345 #ifdef CONFIG_DEBUG_FS
346 static void *s_start(struct seq_file
*f
, loff_t
*pos
)
348 if (*pos
>= ARRAY_SIZE(severities
))
350 return &severities
[*pos
];
353 static void *s_next(struct seq_file
*f
, void *data
, loff_t
*pos
)
355 if (++(*pos
) >= ARRAY_SIZE(severities
))
357 return &severities
[*pos
];
360 static void s_stop(struct seq_file
*f
, void *data
)
364 static int s_show(struct seq_file
*f
, void *data
)
366 struct severity
*ser
= data
;
367 seq_printf(f
, "%d\t%s\n", ser
->covered
, ser
->msg
);
371 static const struct seq_operations severities_seq_ops
= {
378 static int severities_coverage_open(struct inode
*inode
, struct file
*file
)
380 return seq_open(file
, &severities_seq_ops
);
383 static ssize_t
severities_coverage_write(struct file
*file
,
384 const char __user
*ubuf
,
385 size_t count
, loff_t
*ppos
)
388 for (i
= 0; i
< ARRAY_SIZE(severities
); i
++)
389 severities
[i
].covered
= 0;
393 static const struct file_operations severities_coverage_fops
= {
394 .open
= severities_coverage_open
,
395 .release
= seq_release
,
397 .write
= severities_coverage_write
,
401 static int __init
severities_debugfs_init(void)
403 struct dentry
*dmce
, *fsev
;
405 dmce
= mce_get_debugfs_dir();
409 fsev
= debugfs_create_file("severities-coverage", 0444, dmce
, NULL
,
410 &severities_coverage_fops
);
419 late_initcall(severities_debugfs_init
);
420 #endif /* CONFIG_DEBUG_FS */