2 * (c) 2005, 2006 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html
7 * Written by Jacob Shin - AMD, Inc.
9 * Support : jacob.shin@amd.com
12 * - added support for AMD Family 0x10 processors
14 * All MC4_MISCi registers are shared between multi-cores
17 #include <linux/cpu.h>
18 #include <linux/errno.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/kobject.h>
22 #include <linux/notifier.h>
23 #include <linux/sched.h>
24 #include <linux/smp.h>
25 #include <linux/sysdev.h>
26 #include <linux/sysfs.h>
30 #include <asm/percpu.h>
33 #define PFX "mce_threshold: "
34 #define VERSION "version 1.1.1"
37 #define THRESHOLD_MAX 0xFFF
38 #define INT_TYPE_APIC 0x00020000
39 #define MASK_VALID_HI 0x80000000
40 #define MASK_CNTP_HI 0x40000000
41 #define MASK_LOCKED_HI 0x20000000
42 #define MASK_LVTOFF_HI 0x00F00000
43 #define MASK_COUNT_EN_HI 0x00080000
44 #define MASK_INT_TYPE_HI 0x00060000
45 #define MASK_OVERFLOW_HI 0x00010000
46 #define MASK_ERR_COUNT_HI 0x00000FFF
47 #define MASK_BLKPTR_LO 0xFF000000
48 #define MCG_XBLK_ADDR 0xC0000400
50 struct threshold_block
{
58 struct list_head miscj
;
61 /* defaults used early on boot */
62 static struct threshold_block threshold_defaults
= {
63 .interrupt_enable
= 0,
64 .threshold_limit
= THRESHOLD_MAX
,
67 struct threshold_bank
{
69 struct threshold_block
*blocks
;
72 static DEFINE_PER_CPU(struct threshold_bank
*, threshold_banks
[NR_BANKS
]);
75 static unsigned char shared_bank
[NR_BANKS
] = {
80 static DEFINE_PER_CPU(unsigned char, bank_map
); /* see which banks are on */
86 struct thresh_restart
{
87 struct threshold_block
*b
;
92 /* must be called with correct cpu affinity */
93 static long threshold_restart_bank(void *_tr
)
95 struct thresh_restart
*tr
= _tr
;
96 u32 mci_misc_hi
, mci_misc_lo
;
98 rdmsr(tr
->b
->address
, mci_misc_lo
, mci_misc_hi
);
100 if (tr
->b
->threshold_limit
< (mci_misc_hi
& THRESHOLD_MAX
))
101 tr
->reset
= 1; /* limit cannot be lower than err count */
103 if (tr
->reset
) { /* reset err count and overflow bit */
105 (mci_misc_hi
& ~(MASK_ERR_COUNT_HI
| MASK_OVERFLOW_HI
)) |
106 (THRESHOLD_MAX
- tr
->b
->threshold_limit
);
107 } else if (tr
->old_limit
) { /* change limit w/o reset */
108 int new_count
= (mci_misc_hi
& THRESHOLD_MAX
) +
109 (tr
->old_limit
- tr
->b
->threshold_limit
);
110 mci_misc_hi
= (mci_misc_hi
& ~MASK_ERR_COUNT_HI
) |
111 (new_count
& THRESHOLD_MAX
);
114 tr
->b
->interrupt_enable
?
115 (mci_misc_hi
= (mci_misc_hi
& ~MASK_INT_TYPE_HI
) | INT_TYPE_APIC
) :
116 (mci_misc_hi
&= ~MASK_INT_TYPE_HI
);
118 mci_misc_hi
|= MASK_COUNT_EN_HI
;
119 wrmsr(tr
->b
->address
, mci_misc_lo
, mci_misc_hi
);
123 /* cpu init entry point, called from mce.c with preempt off */
124 void __cpuinit
mce_amd_feature_init(struct cpuinfo_x86
*c
)
126 unsigned int bank
, block
;
127 unsigned int cpu
= smp_processor_id();
129 u32 low
= 0, high
= 0, address
= 0;
130 struct thresh_restart tr
;
132 for (bank
= 0; bank
< NR_BANKS
; ++bank
) {
133 for (block
= 0; block
< NR_BLOCKS
; ++block
) {
135 address
= MSR_IA32_MC0_MISC
+ bank
* 4;
136 else if (block
== 1) {
137 address
= (low
& MASK_BLKPTR_LO
) >> 21;
140 address
+= MCG_XBLK_ADDR
;
145 if (rdmsr_safe(address
, &low
, &high
))
148 if (!(high
& MASK_VALID_HI
)) {
155 if (!(high
& MASK_CNTP_HI
) ||
156 (high
& MASK_LOCKED_HI
))
160 per_cpu(bank_map
, cpu
) |= (1 << bank
);
162 if (shared_bank
[bank
] && c
->cpu_core_id
)
165 lvt_off
= setup_APIC_eilvt_mce(THRESHOLD_APIC_VECTOR
,
166 APIC_EILVT_MSG_FIX
, 0);
168 high
&= ~MASK_LVTOFF_HI
;
169 high
|= lvt_off
<< 20;
170 wrmsr(address
, low
, high
);
172 threshold_defaults
.address
= address
;
173 tr
.b
= &threshold_defaults
;
176 threshold_restart_bank(&tr
);
182 * APIC Interrupt Handler
186 * threshold interrupt handler will service THRESHOLD_APIC_VECTOR.
187 * the interrupt goes off when error_count reaches threshold_limit.
188 * the handler will simply log mcelog w/ software defined bank number.
190 asmlinkage
void mce_threshold_interrupt(void)
192 unsigned int bank
, block
;
194 u32 low
= 0, high
= 0, address
= 0;
200 memset(&m
, 0, sizeof(m
));
202 m
.cpu
= smp_processor_id();
204 /* assume first bank caused it */
205 for (bank
= 0; bank
< NR_BANKS
; ++bank
) {
206 if (!(per_cpu(bank_map
, m
.cpu
) & (1 << bank
)))
208 for (block
= 0; block
< NR_BLOCKS
; ++block
) {
210 address
= MSR_IA32_MC0_MISC
+ bank
* 4;
211 else if (block
== 1) {
212 address
= (low
& MASK_BLKPTR_LO
) >> 21;
215 address
+= MCG_XBLK_ADDR
;
220 if (rdmsr_safe(address
, &low
, &high
))
223 if (!(high
& MASK_VALID_HI
)) {
230 if (!(high
& MASK_CNTP_HI
) ||
231 (high
& MASK_LOCKED_HI
))
234 /* Log the machine check that caused the threshold
236 do_machine_check(NULL
, 0);
238 if (high
& MASK_OVERFLOW_HI
) {
239 rdmsrl(address
, m
.misc
);
240 rdmsrl(MSR_IA32_MC0_STATUS
+ bank
* 4,
242 m
.bank
= K8_MCE_THRESHOLD_BASE
251 inc_irq_stat(irq_threshold_count
);
259 struct threshold_attr
{
260 struct attribute attr
;
261 ssize_t(*show
) (struct threshold_block
*, char *);
262 ssize_t(*store
) (struct threshold_block
*, const char *, size_t count
);
265 #define SHOW_FIELDS(name) \
266 static ssize_t show_ ## name(struct threshold_block * b, char *buf) \
268 return sprintf(buf, "%lx\n", (unsigned long) b->name); \
270 SHOW_FIELDS(interrupt_enable
)
271 SHOW_FIELDS(threshold_limit
)
273 static ssize_t
store_interrupt_enable(struct threshold_block
*b
,
274 const char *buf
, size_t count
)
277 struct thresh_restart tr
;
278 unsigned long new = simple_strtoul(buf
, &end
, 0);
281 b
->interrupt_enable
= !!new;
286 work_on_cpu(b
->cpu
, threshold_restart_bank
, &tr
);
291 static ssize_t
store_threshold_limit(struct threshold_block
*b
,
292 const char *buf
, size_t count
)
295 struct thresh_restart tr
;
296 unsigned long new = simple_strtoul(buf
, &end
, 0);
299 if (new > THRESHOLD_MAX
)
303 tr
.old_limit
= b
->threshold_limit
;
304 b
->threshold_limit
= new;
308 work_on_cpu(b
->cpu
, threshold_restart_bank
, &tr
);
313 static long local_error_count(void *_b
)
315 struct threshold_block
*b
= _b
;
318 rdmsr(b
->address
, low
, high
);
319 return (high
& 0xFFF) - (THRESHOLD_MAX
- b
->threshold_limit
);
322 static ssize_t
show_error_count(struct threshold_block
*b
, char *buf
)
324 return sprintf(buf
, "%lx\n", work_on_cpu(b
->cpu
, local_error_count
, b
));
327 static ssize_t
store_error_count(struct threshold_block
*b
,
328 const char *buf
, size_t count
)
330 struct thresh_restart tr
= { .b
= b
, .reset
= 1, .old_limit
= 0 };
332 work_on_cpu(b
->cpu
, threshold_restart_bank
, &tr
);
336 #define THRESHOLD_ATTR(_name,_mode,_show,_store) { \
337 .attr = {.name = __stringify(_name), .mode = _mode }, \
342 #define RW_ATTR(name) \
343 static struct threshold_attr name = \
344 THRESHOLD_ATTR(name, 0644, show_## name, store_## name)
346 RW_ATTR(interrupt_enable
);
347 RW_ATTR(threshold_limit
);
348 RW_ATTR(error_count
);
350 static struct attribute
*default_attrs
[] = {
351 &interrupt_enable
.attr
,
352 &threshold_limit
.attr
,
357 #define to_block(k) container_of(k, struct threshold_block, kobj)
358 #define to_attr(a) container_of(a, struct threshold_attr, attr)
360 static ssize_t
show(struct kobject
*kobj
, struct attribute
*attr
, char *buf
)
362 struct threshold_block
*b
= to_block(kobj
);
363 struct threshold_attr
*a
= to_attr(attr
);
365 ret
= a
->show
? a
->show(b
, buf
) : -EIO
;
369 static ssize_t
store(struct kobject
*kobj
, struct attribute
*attr
,
370 const char *buf
, size_t count
)
372 struct threshold_block
*b
= to_block(kobj
);
373 struct threshold_attr
*a
= to_attr(attr
);
375 ret
= a
->store
? a
->store(b
, buf
, count
) : -EIO
;
379 static struct sysfs_ops threshold_ops
= {
384 static struct kobj_type threshold_ktype
= {
385 .sysfs_ops
= &threshold_ops
,
386 .default_attrs
= default_attrs
,
389 static __cpuinit
int allocate_threshold_blocks(unsigned int cpu
,
396 struct threshold_block
*b
= NULL
;
398 if ((bank
>= NR_BANKS
) || (block
>= NR_BLOCKS
))
401 if (rdmsr_safe(address
, &low
, &high
))
404 if (!(high
& MASK_VALID_HI
)) {
411 if (!(high
& MASK_CNTP_HI
) ||
412 (high
& MASK_LOCKED_HI
))
415 b
= kzalloc(sizeof(struct threshold_block
), GFP_KERNEL
);
422 b
->address
= address
;
423 b
->interrupt_enable
= 0;
424 b
->threshold_limit
= THRESHOLD_MAX
;
426 INIT_LIST_HEAD(&b
->miscj
);
428 if (per_cpu(threshold_banks
, cpu
)[bank
]->blocks
)
430 &per_cpu(threshold_banks
, cpu
)[bank
]->blocks
->miscj
);
432 per_cpu(threshold_banks
, cpu
)[bank
]->blocks
= b
;
434 err
= kobject_init_and_add(&b
->kobj
, &threshold_ktype
,
435 per_cpu(threshold_banks
, cpu
)[bank
]->kobj
,
441 address
= (low
& MASK_BLKPTR_LO
) >> 21;
444 address
+= MCG_XBLK_ADDR
;
448 err
= allocate_threshold_blocks(cpu
, bank
, ++block
, address
);
453 kobject_uevent(&b
->kobj
, KOBJ_ADD
);
459 kobject_put(&b
->kobj
);
465 static __cpuinit
long local_allocate_threshold_blocks(void *_bank
)
467 unsigned int *bank
= _bank
;
469 return allocate_threshold_blocks(smp_processor_id(), *bank
, 0,
470 MSR_IA32_MC0_MISC
+ *bank
* 4);
473 /* symlinks sibling shared banks to first core. first core owns dir/files. */
474 static __cpuinit
int threshold_create_bank(unsigned int cpu
, unsigned int bank
)
477 struct threshold_bank
*b
= NULL
;
480 sprintf(name
, "threshold_bank%i", bank
);
483 if (cpu_data(cpu
).cpu_core_id
&& shared_bank
[bank
]) { /* symlink */
484 i
= cpumask_first(&per_cpu(cpu_core_map
, cpu
));
486 /* first core not up yet */
487 if (cpu_data(i
).cpu_core_id
)
491 if (per_cpu(threshold_banks
, cpu
)[bank
])
494 b
= per_cpu(threshold_banks
, i
)[bank
];
499 err
= sysfs_create_link(&per_cpu(device_mce
, cpu
).kobj
,
504 cpumask_copy(b
->cpus
, &per_cpu(cpu_core_map
, cpu
));
505 per_cpu(threshold_banks
, cpu
)[bank
] = b
;
510 b
= kzalloc(sizeof(struct threshold_bank
), GFP_KERNEL
);
515 if (!alloc_cpumask_var(&b
->cpus
, GFP_KERNEL
)) {
521 b
->kobj
= kobject_create_and_add(name
, &per_cpu(device_mce
, cpu
).kobj
);
526 cpumask_setall(b
->cpus
);
528 cpumask_copy(b
->cpus
, &per_cpu(cpu_core_map
, cpu
));
531 per_cpu(threshold_banks
, cpu
)[bank
] = b
;
533 err
= work_on_cpu(cpu
, local_allocate_threshold_blocks
, &bank
);
537 for_each_cpu(i
, b
->cpus
) {
541 err
= sysfs_create_link(&per_cpu(device_mce
, i
).kobj
,
546 per_cpu(threshold_banks
, i
)[bank
] = b
;
552 per_cpu(threshold_banks
, cpu
)[bank
] = NULL
;
553 free_cpumask_var(b
->cpus
);
559 /* create dir/files for all valid threshold banks */
560 static __cpuinit
int threshold_create_device(unsigned int cpu
)
565 for (bank
= 0; bank
< NR_BANKS
; ++bank
) {
566 if (!(per_cpu(bank_map
, cpu
) & (1 << bank
)))
568 err
= threshold_create_bank(cpu
, bank
);
577 * let's be hotplug friendly.
578 * in case of multiple core processors, the first core always takes ownership
579 * of shared sysfs dir/files, and rest of the cores will be symlinked to it.
582 static void deallocate_threshold_block(unsigned int cpu
,
585 struct threshold_block
*pos
= NULL
;
586 struct threshold_block
*tmp
= NULL
;
587 struct threshold_bank
*head
= per_cpu(threshold_banks
, cpu
)[bank
];
592 list_for_each_entry_safe(pos
, tmp
, &head
->blocks
->miscj
, miscj
) {
593 kobject_put(&pos
->kobj
);
594 list_del(&pos
->miscj
);
598 kfree(per_cpu(threshold_banks
, cpu
)[bank
]->blocks
);
599 per_cpu(threshold_banks
, cpu
)[bank
]->blocks
= NULL
;
602 static void threshold_remove_bank(unsigned int cpu
, int bank
)
605 struct threshold_bank
*b
;
608 b
= per_cpu(threshold_banks
, cpu
)[bank
];
616 sprintf(name
, "threshold_bank%i", bank
);
619 /* sibling symlink */
620 if (shared_bank
[bank
] && b
->blocks
->cpu
!= cpu
) {
621 sysfs_remove_link(&per_cpu(device_mce
, cpu
).kobj
, name
);
622 per_cpu(threshold_banks
, cpu
)[bank
] = NULL
;
627 /* remove all sibling symlinks before unregistering */
628 for_each_cpu(i
, b
->cpus
) {
632 sysfs_remove_link(&per_cpu(device_mce
, i
).kobj
, name
);
633 per_cpu(threshold_banks
, i
)[bank
] = NULL
;
636 deallocate_threshold_block(cpu
, bank
);
639 kobject_del(b
->kobj
);
640 kobject_put(b
->kobj
);
641 free_cpumask_var(b
->cpus
);
643 per_cpu(threshold_banks
, cpu
)[bank
] = NULL
;
646 static void threshold_remove_device(unsigned int cpu
)
650 for (bank
= 0; bank
< NR_BANKS
; ++bank
) {
651 if (!(per_cpu(bank_map
, cpu
) & (1 << bank
)))
653 threshold_remove_bank(cpu
, bank
);
657 /* get notified when a cpu comes on/off */
658 static void __cpuinit
amd_64_threshold_cpu_callback(unsigned long action
,
666 case CPU_ONLINE_FROZEN
:
667 threshold_create_device(cpu
);
670 case CPU_DEAD_FROZEN
:
671 threshold_remove_device(cpu
);
678 static __init
int threshold_init_device(void)
682 /* to hit CPUs online before the notifier is up */
683 for_each_online_cpu(lcpu
) {
684 int err
= threshold_create_device(lcpu
);
688 threshold_cpu_callback
= amd_64_threshold_cpu_callback
;
692 device_initcall(threshold_init_device
);