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1 /*
2 * X86 CPU microcode early update for Linux
3 *
4 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
5 * H Peter Anvin" <hpa@zytor.com>
6 *
7 * This driver allows to early upgrade microcode on Intel processors
8 * belonging to IA-32 family - PentiumPro, Pentium II,
9 * Pentium III, Xeon, Pentium 4, etc.
10 *
11 * Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture
12 * Software Developer's Manual.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version
17 * 2 of the License, or (at your option) any later version.
18 */
19 #include <linux/module.h>
20 #include <asm/microcode.h>
21 #include <asm/microcode_intel.h>
22 #include <asm/microcode_amd.h>
23 #include <asm/processor.h>
24 #include <asm/cmdline.h>
25
26 #define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
27 #define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
28 #define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
29 #define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
30 #define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
31 #define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
32 #define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
33
34 #define CPUID_IS(a, b, c, ebx, ecx, edx) \
35 (!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))
36
37 /*
38 * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
39 * x86_vendor() gets vendor id for BSP.
40 *
41 * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
42 * coding, we still use x86_vendor() to get vendor id for AP.
43 *
44 * x86_vendor() gets vendor information directly through cpuid.
45 */
46 static int x86_vendor(void)
47 {
48 u32 eax = 0x00000000;
49 u32 ebx, ecx = 0, edx;
50
51 native_cpuid(&eax, &ebx, &ecx, &edx);
52
53 if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
54 return X86_VENDOR_INTEL;
55
56 if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))
57 return X86_VENDOR_AMD;
58
59 return X86_VENDOR_UNKNOWN;
60 }
61
62 static int x86_family(void)
63 {
64 u32 eax = 0x00000001;
65 u32 ebx, ecx = 0, edx;
66 int x86;
67
68 native_cpuid(&eax, &ebx, &ecx, &edx);
69
70 x86 = (eax >> 8) & 0xf;
71 if (x86 == 15)
72 x86 += (eax >> 20) & 0xff;
73
74 return x86;
75 }
76
77 static bool __init check_loader_disabled_bsp(void)
78 {
79 #ifdef CONFIG_X86_32
80 const char *cmdline = (const char *)__pa_nodebug(boot_command_line);
81 const char *opt = "dis_ucode_ldr";
82 const char *option = (const char *)__pa_nodebug(opt);
83 bool *res = (bool *)__pa_nodebug(&dis_ucode_ldr);
84
85 #else /* CONFIG_X86_64 */
86 const char *cmdline = boot_command_line;
87 const char *option = "dis_ucode_ldr";
88 bool *res = &dis_ucode_ldr;
89 #endif
90
91 if (cmdline_find_option_bool(cmdline, option))
92 *res = true;
93
94 return *res;
95 }
96
97 void __init load_ucode_bsp(void)
98 {
99 int vendor, x86;
100
101 if (check_loader_disabled_bsp())
102 return;
103
104 if (!have_cpuid_p())
105 return;
106
107 vendor = x86_vendor();
108 x86 = x86_family();
109
110 switch (vendor) {
111 case X86_VENDOR_INTEL:
112 if (x86 >= 6)
113 load_ucode_intel_bsp();
114 break;
115 case X86_VENDOR_AMD:
116 if (x86 >= 0x10)
117 load_ucode_amd_bsp();
118 break;
119 default:
120 break;
121 }
122 }
123
124 static bool check_loader_disabled_ap(void)
125 {
126 #ifdef CONFIG_X86_32
127 return *((bool *)__pa_nodebug(&dis_ucode_ldr));
128 #else
129 return dis_ucode_ldr;
130 #endif
131 }
132
133 void load_ucode_ap(void)
134 {
135 int vendor, x86;
136
137 if (check_loader_disabled_ap())
138 return;
139
140 if (!have_cpuid_p())
141 return;
142
143 vendor = x86_vendor();
144 x86 = x86_family();
145
146 switch (vendor) {
147 case X86_VENDOR_INTEL:
148 if (x86 >= 6)
149 load_ucode_intel_ap();
150 break;
151 case X86_VENDOR_AMD:
152 if (x86 >= 0x10)
153 load_ucode_amd_ap();
154 break;
155 default:
156 break;
157 }
158 }
159
160 int __init save_microcode_in_initrd(void)
161 {
162 struct cpuinfo_x86 *c = &boot_cpu_data;
163
164 switch (c->x86_vendor) {
165 case X86_VENDOR_INTEL:
166 if (c->x86 >= 6)
167 save_microcode_in_initrd_intel();
168 break;
169 case X86_VENDOR_AMD:
170 if (c->x86 >= 0x10)
171 save_microcode_in_initrd_amd();
172 break;
173 default:
174 break;
175 }
176
177 return 0;
178 }