arch/x86/kernel/devicetree.c

   1 /*
   2  * Architecture specific OF callbacks.
   3  */
   4 #include <linux/bootmem.h>
   5 #include <linux/io.h>
   6 #include <linux/interrupt.h>
   7 #include <linux/list.h>
   8 #include <linux/of.h>
   9 #include <linux/of_fdt.h>
  10 #include <linux/of_address.h>
  11 #include <linux/of_platform.h>
  12 #include <linux/of_irq.h>
  13 #include <linux/slab.h>
  14 #include <linux/pci.h>
  15 #include <linux/of_pci.h>
  16
  17 #include <asm/hpet.h>
  18 #include <asm/irq_controller.h>
  19 #include <asm/apic.h>
  20 #include <asm/pci_x86.h>
  21
  22 __initdata u64 initial_dtb;
  23 char __initdata cmd_line[COMMAND_LINE_SIZE];
  24 static LIST_HEAD(irq_domains);
  25 static DEFINE_RAW_SPINLOCK(big_irq_lock);
  26
  27 int __initdata of_ioapic;
  28
  29 #ifdef CONFIG_X86_IO_APIC
  30 static void add_interrupt_host(struct irq_domain *ih)
  31 {
  32         unsigned long flags;
  33
  34         raw_spin_lock_irqsave(&big_irq_lock, flags);
  35         list_add(&ih->l, &irq_domains);
  36         raw_spin_unlock_irqrestore(&big_irq_lock, flags);
  37 }
  38 #endif
  39
  40 static struct irq_domain *get_ih_from_node(struct device_node *controller)
  41 {
  42         struct irq_domain *ih, *found = NULL;
  43         unsigned long flags;
  44
  45         raw_spin_lock_irqsave(&big_irq_lock, flags);
  46         list_for_each_entry(ih, &irq_domains, l) {
  47                 if (ih->controller ==  controller) {
  48                         found = ih;
  49                         break;
  50                 }
  51         }
  52         raw_spin_unlock_irqrestore(&big_irq_lock, flags);
  53         return found;
  54 }
  55
  56 unsigned int irq_create_of_mapping(struct device_node *controller,
  57                                    const u32 *intspec, unsigned int intsize)
  58 {
  59         struct irq_domain *ih;
  60         u32 virq, type;
  61         int ret;
  62
  63         ih = get_ih_from_node(controller);
  64         if (!ih)
  65                 return 0;
  66         ret = ih->xlate(ih, intspec, intsize, &virq, &type);
  67         if (ret)
  68                 return ret;
  69         if (type == IRQ_TYPE_NONE)
  70                 return virq;
  71         /* set the mask if it is different from current */
  72         if (type == (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK))
  73                 set_irq_type(virq, type);
  74         return virq;
  75 }
  76 EXPORT_SYMBOL_GPL(irq_create_of_mapping);
  77
  78 unsigned long pci_address_to_pio(phys_addr_t address)
  79 {
  80         /*
  81          * The ioport address can be directly used by inX / outX
  82          */
  83         BUG_ON(address >= (1 << 16));
  84         return (unsigned long)address;
  85 }
  86 EXPORT_SYMBOL_GPL(pci_address_to_pio);
  87
  88 void __init early_init_dt_scan_chosen_arch(unsigned long node)
  89 {
  90         BUG();
  91 }
  92
  93 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
  94 {
  95         BUG();
  96 }
  97
  98 void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
  99 {
 100         return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
 101 }
 102
 103 void __init add_dtb(u64 data)
 104 {
 105         initial_dtb = data + offsetof(struct setup_data, data);
 106 }
 107
 108 /*
 109  * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
 110  */
 111 static struct of_device_id __initdata ce4100_ids[] = {
 112         { .compatible = "intel,ce4100-cp", },
 113         { .compatible = "isa", },
 114         { .compatible = "pci", },
 115         {},
 116 };
 117
 118 static int __init add_bus_probe(void)
 119 {
 120         if (!of_have_populated_dt())
 121                 return 0;
 122
 123         return of_platform_bus_probe(NULL, ce4100_ids, NULL);
 124 }
 125 module_init(add_bus_probe);
 126
 127 #ifdef CONFIG_PCI
 128 static int x86_of_pci_irq_enable(struct pci_dev *dev)
 129 {
 130         struct of_irq oirq;
 131         u32 virq;
 132         int ret;
 133         u8 pin;
 134
 135         ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 136         if (ret)
 137                 return ret;
 138         if (!pin)
 139                 return 0;
 140
 141         ret = of_irq_map_pci(dev, &oirq);
 142         if (ret)
 143                 return ret;
 144
 145         virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
 146                         oirq.size);
 147         if (virq == 0)
 148                 return -EINVAL;
 149         dev->irq = virq;
 150         return 0;
 151 }
 152
 153 static void x86_of_pci_irq_disable(struct pci_dev *dev)
 154 {
 155 }
 156
 157 void __cpuinit x86_of_pci_init(void)
 158 {
 159         struct device_node *np;
 160
 161         pcibios_enable_irq = x86_of_pci_irq_enable;
 162         pcibios_disable_irq = x86_of_pci_irq_disable;
 163
 164         for_each_node_by_type(np, "pci") {
 165                 const void *prop;
 166                 struct pci_bus *bus;
 167                 unsigned int bus_min;
 168                 struct device_node *child;
 169
 170                 prop = of_get_property(np, "bus-range", NULL);
 171                 if (!prop)
 172                         continue;
 173                 bus_min = be32_to_cpup(prop);
 174
 175                 bus = pci_find_bus(0, bus_min);
 176                 if (!bus) {
 177                         printk(KERN_ERR "Can't find a node for bus %s.\n",
 178                                         np->full_name);
 179                         continue;
 180                 }
 181
 182                 if (bus->self)
 183                         bus->self->dev.of_node = np;
 184                 else
 185                         bus->dev.of_node = np;
 186
 187                 for_each_child_of_node(np, child) {
 188                         struct pci_dev *dev;
 189                         u32 devfn;
 190
 191                         prop = of_get_property(child, "reg", NULL);
 192                         if (!prop)
 193                                 continue;
 194
 195                         devfn = (be32_to_cpup(prop) >> 8) & 0xff;
 196                         dev = pci_get_slot(bus, devfn);
 197                         if (!dev)
 198                                 continue;
 199                         dev->dev.of_node = child;
 200                         pci_dev_put(dev);
 201                 }
 202         }
 203 }
 204 #endif
 205
 206 static void __init dtb_setup_hpet(void)
 207 {
 208 #ifdef CONFIG_HPET_TIMER
 209         struct device_node *dn;
 210         struct resource r;
 211         int ret;
 212
 213         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
 214         if (!dn)
 215                 return;
 216         ret = of_address_to_resource(dn, 0, &r);
 217         if (ret) {
 218                 WARN_ON(1);
 219                 return;
 220         }
 221         hpet_address = r.start;
 222 #endif
 223 }
 224
 225 static void __init dtb_lapic_setup(void)
 226 {
 227 #ifdef CONFIG_X86_LOCAL_APIC
 228         struct device_node *dn;
 229         struct resource r;
 230         int ret;
 231
 232         dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
 233         if (!dn)
 234                 return;
 235
 236         ret = of_address_to_resource(dn, 0, &r);
 237         if (WARN_ON(ret))
 238                 return;
 239
 240         /* Did the boot loader setup the local APIC ? */
 241         if (!cpu_has_apic) {
 242                 if (apic_force_enable(r.start))
 243                         return;
 244         }
 245         smp_found_config = 1;
 246         pic_mode = 1;
 247         register_lapic_address(r.start);
 248         generic_processor_info(boot_cpu_physical_apicid,
 249                                GET_APIC_VERSION(apic_read(APIC_LVR)));
 250 #endif
 251 }
 252
 253 #ifdef CONFIG_X86_IO_APIC
 254 static unsigned int ioapic_id;
 255
 256 static void __init dtb_add_ioapic(struct device_node *dn)
 257 {
 258         struct resource r;
 259         int ret;
 260
 261         ret = of_address_to_resource(dn, 0, &r);
 262         if (ret) {
 263                 printk(KERN_ERR "Can't obtain address from node %s.\n",
 264                                 dn->full_name);
 265                 return;
 266         }
 267         mp_register_ioapic(++ioapic_id, r.start, gsi_top);
 268 }
 269
 270 static void __init dtb_ioapic_setup(void)
 271 {
 272         struct device_node *dn;
 273
 274         for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
 275                 dtb_add_ioapic(dn);
 276
 277         if (nr_ioapics) {
 278                 of_ioapic = 1;
 279                 return;
 280         }
 281         printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
 282 }
 283 #else
 284 static void __init dtb_ioapic_setup(void) {}
 285 #endif
 286
 287 static void __init dtb_apic_setup(void)
 288 {
 289         dtb_lapic_setup();
 290         dtb_ioapic_setup();
 291 }
 292
 293 #ifdef CONFIG_OF_FLATTREE
 294 static void __init x86_flattree_get_config(void)
 295 {
 296         u32 size, map_len;
 297         void *new_dtb;
 298
 299         if (!initial_dtb)
 300                 return;
 301
 302         map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
 303                         (u64)sizeof(struct boot_param_header));
 304
 305         initial_boot_params = early_memremap(initial_dtb, map_len);
 306         size = be32_to_cpu(initial_boot_params->totalsize);
 307         if (map_len < size) {
 308                 early_iounmap(initial_boot_params, map_len);
 309                 initial_boot_params = early_memremap(initial_dtb, size);
 310                 map_len = size;
 311         }
 312
 313         new_dtb = alloc_bootmem(size);
 314         memcpy(new_dtb, initial_boot_params, size);
 315         early_iounmap(initial_boot_params, map_len);
 316
 317         initial_boot_params = new_dtb;
 318
 319         /* root level address cells */
 320         of_scan_flat_dt(early_init_dt_scan_root, NULL);
 321
 322         unflatten_device_tree();
 323 }
 324 #else
 325 static inline void x86_flattree_get_config(void) { }
 326 #endif
 327
 328 void __init x86_dtb_init(void)
 329 {
 330         x86_flattree_get_config();
 331
 332         if (!of_have_populated_dt())
 333                 return;
 334
 335         dtb_setup_hpet();
 336         dtb_apic_setup();
 337 }
 338
 339 #ifdef CONFIG_X86_IO_APIC
 340
 341 struct of_ioapic_type {
 342         u32 out_type;
 343         u32 trigger;
 344         u32 polarity;
 345 };
 346
 347 static struct of_ioapic_type of_ioapic_type[] =
 348 {
 349         {
 350                 .out_type       = IRQ_TYPE_EDGE_RISING,
 351                 .trigger        = IOAPIC_EDGE,
 352                 .polarity       = 1,
 353         },
 354         {
 355                 .out_type       = IRQ_TYPE_LEVEL_LOW,
 356                 .trigger        = IOAPIC_LEVEL,
 357                 .polarity       = 0,
 358         },
 359         {
 360                 .out_type       = IRQ_TYPE_LEVEL_HIGH,
 361                 .trigger        = IOAPIC_LEVEL,
 362                 .polarity       = 1,
 363         },
 364         {
 365                 .out_type       = IRQ_TYPE_EDGE_FALLING,
 366                 .trigger        = IOAPIC_EDGE,
 367                 .polarity       = 0,
 368         },
 369 };
 370
 371 static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize,
 372                         u32 *out_hwirq, u32 *out_type)
 373 {
 374         struct io_apic_irq_attr attr;
 375         struct of_ioapic_type *it;
 376         u32 line, idx, type;
 377
 378         if (intsize < 2)
 379                 return -EINVAL;
 380
 381         line = *intspec;
 382         idx = (u32) id->priv;
 383         *out_hwirq = line + mp_gsi_routing[idx].gsi_base;
 384
 385         intspec++;
 386         type = *intspec;
 387
 388         if (type >= ARRAY_SIZE(of_ioapic_type))
 389                 return -EINVAL;
 390
 391         it = of_ioapic_type + type;
 392         *out_type = it->out_type;
 393
 394         set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity);
 395
 396         return io_apic_setup_irq_pin(*out_hwirq, cpu_to_node(0), &attr);
 397 }
 398
 399 static void __init ioapic_add_ofnode(struct device_node *np)
 400 {
 401         struct resource r;
 402         int i, ret;
 403
 404         ret = of_address_to_resource(np, 0, &r);
 405         if (ret) {
 406                 printk(KERN_ERR "Failed to obtain address for %s\n",
 407                                 np->full_name);
 408                 return;
 409         }
 410
 411         for (i = 0; i < nr_ioapics; i++) {
 412                 if (r.start == mp_ioapics[i].apicaddr) {
 413                         struct irq_domain *id;
 414
 415                         id = kzalloc(sizeof(*id), GFP_KERNEL);
 416                         BUG_ON(!id);
 417                         id->controller = np;
 418                         id->xlate = ioapic_xlate;
 419                         id->priv = (void *)i;
 420                         add_interrupt_host(id);
 421                         return;
 422                 }
 423         }
 424         printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
 425 }
 426
 427 void __init x86_add_irq_domains(void)
 428 {
 429         struct device_node *dp;
 430
 431         if (!of_have_populated_dt())
 432                 return;
 433
 434         for_each_node_with_property(dp, "interrupt-controller") {
 435                 if (of_device_is_compatible(dp, "intel,ce4100-ioapic"))
 436                         ioapic_add_ofnode(dp);
 437         }
 438 }
 439 #else
 440 void __init x86_add_irq_domains(void) { }
 441 #endif