2 * FPU register's regset abstraction, for ptrace, core dumps, etc.
4 #include <asm/fpu/internal.h>
5 #include <asm/fpu/signal.h>
6 #include <asm/fpu/regset.h>
7 #include <asm/fpu/xstate.h>
10 * The xstateregs_active() routine is the same as the regset_fpregs_active() routine,
11 * as the "regset->n" for the xstate regset will be updated based on the feature
12 * capabilities supported by the xsave.
14 int regset_fpregs_active(struct task_struct
*target
, const struct user_regset
*regset
)
16 struct fpu
*target_fpu
= &target
->thread
.fpu
;
18 return target_fpu
->fpstate_active
? regset
->n
: 0;
21 int regset_xregset_fpregs_active(struct task_struct
*target
, const struct user_regset
*regset
)
23 struct fpu
*target_fpu
= &target
->thread
.fpu
;
25 if (boot_cpu_has(X86_FEATURE_FXSR
) && target_fpu
->fpstate_active
)
31 int xfpregs_get(struct task_struct
*target
, const struct user_regset
*regset
,
32 unsigned int pos
, unsigned int count
,
33 void *kbuf
, void __user
*ubuf
)
35 struct fpu
*fpu
= &target
->thread
.fpu
;
37 if (!boot_cpu_has(X86_FEATURE_FXSR
))
40 fpu__activate_fpstate_read(fpu
);
41 fpstate_sanitize_xstate(fpu
);
43 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
44 &fpu
->state
.fxsave
, 0, -1);
47 int xfpregs_set(struct task_struct
*target
, const struct user_regset
*regset
,
48 unsigned int pos
, unsigned int count
,
49 const void *kbuf
, const void __user
*ubuf
)
51 struct fpu
*fpu
= &target
->thread
.fpu
;
54 if (!boot_cpu_has(X86_FEATURE_FXSR
))
57 fpu__activate_fpstate_write(fpu
);
58 fpstate_sanitize_xstate(fpu
);
60 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
61 &fpu
->state
.fxsave
, 0, -1);
64 * mxcsr reserved bits must be masked to zero for security reasons.
66 fpu
->state
.fxsave
.mxcsr
&= mxcsr_feature_mask
;
69 * update the header bits in the xsave header, indicating the
70 * presence of FP and SSE state.
72 if (boot_cpu_has(X86_FEATURE_XSAVE
))
73 fpu
->state
.xsave
.header
.xfeatures
|= XFEATURE_MASK_FPSSE
;
78 int xstateregs_get(struct task_struct
*target
, const struct user_regset
*regset
,
79 unsigned int pos
, unsigned int count
,
80 void *kbuf
, void __user
*ubuf
)
82 struct fpu
*fpu
= &target
->thread
.fpu
;
83 struct xregs_state
*xsave
;
86 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
89 xsave
= &fpu
->state
.xsave
;
91 fpu__activate_fpstate_read(fpu
);
93 if (using_compacted_format()) {
94 ret
= copyout_from_xsaves(pos
, count
, kbuf
, ubuf
, xsave
);
96 fpstate_sanitize_xstate(fpu
);
98 * Copy the 48 bytes defined by the software into the xsave
99 * area in the thread struct, so that we can copy the whole
100 * area to user using one user_regset_copyout().
102 memcpy(&xsave
->i387
.sw_reserved
, xstate_fx_sw_bytes
, sizeof(xstate_fx_sw_bytes
));
105 * Copy the xstate memory layout.
107 ret
= user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
, xsave
, 0, -1);
112 int xstateregs_set(struct task_struct
*target
, const struct user_regset
*regset
,
113 unsigned int pos
, unsigned int count
,
114 const void *kbuf
, const void __user
*ubuf
)
116 struct fpu
*fpu
= &target
->thread
.fpu
;
117 struct xregs_state
*xsave
;
120 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
124 * A whole standard-format XSAVE buffer is needed:
126 if ((pos
!= 0) || (count
< fpu_user_xstate_size
))
129 xsave
= &fpu
->state
.xsave
;
131 fpu__activate_fpstate_write(fpu
);
133 if (boot_cpu_has(X86_FEATURE_XSAVES
))
134 ret
= copyin_to_xsaves(kbuf
, ubuf
, xsave
);
136 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
, xsave
, 0, -1);
139 * In case of failure, mark all states as init:
142 fpstate_init(&fpu
->state
);
145 * mxcsr reserved bits must be masked to zero for security reasons.
147 xsave
->i387
.mxcsr
&= mxcsr_feature_mask
;
148 xsave
->header
.xfeatures
&= xfeatures_mask
;
150 * These bits must be zero.
152 memset(&xsave
->header
.reserved
, 0, 48);
157 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
160 * FPU tag word conversions.
163 static inline unsigned short twd_i387_to_fxsr(unsigned short twd
)
165 unsigned int tmp
; /* to avoid 16 bit prefixes in the code */
167 /* Transform each pair of bits into 01 (valid) or 00 (empty) */
169 tmp
= (tmp
| (tmp
>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
170 /* and move the valid bits to the lower byte. */
171 tmp
= (tmp
| (tmp
>> 1)) & 0x3333; /* 00VV00VV00VV00VV */
172 tmp
= (tmp
| (tmp
>> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
173 tmp
= (tmp
| (tmp
>> 4)) & 0x00ff; /* 00000000VVVVVVVV */
178 #define FPREG_ADDR(f, n) ((void *)&(f)->st_space + (n) * 16)
179 #define FP_EXP_TAG_VALID 0
180 #define FP_EXP_TAG_ZERO 1
181 #define FP_EXP_TAG_SPECIAL 2
182 #define FP_EXP_TAG_EMPTY 3
184 static inline u32
twd_fxsr_to_i387(struct fxregs_state
*fxsave
)
187 u32 tos
= (fxsave
->swd
>> 11) & 7;
188 u32 twd
= (unsigned long) fxsave
->twd
;
190 u32 ret
= 0xffff0000u
;
193 for (i
= 0; i
< 8; i
++, twd
>>= 1) {
195 st
= FPREG_ADDR(fxsave
, (i
- tos
) & 7);
197 switch (st
->exponent
& 0x7fff) {
199 tag
= FP_EXP_TAG_SPECIAL
;
202 if (!st
->significand
[0] &&
203 !st
->significand
[1] &&
204 !st
->significand
[2] &&
206 tag
= FP_EXP_TAG_ZERO
;
208 tag
= FP_EXP_TAG_SPECIAL
;
211 if (st
->significand
[3] & 0x8000)
212 tag
= FP_EXP_TAG_VALID
;
214 tag
= FP_EXP_TAG_SPECIAL
;
218 tag
= FP_EXP_TAG_EMPTY
;
220 ret
|= tag
<< (2 * i
);
226 * FXSR floating point environment conversions.
230 convert_from_fxsr(struct user_i387_ia32_struct
*env
, struct task_struct
*tsk
)
232 struct fxregs_state
*fxsave
= &tsk
->thread
.fpu
.state
.fxsave
;
233 struct _fpreg
*to
= (struct _fpreg
*) &env
->st_space
[0];
234 struct _fpxreg
*from
= (struct _fpxreg
*) &fxsave
->st_space
[0];
237 env
->cwd
= fxsave
->cwd
| 0xffff0000u
;
238 env
->swd
= fxsave
->swd
| 0xffff0000u
;
239 env
->twd
= twd_fxsr_to_i387(fxsave
);
242 env
->fip
= fxsave
->rip
;
243 env
->foo
= fxsave
->rdp
;
245 * should be actually ds/cs at fpu exception time, but
246 * that information is not available in 64bit mode.
248 env
->fcs
= task_pt_regs(tsk
)->cs
;
249 if (tsk
== current
) {
250 savesegment(ds
, env
->fos
);
252 env
->fos
= tsk
->thread
.ds
;
254 env
->fos
|= 0xffff0000;
256 env
->fip
= fxsave
->fip
;
257 env
->fcs
= (u16
) fxsave
->fcs
| ((u32
) fxsave
->fop
<< 16);
258 env
->foo
= fxsave
->foo
;
259 env
->fos
= fxsave
->fos
;
262 for (i
= 0; i
< 8; ++i
)
263 memcpy(&to
[i
], &from
[i
], sizeof(to
[0]));
266 void convert_to_fxsr(struct task_struct
*tsk
,
267 const struct user_i387_ia32_struct
*env
)
270 struct fxregs_state
*fxsave
= &tsk
->thread
.fpu
.state
.fxsave
;
271 struct _fpreg
*from
= (struct _fpreg
*) &env
->st_space
[0];
272 struct _fpxreg
*to
= (struct _fpxreg
*) &fxsave
->st_space
[0];
275 fxsave
->cwd
= env
->cwd
;
276 fxsave
->swd
= env
->swd
;
277 fxsave
->twd
= twd_i387_to_fxsr(env
->twd
);
278 fxsave
->fop
= (u16
) ((u32
) env
->fcs
>> 16);
280 fxsave
->rip
= env
->fip
;
281 fxsave
->rdp
= env
->foo
;
282 /* cs and ds ignored */
284 fxsave
->fip
= env
->fip
;
285 fxsave
->fcs
= (env
->fcs
& 0xffff);
286 fxsave
->foo
= env
->foo
;
287 fxsave
->fos
= env
->fos
;
290 for (i
= 0; i
< 8; ++i
)
291 memcpy(&to
[i
], &from
[i
], sizeof(from
[0]));
294 int fpregs_get(struct task_struct
*target
, const struct user_regset
*regset
,
295 unsigned int pos
, unsigned int count
,
296 void *kbuf
, void __user
*ubuf
)
298 struct fpu
*fpu
= &target
->thread
.fpu
;
299 struct user_i387_ia32_struct env
;
301 fpu__activate_fpstate_read(fpu
);
303 if (!boot_cpu_has(X86_FEATURE_FPU
))
304 return fpregs_soft_get(target
, regset
, pos
, count
, kbuf
, ubuf
);
306 if (!boot_cpu_has(X86_FEATURE_FXSR
))
307 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
,
308 &fpu
->state
.fsave
, 0,
311 fpstate_sanitize_xstate(fpu
);
313 if (kbuf
&& pos
== 0 && count
== sizeof(env
)) {
314 convert_from_fxsr(kbuf
, target
);
318 convert_from_fxsr(&env
, target
);
320 return user_regset_copyout(&pos
, &count
, &kbuf
, &ubuf
, &env
, 0, -1);
323 int fpregs_set(struct task_struct
*target
, const struct user_regset
*regset
,
324 unsigned int pos
, unsigned int count
,
325 const void *kbuf
, const void __user
*ubuf
)
327 struct fpu
*fpu
= &target
->thread
.fpu
;
328 struct user_i387_ia32_struct env
;
331 fpu__activate_fpstate_write(fpu
);
332 fpstate_sanitize_xstate(fpu
);
334 if (!boot_cpu_has(X86_FEATURE_FPU
))
335 return fpregs_soft_set(target
, regset
, pos
, count
, kbuf
, ubuf
);
337 if (!boot_cpu_has(X86_FEATURE_FXSR
))
338 return user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
,
339 &fpu
->state
.fsave
, 0,
342 if (pos
> 0 || count
< sizeof(env
))
343 convert_from_fxsr(&env
, target
);
345 ret
= user_regset_copyin(&pos
, &count
, &kbuf
, &ubuf
, &env
, 0, -1);
347 convert_to_fxsr(target
, &env
);
350 * update the header bit in the xsave header, indicating the
353 if (boot_cpu_has(X86_FEATURE_XSAVE
))
354 fpu
->state
.xsave
.header
.xfeatures
|= XFEATURE_MASK_FP
;
359 * FPU state for core dumps.
360 * This is only used for a.out dumps now.
361 * It is declared generically using elf_fpregset_t (which is
362 * struct user_i387_struct) but is in fact only used for 32-bit
363 * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
365 int dump_fpu(struct pt_regs
*regs
, struct user_i387_struct
*ufpu
)
367 struct task_struct
*tsk
= current
;
368 struct fpu
*fpu
= &tsk
->thread
.fpu
;
371 fpvalid
= fpu
->fpstate_active
;
373 fpvalid
= !fpregs_get(tsk
, NULL
,
374 0, sizeof(struct user_i387_ia32_struct
),
379 EXPORT_SYMBOL(dump_fpu
);
381 #endif /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */