arch/x86/kernel/head_64.S

   1 /*
   2  *  linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit
   3  *
   4  *  Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
   5  *  Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
   6  *  Copyright (C) 2000 Karsten Keil <kkeil@suse.de>
   7  *  Copyright (C) 2001,2002 Andi Kleen <ak@suse.de>
   8  *  Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com>
   9  */
  10
  11
  12 #include <linux/linkage.h>
  13 #include <linux/threads.h>
  14 #include <linux/init.h>
  15 #include <asm/segment.h>
  16 #include <asm/pgtable.h>
  17 #include <asm/page.h>
  18 #include <asm/msr.h>
  19 #include <asm/cache.h>
  20 #include <asm/processor-flags.h>
  21 #include <asm/percpu.h>
  22 #include <asm/nops.h>
  23 #include "../entry/calling.h"
  24 #include <asm/export.h>
  25
  26 #ifdef CONFIG_PARAVIRT
  27 #include <asm/asm-offsets.h>
  28 #include <asm/paravirt.h>
  29 #define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg
  30 #else
  31 #define GET_CR2_INTO(reg) movq %cr2, reg
  32 #define INTERRUPT_RETURN iretq
  33 #endif
  34
  35 /* we are not able to switch in one step to the final KERNEL ADDRESS SPACE
  36  * because we need identity-mapped pages.
  37  *
  38  */
  39
  40 #define p4d_index(x)    (((x) >> P4D_SHIFT) & (PTRS_PER_P4D-1))
  41 #define pud_index(x)    (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
  42
  43 PGD_PAGE_OFFSET = pgd_index(__PAGE_OFFSET_BASE)
  44 PGD_START_KERNEL = pgd_index(__START_KERNEL_map)
  45 L3_START_KERNEL = pud_index(__START_KERNEL_map)
  46
  47         .text
  48         __HEAD
  49         .code64
  50         .globl startup_64
  51 startup_64:
  52         UNWIND_HINT_EMPTY
  53         /*
  54          * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
  55          * and someone has loaded an identity mapped page table
  56          * for us.  These identity mapped page tables map all of the
  57          * kernel pages and possibly all of memory.
  58          *
  59          * %rsi holds a physical pointer to real_mode_data.
  60          *
  61          * We come here either directly from a 64bit bootloader, or from
  62          * arch/x86/boot/compressed/head_64.S.
  63          *
  64          * We only come here initially at boot nothing else comes here.
  65          *
  66          * Since we may be loaded at an address different from what we were
  67          * compiled to run at we first fixup the physical addresses in our page
  68          * tables and then reload them.
  69          */
  70
  71         /* Set up the stack for verify_cpu(), similar to initial_stack below */
  72         leaq    (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp
  73
  74         /* Sanitize CPU configuration */
  75         call verify_cpu
  76
  77         /*
  78          * Perform pagetable fixups. Additionally, if SME is active, encrypt
  79          * the kernel and retrieve the modifier (SME encryption mask if SME
  80          * is active) to be added to the initial pgdir entry that will be
  81          * programmed into CR3.
  82          */
  83         leaq    _text(%rip), %rdi
  84         pushq   %rsi
  85         call    __startup_64
  86         popq    %rsi
  87
  88         /* Form the CR3 value being sure to include the CR3 modifier */
  89         addq    $(early_top_pgt - __START_KERNEL_map), %rax
  90         jmp 1f
  91 ENTRY(secondary_startup_64)
  92         UNWIND_HINT_EMPTY
  93         /*
  94          * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
  95          * and someone has loaded a mapped page table.
  96          *
  97          * %rsi holds a physical pointer to real_mode_data.
  98          *
  99          * We come here either from startup_64 (using physical addresses)
 100          * or from trampoline.S (using virtual addresses).
 101          *
 102          * Using virtual addresses from trampoline.S removes the need
 103          * to have any identity mapped pages in the kernel page table
 104          * after the boot processor executes this code.
 105          */
 106
 107         /* Sanitize CPU configuration */
 108         call verify_cpu
 109
 110         /*
 111          * Retrieve the modifier (SME encryption mask if SME is active) to be
 112          * added to the initial pgdir entry that will be programmed into CR3.
 113          */
 114         pushq   %rsi
 115         call    __startup_secondary_64
 116         popq    %rsi
 117
 118         /* Form the CR3 value being sure to include the CR3 modifier */
 119         addq    $(init_top_pgt - __START_KERNEL_map), %rax
 120 1:
 121
 122         /* Enable PAE mode, PGE and LA57 */
 123         movl    $(X86_CR4_PAE | X86_CR4_PGE), %ecx
 124 #ifdef CONFIG_X86_5LEVEL
 125         orl     $X86_CR4_LA57, %ecx
 126 #endif
 127         movq    %rcx, %cr4
 128
 129         /* Setup early boot stage 4-/5-level pagetables. */
 130         addq    phys_base(%rip), %rax
 131         movq    %rax, %cr3
 132
 133         /* Ensure I am executing from virtual addresses */
 134         movq    $1f, %rax
 135         jmp     *%rax
 136 1:
 137         UNWIND_HINT_EMPTY
 138
 139         /* Check if nx is implemented */
 140         movl    $0x80000001, %eax
 141         cpuid
 142         movl    %edx,%edi
 143
 144         /* Setup EFER (Extended Feature Enable Register) */
 145         movl    $MSR_EFER, %ecx
 146         rdmsr
 147         btsl    $_EFER_SCE, %eax        /* Enable System Call */
 148         btl     $20,%edi                /* No Execute supported? */
 149         jnc     1f
 150         btsl    $_EFER_NX, %eax
 151         btsq    $_PAGE_BIT_NX,early_pmd_flags(%rip)
 152 1:      wrmsr                           /* Make changes effective */
 153
 154         /* Setup cr0 */
 155 #define CR0_STATE       (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
 156                          X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
 157                          X86_CR0_PG)
 158         movl    $CR0_STATE, %eax
 159         /* Make changes effective */
 160         movq    %rax, %cr0
 161
 162         /* Setup a boot time stack */
 163         movq initial_stack(%rip), %rsp
 164
 165         /* zero EFLAGS after setting rsp */
 166         pushq $0
 167         popfq
 168
 169         /*
 170          * We must switch to a new descriptor in kernel space for the GDT
 171          * because soon the kernel won't have access anymore to the userspace
 172          * addresses where we're currently running on. We have to do that here
 173          * because in 32bit we couldn't load a 64bit linear address.
 174          */
 175         lgdt    early_gdt_descr(%rip)
 176
 177         /* set up data segments */
 178         xorl %eax,%eax
 179         movl %eax,%ds
 180         movl %eax,%ss
 181         movl %eax,%es
 182
 183         /*
 184          * We don't really need to load %fs or %gs, but load them anyway
 185          * to kill any stale realmode selectors.  This allows execution
 186          * under VT hardware.
 187          */
 188         movl %eax,%fs
 189         movl %eax,%gs
 190
 191         /* Set up %gs.
 192          *
 193          * The base of %gs always points to the bottom of the irqstack
 194          * union.  If the stack protector canary is enabled, it is
 195          * located at %gs:40.  Note that, on SMP, the boot cpu uses
 196          * init data section till per cpu areas are set up.
 197          */
 198         movl    $MSR_GS_BASE,%ecx
 199         movl    initial_gs(%rip),%eax
 200         movl    initial_gs+4(%rip),%edx
 201         wrmsr
 202
 203         /* rsi is pointer to real mode structure with interesting info.
 204            pass it to C */
 205         movq    %rsi, %rdi
 206
 207 .Ljump_to_C_code:
 208         /*
 209          * Jump to run C code and to be on a real kernel address.
 210          * Since we are running on identity-mapped space we have to jump
 211          * to the full 64bit address, this is only possible as indirect
 212          * jump.  In addition we need to ensure %cs is set so we make this
 213          * a far return.
 214          *
 215          * Note: do not change to far jump indirect with 64bit offset.
 216          *
 217          * AMD does not support far jump indirect with 64bit offset.
 218          * AMD64 Architecture Programmer's Manual, Volume 3: states only
 219          *      JMP FAR mem16:16 FF /5 Far jump indirect,
 220          *              with the target specified by a far pointer in memory.
 221          *      JMP FAR mem16:32 FF /5 Far jump indirect,
 222          *              with the target specified by a far pointer in memory.
 223          *
 224          * Intel64 does support 64bit offset.
 225          * Software Developer Manual Vol 2: states:
 226          *      FF /5 JMP m16:16 Jump far, absolute indirect,
 227          *              address given in m16:16
 228          *      FF /5 JMP m16:32 Jump far, absolute indirect,
 229          *              address given in m16:32.
 230          *      REX.W + FF /5 JMP m16:64 Jump far, absolute indirect,
 231          *              address given in m16:64.
 232          */
 233         pushq   $.Lafter_lret   # put return address on stack for unwinder
 234         xorq    %rbp, %rbp      # clear frame pointer
 235         movq    initial_code(%rip), %rax
 236         pushq   $__KERNEL_CS    # set correct cs
 237         pushq   %rax            # target address in negative space
 238         lretq
 239 .Lafter_lret:
 240 END(secondary_startup_64)
 241
 242 #include "verify_cpu.S"
 243
 244 #ifdef CONFIG_HOTPLUG_CPU
 245 /*
 246  * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
 247  * up already except stack. We just set up stack here. Then call
 248  * start_secondary() via .Ljump_to_C_code.
 249  */
 250 ENTRY(start_cpu0)
 251         movq    initial_stack(%rip), %rsp
 252         UNWIND_HINT_EMPTY
 253         jmp     .Ljump_to_C_code
 254 ENDPROC(start_cpu0)
 255 #endif
 256
 257         /* Both SMP bootup and ACPI suspend change these variables */
 258         __REFDATA
 259         .balign 8
 260         GLOBAL(initial_code)
 261         .quad   x86_64_start_kernel
 262         GLOBAL(initial_gs)
 263         .quad   INIT_PER_CPU_VAR(irq_stack_union)
 264         GLOBAL(initial_stack)
 265         /*
 266          * The SIZEOF_PTREGS gap is a convention which helps the in-kernel
 267          * unwinder reliably detect the end of the stack.
 268          */
 269         .quad  init_thread_union + THREAD_SIZE - SIZEOF_PTREGS
 270         __FINITDATA
 271
 272         __INIT
 273 ENTRY(early_idt_handler_array)
 274         i = 0
 275         .rept NUM_EXCEPTION_VECTORS
 276         .ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1
 277                 UNWIND_HINT_IRET_REGS
 278                 pushq $0        # Dummy error code, to make stack frame uniform
 279         .else
 280                 UNWIND_HINT_IRET_REGS offset=8
 281         .endif
 282         pushq $i                # 72(%rsp) Vector number
 283         jmp early_idt_handler_common
 284         UNWIND_HINT_IRET_REGS
 285         i = i + 1
 286         .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
 287         .endr
 288         UNWIND_HINT_IRET_REGS offset=16
 289 END(early_idt_handler_array)
 290
 291 early_idt_handler_common:
 292         /*
 293          * The stack is the hardware frame, an error code or zero, and the
 294          * vector number.
 295          */
 296         cld
 297
 298         incl early_recursion_flag(%rip)
 299
 300         /* The vector number is currently in the pt_regs->di slot. */
 301         pushq %rsi                              /* pt_regs->si */
 302         movq 8(%rsp), %rsi                      /* RSI = vector number */
 303         movq %rdi, 8(%rsp)                      /* pt_regs->di = RDI */
 304         pushq %rdx                              /* pt_regs->dx */
 305         pushq %rcx                              /* pt_regs->cx */
 306         pushq %rax                              /* pt_regs->ax */
 307         pushq %r8                               /* pt_regs->r8 */
 308         pushq %r9                               /* pt_regs->r9 */
 309         pushq %r10                              /* pt_regs->r10 */
 310         pushq %r11                              /* pt_regs->r11 */
 311         pushq %rbx                              /* pt_regs->bx */
 312         pushq %rbp                              /* pt_regs->bp */
 313         pushq %r12                              /* pt_regs->r12 */
 314         pushq %r13                              /* pt_regs->r13 */
 315         pushq %r14                              /* pt_regs->r14 */
 316         pushq %r15                              /* pt_regs->r15 */
 317         UNWIND_HINT_REGS
 318
 319         cmpq $14,%rsi           /* Page fault? */
 320         jnz 10f
 321         GET_CR2_INTO(%rdi)      /* Can clobber any volatile register if pv */
 322         call early_make_pgtable
 323         andl %eax,%eax
 324         jz 20f                  /* All good */
 325
 326 10:
 327         movq %rsp,%rdi          /* RDI = pt_regs; RSI is already trapnr */
 328         call early_fixup_exception
 329
 330 20:
 331         decl early_recursion_flag(%rip)
 332         jmp restore_regs_and_iret
 333 END(early_idt_handler_common)
 334
 335         __INITDATA
 336
 337         .balign 4
 338 GLOBAL(early_recursion_flag)
 339         .long 0
 340
 341 #define NEXT_PAGE(name) \
 342         .balign PAGE_SIZE; \
 343 GLOBAL(name)
 344
 345 /* Automate the creation of 1 to 1 mapping pmd entries */
 346 #define PMDS(START, PERM, COUNT)                        \
 347         i = 0 ;                                         \
 348         .rept (COUNT) ;                                 \
 349         .quad   (START) + (i << PMD_SHIFT) + (PERM) ;   \
 350         i = i + 1 ;                                     \
 351         .endr
 352
 353         __INITDATA
 354 NEXT_PAGE(early_top_pgt)
 355         .fill   511,8,0
 356 #ifdef CONFIG_X86_5LEVEL
 357         .quad   level4_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
 358 #else
 359         .quad   level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
 360 #endif
 361
 362 NEXT_PAGE(early_dynamic_pgts)
 363         .fill   512*EARLY_DYNAMIC_PAGE_TABLES,8,0
 364
 365         .data
 366
 367 #ifndef CONFIG_XEN
 368 NEXT_PAGE(init_top_pgt)
 369         .fill   512,8,0
 370 #else
 371 NEXT_PAGE(init_top_pgt)
 372         .quad   level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
 373         .org    init_top_pgt + PGD_PAGE_OFFSET*8, 0
 374         .quad   level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
 375         .org    init_top_pgt + PGD_START_KERNEL*8, 0
 376         /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
 377         .quad   level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
 378
 379 NEXT_PAGE(level3_ident_pgt)
 380         .quad   level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
 381         .fill   511, 8, 0
 382 NEXT_PAGE(level2_ident_pgt)
 383         /* Since I easily can, map the first 1G.
 384          * Don't set NX because code runs from these pages.
 385          */
 386         PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD)
 387 #endif
 388
 389 #ifdef CONFIG_X86_5LEVEL
 390 NEXT_PAGE(level4_kernel_pgt)
 391         .fill   511,8,0
 392         .quad   level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
 393 #endif
 394
 395 NEXT_PAGE(level3_kernel_pgt)
 396         .fill   L3_START_KERNEL,8,0
 397         /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */
 398         .quad   level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
 399         .quad   level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
 400
 401 NEXT_PAGE(level2_kernel_pgt)
 402         /*
 403          * 512 MB kernel mapping. We spend a full page on this pagetable
 404          * anyway.
 405          *
 406          * The kernel code+data+bss must not be bigger than that.
 407          *
 408          * (NOTE: at +512MB starts the module area, see MODULES_VADDR.
 409          *  If you want to increase this then increase MODULES_VADDR
 410          *  too.)
 411          */
 412         PMDS(0, __PAGE_KERNEL_LARGE_EXEC,
 413                 KERNEL_IMAGE_SIZE/PMD_SIZE)
 414
 415 NEXT_PAGE(level2_fixmap_pgt)
 416         .fill   506,8,0
 417         .quad   level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
 418         /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */
 419         .fill   5,8,0
 420
 421 NEXT_PAGE(level1_fixmap_pgt)
 422         .fill   512,8,0
 423
 424 #undef PMDS
 425
 426         .data
 427         .align 16
 428         .globl early_gdt_descr
 429 early_gdt_descr:
 430         .word   GDT_ENTRIES*8-1
 431 early_gdt_descr_base:
 432         .quad   INIT_PER_CPU_VAR(gdt_page)
 433
 434 ENTRY(phys_base)
 435         /* This must match the first entry in level2_kernel_pgt */
 436         .quad   0x0000000000000000
 437 EXPORT_SYMBOL(phys_base)
 438
 439 #include "../../x86/xen/xen-head.S"
 440
 441         __PAGE_ALIGNED_BSS
 442 NEXT_PAGE(empty_zero_page)
 443         .skip PAGE_SIZE
 444 EXPORT_SYMBOL(empty_zero_page)
 445