1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit
5 * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
7 * Copyright (C) 2000 Karsten Keil <kkeil@suse.de>
8 * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de>
9 * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com>
13 #include <linux/linkage.h>
14 #include <linux/threads.h>
15 #include <linux/init.h>
16 #include <asm/segment.h>
17 #include <asm/pgtable.h>
20 #include <asm/cache.h>
21 #include <asm/processor-flags.h>
22 #include <asm/percpu.h>
24 #include "../entry/calling.h"
25 #include <asm/export.h>
27 #ifdef CONFIG_PARAVIRT
28 #include <asm/asm-offsets.h>
29 #include <asm/paravirt.h>
30 #define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg
32 #define GET_CR2_INTO(reg) movq %cr2, reg
33 #define INTERRUPT_RETURN iretq
36 /* we are not able to switch in one step to the final KERNEL ADDRESS SPACE
37 * because we need identity-mapped pages.
41 #define p4d_index(x) (((x) >> P4D_SHIFT) & (PTRS_PER_P4D-1))
42 #define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
44 PGD_PAGE_OFFSET = pgd_index(__PAGE_OFFSET_BASE)
45 PGD_START_KERNEL = pgd_index(__START_KERNEL_map)
46 L3_START_KERNEL = pud_index(__START_KERNEL_map)
55 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
56 * and someone has loaded an identity mapped page table
57 * for us. These identity mapped page tables map all of the
58 * kernel pages and possibly all of memory.
60 * %rsi holds a physical pointer to real_mode_data.
62 * We come here either directly from a 64bit bootloader, or from
63 * arch/x86/boot/compressed/head_64.S.
65 * We only come here initially at boot nothing else comes here.
67 * Since we may be loaded at an address different from what we were
68 * compiled to run at we first fixup the physical addresses in our page
69 * tables and then reload them.
72 /* Set up the stack for verify_cpu(), similar to initial_stack below */
73 leaq (__end_init_task - SIZEOF_PTREGS)(%rip), %rsp
75 /* Sanitize CPU configuration */
79 * Perform pagetable fixups. Additionally, if SME is active, encrypt
80 * the kernel and retrieve the modifier (SME encryption mask if SME
81 * is active) to be added to the initial pgdir entry that will be
82 * programmed into CR3.
84 leaq _text(%rip), %rdi
89 /* Form the CR3 value being sure to include the CR3 modifier */
90 addq $(early_top_pgt - __START_KERNEL_map), %rax
92 ENTRY(secondary_startup_64)
95 * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
96 * and someone has loaded a mapped page table.
98 * %rsi holds a physical pointer to real_mode_data.
100 * We come here either from startup_64 (using physical addresses)
101 * or from trampoline.S (using virtual addresses).
103 * Using virtual addresses from trampoline.S removes the need
104 * to have any identity mapped pages in the kernel page table
105 * after the boot processor executes this code.
108 /* Sanitize CPU configuration */
112 * Retrieve the modifier (SME encryption mask if SME is active) to be
113 * added to the initial pgdir entry that will be programmed into CR3.
116 call __startup_secondary_64
119 /* Form the CR3 value being sure to include the CR3 modifier */
120 addq $(init_top_pgt - __START_KERNEL_map), %rax
123 /* Enable PAE mode, PGE and LA57 */
124 movl $(X86_CR4_PAE | X86_CR4_PGE), %ecx
125 #ifdef CONFIG_X86_5LEVEL
126 orl $X86_CR4_LA57, %ecx
130 /* Setup early boot stage 4-/5-level pagetables. */
131 addq phys_base(%rip), %rax
134 /* Ensure I am executing from virtual addresses */
140 /* Check if nx is implemented */
141 movl $0x80000001, %eax
145 /* Setup EFER (Extended Feature Enable Register) */
148 btsl $_EFER_SCE, %eax /* Enable System Call */
149 btl $20,%edi /* No Execute supported? */
152 btsq $_PAGE_BIT_NX,early_pmd_flags(%rip)
153 1: wrmsr /* Make changes effective */
156 #define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
157 X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
159 movl $CR0_STATE, %eax
160 /* Make changes effective */
163 /* Setup a boot time stack */
164 movq initial_stack(%rip), %rsp
166 /* zero EFLAGS after setting rsp */
171 * We must switch to a new descriptor in kernel space for the GDT
172 * because soon the kernel won't have access anymore to the userspace
173 * addresses where we're currently running on. We have to do that here
174 * because in 32bit we couldn't load a 64bit linear address.
176 lgdt early_gdt_descr(%rip)
178 /* set up data segments */
185 * We don't really need to load %fs or %gs, but load them anyway
186 * to kill any stale realmode selectors. This allows execution
194 * The base of %gs always points to the bottom of the irqstack
195 * union. If the stack protector canary is enabled, it is
196 * located at %gs:40. Note that, on SMP, the boot cpu uses
197 * init data section till per cpu areas are set up.
199 movl $MSR_GS_BASE,%ecx
200 movl initial_gs(%rip),%eax
201 movl initial_gs+4(%rip),%edx
204 /* rsi is pointer to real mode structure with interesting info.
210 * Jump to run C code and to be on a real kernel address.
211 * Since we are running on identity-mapped space we have to jump
212 * to the full 64bit address, this is only possible as indirect
213 * jump. In addition we need to ensure %cs is set so we make this
216 * Note: do not change to far jump indirect with 64bit offset.
218 * AMD does not support far jump indirect with 64bit offset.
219 * AMD64 Architecture Programmer's Manual, Volume 3: states only
220 * JMP FAR mem16:16 FF /5 Far jump indirect,
221 * with the target specified by a far pointer in memory.
222 * JMP FAR mem16:32 FF /5 Far jump indirect,
223 * with the target specified by a far pointer in memory.
225 * Intel64 does support 64bit offset.
226 * Software Developer Manual Vol 2: states:
227 * FF /5 JMP m16:16 Jump far, absolute indirect,
228 * address given in m16:16
229 * FF /5 JMP m16:32 Jump far, absolute indirect,
230 * address given in m16:32.
231 * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect,
232 * address given in m16:64.
234 pushq $.Lafter_lret # put return address on stack for unwinder
235 xorq %rbp, %rbp # clear frame pointer
236 movq initial_code(%rip), %rax
237 pushq $__KERNEL_CS # set correct cs
238 pushq %rax # target address in negative space
241 END(secondary_startup_64)
243 #include "verify_cpu.S"
245 #ifdef CONFIG_HOTPLUG_CPU
247 * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
248 * up already except stack. We just set up stack here. Then call
249 * start_secondary() via .Ljump_to_C_code.
252 movq initial_stack(%rip), %rsp
258 /* Both SMP bootup and ACPI suspend change these variables */
262 .quad x86_64_start_kernel
264 .quad INIT_PER_CPU_VAR(irq_stack_union)
265 GLOBAL(initial_stack)
267 * The SIZEOF_PTREGS gap is a convention which helps the in-kernel
268 * unwinder reliably detect the end of the stack.
270 .quad init_thread_union + THREAD_SIZE - SIZEOF_PTREGS
274 ENTRY(early_idt_handler_array)
276 .rept NUM_EXCEPTION_VECTORS
277 .ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1
278 UNWIND_HINT_IRET_REGS
279 pushq $0 # Dummy error code, to make stack frame uniform
281 UNWIND_HINT_IRET_REGS offset=8
283 pushq $i # 72(%rsp) Vector number
284 jmp early_idt_handler_common
285 UNWIND_HINT_IRET_REGS
287 .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
289 UNWIND_HINT_IRET_REGS offset=16
290 END(early_idt_handler_array)
292 early_idt_handler_common:
294 * The stack is the hardware frame, an error code or zero, and the
299 incl early_recursion_flag(%rip)
301 /* The vector number is currently in the pt_regs->di slot. */
302 pushq %rsi /* pt_regs->si */
303 movq 8(%rsp), %rsi /* RSI = vector number */
304 movq %rdi, 8(%rsp) /* pt_regs->di = RDI */
305 pushq %rdx /* pt_regs->dx */
306 pushq %rcx /* pt_regs->cx */
307 pushq %rax /* pt_regs->ax */
308 pushq %r8 /* pt_regs->r8 */
309 pushq %r9 /* pt_regs->r9 */
310 pushq %r10 /* pt_regs->r10 */
311 pushq %r11 /* pt_regs->r11 */
312 pushq %rbx /* pt_regs->bx */
313 pushq %rbp /* pt_regs->bp */
314 pushq %r12 /* pt_regs->r12 */
315 pushq %r13 /* pt_regs->r13 */
316 pushq %r14 /* pt_regs->r14 */
317 pushq %r15 /* pt_regs->r15 */
320 cmpq $14,%rsi /* Page fault? */
322 GET_CR2_INTO(%rdi) /* Can clobber any volatile register if pv */
323 call early_make_pgtable
325 jz 20f /* All good */
328 movq %rsp,%rdi /* RDI = pt_regs; RSI is already trapnr */
329 call early_fixup_exception
332 decl early_recursion_flag(%rip)
333 jmp restore_regs_and_iret
334 END(early_idt_handler_common)
339 GLOBAL(early_recursion_flag)
342 #define NEXT_PAGE(name) \
346 /* Automate the creation of 1 to 1 mapping pmd entries */
347 #define PMDS(START, PERM, COUNT) \
350 .quad (START) + (i << PMD_SHIFT) + (PERM) ; \
355 NEXT_PAGE(early_top_pgt)
357 #ifdef CONFIG_X86_5LEVEL
358 .quad level4_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
360 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
363 NEXT_PAGE(early_dynamic_pgts)
364 .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0
369 NEXT_PAGE(init_top_pgt)
372 NEXT_PAGE(init_top_pgt)
373 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
374 .org init_top_pgt + PGD_PAGE_OFFSET*8, 0
375 .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
376 .org init_top_pgt + PGD_START_KERNEL*8, 0
377 /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
378 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
380 NEXT_PAGE(level3_ident_pgt)
381 .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
383 NEXT_PAGE(level2_ident_pgt)
384 /* Since I easily can, map the first 1G.
385 * Don't set NX because code runs from these pages.
387 PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD)
390 #ifdef CONFIG_X86_5LEVEL
391 NEXT_PAGE(level4_kernel_pgt)
393 .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
396 NEXT_PAGE(level3_kernel_pgt)
397 .fill L3_START_KERNEL,8,0
398 /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */
399 .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
400 .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
402 NEXT_PAGE(level2_kernel_pgt)
404 * 512 MB kernel mapping. We spend a full page on this pagetable
407 * The kernel code+data+bss must not be bigger than that.
409 * (NOTE: at +512MB starts the module area, see MODULES_VADDR.
410 * If you want to increase this then increase MODULES_VADDR
413 PMDS(0, __PAGE_KERNEL_LARGE_EXEC,
414 KERNEL_IMAGE_SIZE/PMD_SIZE)
416 NEXT_PAGE(level2_fixmap_pgt)
418 .quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
419 /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */
422 NEXT_PAGE(level1_fixmap_pgt)
429 .globl early_gdt_descr
431 .word GDT_ENTRIES*8-1
432 early_gdt_descr_base:
433 .quad INIT_PER_CPU_VAR(gdt_page)
436 /* This must match the first entry in level2_kernel_pgt */
437 .quad 0x0000000000000000
438 EXPORT_SYMBOL(phys_base)
440 #include "../../x86/xen/xen-head.S"
443 NEXT_PAGE(empty_zero_page)
445 EXPORT_SYMBOL(empty_zero_page)