arch/x86/kernel/hpet.c

   1 #include <linux/clocksource.h>
   2 #include <linux/clockchips.h>
   3 #include <linux/delay.h>
   4 #include <linux/errno.h>
   5 #include <linux/hpet.h>
   6 #include <linux/init.h>
   7 #include <linux/sysdev.h>
   8 #include <linux/pm.h>
   9 #include <linux/delay.h>
  10
  11 #include <asm/fixmap.h>
  12 #include <asm/hpet.h>
  13 #include <asm/i8253.h>
  14 #include <asm/io.h>
  15
  16 #define HPET_MASK       CLOCKSOURCE_MASK(32)
  17 #define HPET_SHIFT      22
  18
  19 /* FSEC = 10^-15 NSEC = 10^-9 */
  20 #define FSEC_PER_NSEC   1000000
  21
  22 /*
  23  * HPET address is set in acpi/boot.c, when an ACPI entry exists
  24  */
  25 unsigned long hpet_address;
  26 static void __iomem *hpet_virt_address;
  27
  28 unsigned long hpet_readl(unsigned long a)
  29 {
  30         return readl(hpet_virt_address + a);
  31 }
  32
  33 static inline void hpet_writel(unsigned long d, unsigned long a)
  34 {
  35         writel(d, hpet_virt_address + a);
  36 }
  37
  38 #ifdef CONFIG_X86_64
  39
  40 #include <asm/pgtable.h>
  41
  42 static inline void hpet_set_mapping(void)
  43 {
  44         set_fixmap_nocache(FIX_HPET_BASE, hpet_address);
  45         __set_fixmap(VSYSCALL_HPET, hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
  46         hpet_virt_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
  47 }
  48
  49 static inline void hpet_clear_mapping(void)
  50 {
  51         hpet_virt_address = NULL;
  52 }
  53
  54 #else
  55
  56 static inline void hpet_set_mapping(void)
  57 {
  58         hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
  59 }
  60
  61 static inline void hpet_clear_mapping(void)
  62 {
  63         iounmap(hpet_virt_address);
  64         hpet_virt_address = NULL;
  65 }
  66 #endif
  67
  68 /*
  69  * HPET command line enable / disable
  70  */
  71 static int boot_hpet_disable;
  72 int hpet_force_user;
  73
  74 static int __init hpet_setup(char* str)
  75 {
  76         if (str) {
  77                 if (!strncmp("disable", str, 7))
  78                         boot_hpet_disable = 1;
  79                 if (!strncmp("force", str, 5))
  80                         hpet_force_user = 1;
  81         }
  82         return 1;
  83 }
  84 __setup("hpet=", hpet_setup);
  85
  86 static int __init disable_hpet(char *str)
  87 {
  88         boot_hpet_disable = 1;
  89         return 1;
  90 }
  91 __setup("nohpet", disable_hpet);
  92
  93 static inline int is_hpet_capable(void)
  94 {
  95         return (!boot_hpet_disable && hpet_address);
  96 }
  97
  98 /*
  99  * HPET timer interrupt enable / disable
 100  */
 101 static int hpet_legacy_int_enabled;
 102
 103 /**
 104  * is_hpet_enabled - check whether the hpet timer interrupt is enabled
 105  */
 106 int is_hpet_enabled(void)
 107 {
 108         return is_hpet_capable() && hpet_legacy_int_enabled;
 109 }
 110
 111 /*
 112  * When the hpet driver (/dev/hpet) is enabled, we need to reserve
 113  * timer 0 and timer 1 in case of RTC emulation.
 114  */
 115 #ifdef CONFIG_HPET
 116 static void hpet_reserve_platform_timers(unsigned long id)
 117 {
 118         struct hpet __iomem *hpet = hpet_virt_address;
 119         struct hpet_timer __iomem *timer = &hpet->hpet_timers[2];
 120         unsigned int nrtimers, i;
 121         struct hpet_data hd;
 122
 123         nrtimers = ((id & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1;
 124
 125         memset(&hd, 0, sizeof (hd));
 126         hd.hd_phys_address = hpet_address;
 127         hd.hd_address = hpet;
 128         hd.hd_nirqs = nrtimers;
 129         hd.hd_flags = HPET_DATA_PLATFORM;
 130         hpet_reserve_timer(&hd, 0);
 131
 132 #ifdef CONFIG_HPET_EMULATE_RTC
 133         hpet_reserve_timer(&hd, 1);
 134 #endif
 135
 136         hd.hd_irq[0] = HPET_LEGACY_8254;
 137         hd.hd_irq[1] = HPET_LEGACY_RTC;
 138
 139         for (i = 2; i < nrtimers; timer++, i++)
 140                 hd.hd_irq[i] = (timer->hpet_config & Tn_INT_ROUTE_CNF_MASK) >>
 141                         Tn_INT_ROUTE_CNF_SHIFT;
 142
 143         hpet_alloc(&hd);
 144
 145 }
 146 #else
 147 static void hpet_reserve_platform_timers(unsigned long id) { }
 148 #endif
 149
 150 /*
 151  * Common hpet info
 152  */
 153 static unsigned long hpet_period;
 154
 155 static void hpet_legacy_set_mode(enum clock_event_mode mode,
 156                           struct clock_event_device *evt);
 157 static int hpet_legacy_next_event(unsigned long delta,
 158                            struct clock_event_device *evt);
 159
 160 /*
 161  * The hpet clock event device
 162  */
 163 static struct clock_event_device hpet_clockevent = {
 164         .name           = "hpet",
 165         .features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
 166         .set_mode       = hpet_legacy_set_mode,
 167         .set_next_event = hpet_legacy_next_event,
 168         .shift          = 32,
 169         .irq            = 0,
 170         .rating         = 50,
 171 };
 172
 173 static void hpet_start_counter(void)
 174 {
 175         unsigned long cfg = hpet_readl(HPET_CFG);
 176
 177         cfg &= ~HPET_CFG_ENABLE;
 178         hpet_writel(cfg, HPET_CFG);
 179         hpet_writel(0, HPET_COUNTER);
 180         hpet_writel(0, HPET_COUNTER + 4);
 181         cfg |= HPET_CFG_ENABLE;
 182         hpet_writel(cfg, HPET_CFG);
 183 }
 184
 185 static void hpet_resume_device(void)
 186 {
 187         force_hpet_resume();
 188 }
 189
 190 static void hpet_restart_counter(void)
 191 {
 192         hpet_resume_device();
 193         hpet_start_counter();
 194 }
 195
 196 static void hpet_enable_legacy_int(void)
 197 {
 198         unsigned long cfg = hpet_readl(HPET_CFG);
 199
 200         cfg |= HPET_CFG_LEGACY;
 201         hpet_writel(cfg, HPET_CFG);
 202         hpet_legacy_int_enabled = 1;
 203 }
 204
 205 static void hpet_legacy_clockevent_register(void)
 206 {
 207         uint64_t hpet_freq;
 208
 209         /* Start HPET legacy interrupts */
 210         hpet_enable_legacy_int();
 211
 212         /*
 213          * The period is a femto seconds value. We need to calculate the
 214          * scaled math multiplication factor for nanosecond to hpet tick
 215          * conversion.
 216          */
 217         hpet_freq = 1000000000000000ULL;
 218         do_div(hpet_freq, hpet_period);
 219         hpet_clockevent.mult = div_sc((unsigned long) hpet_freq,
 220                                       NSEC_PER_SEC, 32);
 221         /* Calculate the min / max delta */
 222         hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
 223                                                            &hpet_clockevent);
 224         hpet_clockevent.min_delta_ns = clockevent_delta2ns(0x30,
 225                                                            &hpet_clockevent);
 226
 227         /*
 228          * Start hpet with the boot cpu mask and make it
 229          * global after the IO_APIC has been initialized.
 230          */
 231         hpet_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
 232         clockevents_register_device(&hpet_clockevent);
 233         global_clock_event = &hpet_clockevent;
 234         printk(KERN_DEBUG "hpet clockevent registered\n");
 235 }
 236
 237 static void hpet_legacy_set_mode(enum clock_event_mode mode,
 238                           struct clock_event_device *evt)
 239 {
 240         unsigned long cfg, cmp, now;
 241         uint64_t delta;
 242
 243         switch(mode) {
 244         case CLOCK_EVT_MODE_PERIODIC:
 245                 delta = ((uint64_t)(NSEC_PER_SEC/HZ)) * hpet_clockevent.mult;
 246                 delta >>= hpet_clockevent.shift;
 247                 now = hpet_readl(HPET_COUNTER);
 248                 cmp = now + (unsigned long) delta;
 249                 cfg = hpet_readl(HPET_T0_CFG);
 250                 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
 251                        HPET_TN_SETVAL | HPET_TN_32BIT;
 252                 hpet_writel(cfg, HPET_T0_CFG);
 253                 /*
 254                  * The first write after writing TN_SETVAL to the
 255                  * config register sets the counter value, the second
 256                  * write sets the period.
 257                  */
 258                 hpet_writel(cmp, HPET_T0_CMP);
 259                 udelay(1);
 260                 hpet_writel((unsigned long) delta, HPET_T0_CMP);
 261                 break;
 262
 263         case CLOCK_EVT_MODE_ONESHOT:
 264                 cfg = hpet_readl(HPET_T0_CFG);
 265                 cfg &= ~HPET_TN_PERIODIC;
 266                 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
 267                 hpet_writel(cfg, HPET_T0_CFG);
 268                 break;
 269
 270         case CLOCK_EVT_MODE_UNUSED:
 271         case CLOCK_EVT_MODE_SHUTDOWN:
 272                 cfg = hpet_readl(HPET_T0_CFG);
 273                 cfg &= ~HPET_TN_ENABLE;
 274                 hpet_writel(cfg, HPET_T0_CFG);
 275                 break;
 276
 277         case CLOCK_EVT_MODE_RESUME:
 278                 hpet_enable_legacy_int();
 279                 break;
 280         }
 281 }
 282
 283 static int hpet_legacy_next_event(unsigned long delta,
 284                            struct clock_event_device *evt)
 285 {
 286         unsigned long cnt;
 287
 288         cnt = hpet_readl(HPET_COUNTER);
 289         cnt += delta;
 290         hpet_writel(cnt, HPET_T0_CMP);
 291
 292         return ((long)(hpet_readl(HPET_COUNTER) - cnt ) > 0) ? -ETIME : 0;
 293 }
 294
 295 /*
 296  * Clock source related code
 297  */
 298 static cycle_t read_hpet(void)
 299 {
 300         return (cycle_t)hpet_readl(HPET_COUNTER);
 301 }
 302
 303 #ifdef CONFIG_X86_64
 304 static cycle_t __vsyscall_fn vread_hpet(void)
 305 {
 306         return readl((const void __iomem *)fix_to_virt(VSYSCALL_HPET) + 0xf0);
 307 }
 308 #endif
 309
 310 static struct clocksource clocksource_hpet = {
 311         .name           = "hpet",
 312         .rating         = 250,
 313         .read           = read_hpet,
 314         .mask           = HPET_MASK,
 315         .shift          = HPET_SHIFT,
 316         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 317         .resume         = hpet_restart_counter,
 318 #ifdef CONFIG_X86_64
 319         .vread          = vread_hpet,
 320 #endif
 321 };
 322
 323 static int hpet_clocksource_register(void)
 324 {
 325         u64 tmp, start, now;
 326         cycle_t t1;
 327
 328         /* Start the counter */
 329         hpet_start_counter();
 330
 331         /* Verify whether hpet counter works */
 332         t1 = read_hpet();
 333         rdtscll(start);
 334
 335         /*
 336          * We don't know the TSC frequency yet, but waiting for
 337          * 200000 TSC cycles is safe:
 338          * 4 GHz == 50us
 339          * 1 GHz == 200us
 340          */
 341         do {
 342                 rep_nop();
 343                 rdtscll(now);
 344         } while ((now - start) < 200000UL);
 345
 346         if (t1 == read_hpet()) {
 347                 printk(KERN_WARNING
 348                        "HPET counter not counting. HPET disabled\n");
 349                 return -ENODEV;
 350         }
 351
 352         /* Initialize and register HPET clocksource
 353          *
 354          * hpet period is in femto seconds per cycle
 355          * so we need to convert this to ns/cyc units
 356          * aproximated by mult/2^shift
 357          *
 358          *  fsec/cyc * 1nsec/1000000fsec = nsec/cyc = mult/2^shift
 359          *  fsec/cyc * 1ns/1000000fsec * 2^shift = mult
 360          *  fsec/cyc * 2^shift * 1nsec/1000000fsec = mult
 361          *  (fsec/cyc << shift)/1000000 = mult
 362          *  (hpet_period << shift)/FSEC_PER_NSEC = mult
 363          */
 364         tmp = (u64)hpet_period << HPET_SHIFT;
 365         do_div(tmp, FSEC_PER_NSEC);
 366         clocksource_hpet.mult = (u32)tmp;
 367
 368         clocksource_register(&clocksource_hpet);
 369
 370         return 0;
 371 }
 372
 373 /*
 374  * Try to setup the HPET timer
 375  */
 376 int __init hpet_enable(void)
 377 {
 378         unsigned long id;
 379
 380         if (!is_hpet_capable())
 381                 return 0;
 382
 383         hpet_set_mapping();
 384
 385         /*
 386          * Read the period and check for a sane value:
 387          */
 388         hpet_period = hpet_readl(HPET_PERIOD);
 389         if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
 390                 goto out_nohpet;
 391
 392         /*
 393          * Read the HPET ID register to retrieve the IRQ routing
 394          * information and the number of channels
 395          */
 396         id = hpet_readl(HPET_ID);
 397
 398 #ifdef CONFIG_HPET_EMULATE_RTC
 399         /*
 400          * The legacy routing mode needs at least two channels, tick timer
 401          * and the rtc emulation channel.
 402          */
 403         if (!(id & HPET_ID_NUMBER))
 404                 goto out_nohpet;
 405 #endif
 406
 407         if (hpet_clocksource_register())
 408                 goto out_nohpet;
 409
 410         if (id & HPET_ID_LEGSUP) {
 411                 hpet_legacy_clockevent_register();
 412                 return 1;
 413         }
 414         return 0;
 415
 416 out_nohpet:
 417         hpet_clear_mapping();
 418         boot_hpet_disable = 1;
 419         return 0;
 420 }
 421
 422 /*
 423  * Needs to be late, as the reserve_timer code calls kalloc !
 424  *
 425  * Not a problem on i386 as hpet_enable is called from late_time_init,
 426  * but on x86_64 it is necessary !
 427  */
 428 static __init int hpet_late_init(void)
 429 {
 430         if (boot_hpet_disable)
 431                 return -ENODEV;
 432
 433         if (!hpet_address) {
 434                 if (!force_hpet_address)
 435                         return -ENODEV;
 436
 437                 hpet_address = force_hpet_address;
 438                 hpet_enable();
 439                 if (!hpet_virt_address)
 440                         return -ENODEV;
 441         }
 442
 443         hpet_reserve_platform_timers(hpet_readl(HPET_ID));
 444
 445         return 0;
 446 }
 447 fs_initcall(hpet_late_init);
 448
 449 #ifdef CONFIG_HPET_EMULATE_RTC
 450
 451 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
 452  * is enabled, we support RTC interrupt functionality in software.
 453  * RTC has 3 kinds of interrupts:
 454  * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
 455  *    is updated
 456  * 2) Alarm Interrupt - generate an interrupt at a specific time of day
 457  * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
 458  *    2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
 459  * (1) and (2) above are implemented using polling at a frequency of
 460  * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
 461  * overhead. (DEFAULT_RTC_INT_FREQ)
 462  * For (3), we use interrupts at 64Hz or user specified periodic
 463  * frequency, whichever is higher.
 464  */
 465 #include <linux/mc146818rtc.h>
 466 #include <linux/rtc.h>
 467
 468 #define DEFAULT_RTC_INT_FREQ    64
 469 #define DEFAULT_RTC_SHIFT       6
 470 #define RTC_NUM_INTS            1
 471
 472 static unsigned long hpet_rtc_flags;
 473 static unsigned long hpet_prev_update_sec;
 474 static struct rtc_time hpet_alarm_time;
 475 static unsigned long hpet_pie_count;
 476 static unsigned long hpet_t1_cmp;
 477 static unsigned long hpet_default_delta;
 478 static unsigned long hpet_pie_delta;
 479 static unsigned long hpet_pie_limit;
 480
 481 /*
 482  * Timer 1 for RTC emulation. We use one shot mode, as periodic mode
 483  * is not supported by all HPET implementations for timer 1.
 484  *
 485  * hpet_rtc_timer_init() is called when the rtc is initialized.
 486  */
 487 int hpet_rtc_timer_init(void)
 488 {
 489         unsigned long cfg, cnt, delta, flags;
 490
 491         if (!is_hpet_enabled())
 492                 return 0;
 493
 494         if (!hpet_default_delta) {
 495                 uint64_t clc;
 496
 497                 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
 498                 clc >>= hpet_clockevent.shift + DEFAULT_RTC_SHIFT;
 499                 hpet_default_delta = (unsigned long) clc;
 500         }
 501
 502         if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
 503                 delta = hpet_default_delta;
 504         else
 505                 delta = hpet_pie_delta;
 506
 507         local_irq_save(flags);
 508
 509         cnt = delta + hpet_readl(HPET_COUNTER);
 510         hpet_writel(cnt, HPET_T1_CMP);
 511         hpet_t1_cmp = cnt;
 512
 513         cfg = hpet_readl(HPET_T1_CFG);
 514         cfg &= ~HPET_TN_PERIODIC;
 515         cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
 516         hpet_writel(cfg, HPET_T1_CFG);
 517
 518         local_irq_restore(flags);
 519
 520         return 1;
 521 }
 522
 523 /*
 524  * The functions below are called from rtc driver.
 525  * Return 0 if HPET is not being used.
 526  * Otherwise do the necessary changes and return 1.
 527  */
 528 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
 529 {
 530         if (!is_hpet_enabled())
 531                 return 0;
 532
 533         hpet_rtc_flags &= ~bit_mask;
 534         return 1;
 535 }
 536
 537 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
 538 {
 539         unsigned long oldbits = hpet_rtc_flags;
 540
 541         if (!is_hpet_enabled())
 542                 return 0;
 543
 544         hpet_rtc_flags |= bit_mask;
 545
 546         if (!oldbits)
 547                 hpet_rtc_timer_init();
 548
 549         return 1;
 550 }
 551
 552 int hpet_set_alarm_time(unsigned char hrs, unsigned char min,
 553                         unsigned char sec)
 554 {
 555         if (!is_hpet_enabled())
 556                 return 0;
 557
 558         hpet_alarm_time.tm_hour = hrs;
 559         hpet_alarm_time.tm_min = min;
 560         hpet_alarm_time.tm_sec = sec;
 561
 562         return 1;
 563 }
 564
 565 int hpet_set_periodic_freq(unsigned long freq)
 566 {
 567         uint64_t clc;
 568
 569         if (!is_hpet_enabled())
 570                 return 0;
 571
 572         if (freq <= DEFAULT_RTC_INT_FREQ)
 573                 hpet_pie_limit = DEFAULT_RTC_INT_FREQ / freq;
 574         else {
 575                 clc = (uint64_t) hpet_clockevent.mult * NSEC_PER_SEC;
 576                 do_div(clc, freq);
 577                 clc >>= hpet_clockevent.shift;
 578                 hpet_pie_delta = (unsigned long) clc;
 579         }
 580         return 1;
 581 }
 582
 583 int hpet_rtc_dropped_irq(void)
 584 {
 585         return is_hpet_enabled();
 586 }
 587
 588 static void hpet_rtc_timer_reinit(void)
 589 {
 590         unsigned long cfg, delta;
 591         int lost_ints = -1;
 592
 593         if (unlikely(!hpet_rtc_flags)) {
 594                 cfg = hpet_readl(HPET_T1_CFG);
 595                 cfg &= ~HPET_TN_ENABLE;
 596                 hpet_writel(cfg, HPET_T1_CFG);
 597                 return;
 598         }
 599
 600         if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
 601                 delta = hpet_default_delta;
 602         else
 603                 delta = hpet_pie_delta;
 604
 605         /*
 606          * Increment the comparator value until we are ahead of the
 607          * current count.
 608          */
 609         do {
 610                 hpet_t1_cmp += delta;
 611                 hpet_writel(hpet_t1_cmp, HPET_T1_CMP);
 612                 lost_ints++;
 613         } while ((long)(hpet_readl(HPET_COUNTER) - hpet_t1_cmp) > 0);
 614
 615         if (lost_ints) {
 616                 if (hpet_rtc_flags & RTC_PIE)
 617                         hpet_pie_count += lost_ints;
 618                 if (printk_ratelimit())
 619                         printk(KERN_WARNING "rtc: lost %d interrupts\n",
 620                                 lost_ints);
 621         }
 622 }
 623
 624 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
 625 {
 626         struct rtc_time curr_time;
 627         unsigned long rtc_int_flag = 0;
 628
 629         hpet_rtc_timer_reinit();
 630
 631         if (hpet_rtc_flags & (RTC_UIE | RTC_AIE))
 632                 rtc_get_rtc_time(&curr_time);
 633
 634         if (hpet_rtc_flags & RTC_UIE &&
 635             curr_time.tm_sec != hpet_prev_update_sec) {
 636                 rtc_int_flag = RTC_UF;
 637                 hpet_prev_update_sec = curr_time.tm_sec;
 638         }
 639
 640         if (hpet_rtc_flags & RTC_PIE &&
 641             ++hpet_pie_count >= hpet_pie_limit) {
 642                 rtc_int_flag |= RTC_PF;
 643                 hpet_pie_count = 0;
 644         }
 645
 646         if (hpet_rtc_flags & RTC_PIE &&
 647             (curr_time.tm_sec == hpet_alarm_time.tm_sec) &&
 648             (curr_time.tm_min == hpet_alarm_time.tm_min) &&
 649             (curr_time.tm_hour == hpet_alarm_time.tm_hour))
 650                         rtc_int_flag |= RTC_AF;
 651
 652         if (rtc_int_flag) {
 653                 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
 654                 rtc_interrupt(rtc_int_flag, dev_id);
 655         }
 656         return IRQ_HANDLED;
 657 }
 658 #endif