arch/x86/kernel/hw_breakpoint.c

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License as published by
   4  * the Free Software Foundation; either version 2 of the License, or
   5  * (at your option) any later version.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  15  *
  16  * Copyright (C) 2007 Alan Stern
  17  * Copyright (C) 2009 IBM Corporation
  18  * Copyright (C) 2009 Frederic Weisbecker <fweisbec@gmail.com>
  19  *
  20  * Authors: Alan Stern <stern@rowland.harvard.edu>
  21  *          K.Prasad <prasad@linux.vnet.ibm.com>
  22  *          Frederic Weisbecker <fweisbec@gmail.com>
  23  */
  24
  25 /*
  26  * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
  27  * using the CPU's debug registers.
  28  */
  29
  30 #include <linux/perf_event.h>
  31 #include <linux/hw_breakpoint.h>
  32 #include <linux/irqflags.h>
  33 #include <linux/notifier.h>
  34 #include <linux/kallsyms.h>
  35 #include <linux/kprobes.h>
  36 #include <linux/percpu.h>
  37 #include <linux/kdebug.h>
  38 #include <linux/kernel.h>
  39 #include <linux/module.h>
  40 #include <linux/sched.h>
  41 #include <linux/init.h>
  42 #include <linux/smp.h>
  43
  44 #include <asm/hw_breakpoint.h>
  45 #include <asm/processor.h>
  46 #include <asm/debugreg.h>
  47
  48 /* Per cpu debug control register value */
  49 DEFINE_PER_CPU(unsigned long, cpu_dr7);
  50 EXPORT_PER_CPU_SYMBOL(cpu_dr7);
  51
  52 /* Per cpu debug address registers values */
  53 static DEFINE_PER_CPU(unsigned long, cpu_debugreg[HBP_NUM]);
  54
  55 /*
  56  * Stores the breakpoints currently in use on each breakpoint address
  57  * register for each cpus
  58  */
  59 static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
  60
  61
  62 static inline unsigned long
  63 __encode_dr7(int drnum, unsigned int len, unsigned int type)
  64 {
  65         unsigned long bp_info;
  66
  67         bp_info = (len | type) & 0xf;
  68         bp_info <<= (DR_CONTROL_SHIFT + drnum * DR_CONTROL_SIZE);
  69         bp_info |= (DR_GLOBAL_ENABLE << (drnum * DR_ENABLE_SIZE));
  70
  71         return bp_info;
  72 }
  73
  74 /*
  75  * Encode the length, type, Exact, and Enable bits for a particular breakpoint
  76  * as stored in debug register 7.
  77  */
  78 unsigned long encode_dr7(int drnum, unsigned int len, unsigned int type)
  79 {
  80         return __encode_dr7(drnum, len, type) | DR_GLOBAL_SLOWDOWN;
  81 }
  82
  83 /*
  84  * Decode the length and type bits for a particular breakpoint as
  85  * stored in debug register 7.  Return the "enabled" status.
  86  */
  87 int decode_dr7(unsigned long dr7, int bpnum, unsigned *len, unsigned *type)
  88 {
  89         int bp_info = dr7 >> (DR_CONTROL_SHIFT + bpnum * DR_CONTROL_SIZE);
  90
  91         *len = (bp_info & 0xc) | 0x40;
  92         *type = (bp_info & 0x3) | 0x80;
  93
  94         return (dr7 >> (bpnum * DR_ENABLE_SIZE)) & 0x3;
  95 }
  96
  97 /*
  98  * Install a perf counter breakpoint.
  99  *
 100  * We seek a free debug address register and use it for this
 101  * breakpoint. Eventually we enable it in the debug control register.
 102  *
 103  * Atomic: we hold the counter->ctx->lock and we only handle variables
 104  * and registers local to this cpu.
 105  */
 106 int arch_install_hw_breakpoint(struct perf_event *bp)
 107 {
 108         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
 109         unsigned long *dr7;
 110         int i;
 111
 112         for (i = 0; i < HBP_NUM; i++) {
 113                 struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
 114
 115                 if (!*slot) {
 116                         *slot = bp;
 117                         break;
 118                 }
 119         }
 120
 121         if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
 122                 return -EBUSY;
 123
 124         set_debugreg(info->address, i);
 125         __get_cpu_var(cpu_debugreg[i]) = info->address;
 126
 127         dr7 = &__get_cpu_var(cpu_dr7);
 128         *dr7 |= encode_dr7(i, info->len, info->type);
 129
 130         set_debugreg(*dr7, 7);
 131
 132         return 0;
 133 }
 134
 135 /*
 136  * Uninstall the breakpoint contained in the given counter.
 137  *
 138  * First we search the debug address register it uses and then we disable
 139  * it.
 140  *
 141  * Atomic: we hold the counter->ctx->lock and we only handle variables
 142  * and registers local to this cpu.
 143  */
 144 void arch_uninstall_hw_breakpoint(struct perf_event *bp)
 145 {
 146         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
 147         unsigned long *dr7;
 148         int i;
 149
 150         for (i = 0; i < HBP_NUM; i++) {
 151                 struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
 152
 153                 if (*slot == bp) {
 154                         *slot = NULL;
 155                         break;
 156                 }
 157         }
 158
 159         if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
 160                 return;
 161
 162         dr7 = &__get_cpu_var(cpu_dr7);
 163         *dr7 &= ~__encode_dr7(i, info->len, info->type);
 164
 165         set_debugreg(*dr7, 7);
 166 }
 167
 168 static int get_hbp_len(u8 hbp_len)
 169 {
 170         unsigned int len_in_bytes = 0;
 171
 172         switch (hbp_len) {
 173         case X86_BREAKPOINT_LEN_1:
 174                 len_in_bytes = 1;
 175                 break;
 176         case X86_BREAKPOINT_LEN_2:
 177                 len_in_bytes = 2;
 178                 break;
 179         case X86_BREAKPOINT_LEN_4:
 180                 len_in_bytes = 4;
 181                 break;
 182 #ifdef CONFIG_X86_64
 183         case X86_BREAKPOINT_LEN_8:
 184                 len_in_bytes = 8;
 185                 break;
 186 #endif
 187         }
 188         return len_in_bytes;
 189 }
 190
 191 /*
 192  * Check for virtual address in user space.
 193  */
 194 int arch_check_va_in_userspace(unsigned long va, u8 hbp_len)
 195 {
 196         unsigned int len;
 197
 198         len = get_hbp_len(hbp_len);
 199
 200         return (va <= TASK_SIZE - len);
 201 }
 202
 203 /*
 204  * Check for virtual address in kernel space.
 205  */
 206 static int arch_check_va_in_kernelspace(unsigned long va, u8 hbp_len)
 207 {
 208         unsigned int len;
 209
 210         len = get_hbp_len(hbp_len);
 211
 212         return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
 213 }
 214
 215 int arch_bp_generic_fields(int x86_len, int x86_type,
 216                            int *gen_len, int *gen_type)
 217 {
 218         /* Len */
 219         switch (x86_len) {
 220         case X86_BREAKPOINT_LEN_1:
 221                 *gen_len = HW_BREAKPOINT_LEN_1;
 222                 break;
 223         case X86_BREAKPOINT_LEN_2:
 224                 *gen_len = HW_BREAKPOINT_LEN_2;
 225                 break;
 226         case X86_BREAKPOINT_LEN_4:
 227                 *gen_len = HW_BREAKPOINT_LEN_4;
 228                 break;
 229 #ifdef CONFIG_X86_64
 230         case X86_BREAKPOINT_LEN_8:
 231                 *gen_len = HW_BREAKPOINT_LEN_8;
 232                 break;
 233 #endif
 234         default:
 235                 return -EINVAL;
 236         }
 237
 238         /* Type */
 239         switch (x86_type) {
 240         case X86_BREAKPOINT_EXECUTE:
 241                 *gen_type = HW_BREAKPOINT_X;
 242                 break;
 243         case X86_BREAKPOINT_WRITE:
 244                 *gen_type = HW_BREAKPOINT_W;
 245                 break;
 246         case X86_BREAKPOINT_RW:
 247                 *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
 248                 break;
 249         default:
 250                 return -EINVAL;
 251         }
 252
 253         return 0;
 254 }
 255
 256
 257 static int arch_build_bp_info(struct perf_event *bp)
 258 {
 259         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
 260
 261         info->address = bp->attr.bp_addr;
 262
 263         /* Len */
 264         switch (bp->attr.bp_len) {
 265         case HW_BREAKPOINT_LEN_1:
 266                 info->len = X86_BREAKPOINT_LEN_1;
 267                 break;
 268         case HW_BREAKPOINT_LEN_2:
 269                 info->len = X86_BREAKPOINT_LEN_2;
 270                 break;
 271         case HW_BREAKPOINT_LEN_4:
 272                 info->len = X86_BREAKPOINT_LEN_4;
 273                 break;
 274 #ifdef CONFIG_X86_64
 275         case HW_BREAKPOINT_LEN_8:
 276                 info->len = X86_BREAKPOINT_LEN_8;
 277                 break;
 278 #endif
 279         default:
 280                 return -EINVAL;
 281         }
 282
 283         /* Type */
 284         switch (bp->attr.bp_type) {
 285         case HW_BREAKPOINT_W:
 286                 info->type = X86_BREAKPOINT_WRITE;
 287                 break;
 288         case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
 289                 info->type = X86_BREAKPOINT_RW;
 290                 break;
 291         case HW_BREAKPOINT_X:
 292                 info->type = X86_BREAKPOINT_EXECUTE;
 293                 break;
 294         default:
 295                 return -EINVAL;
 296         }
 297
 298         return 0;
 299 }
 300 /*
 301  * Validate the arch-specific HW Breakpoint register settings
 302  */
 303 int arch_validate_hwbkpt_settings(struct perf_event *bp,
 304                                   struct task_struct *tsk)
 305 {
 306         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
 307         unsigned int align;
 308         int ret;
 309
 310
 311         ret = arch_build_bp_info(bp);
 312         if (ret)
 313                 return ret;
 314
 315         ret = -EINVAL;
 316
 317         if (info->type == X86_BREAKPOINT_EXECUTE)
 318                 /*
 319                  * Ptrace-refactoring code
 320                  * For now, we'll allow instruction breakpoint only for user-space
 321                  * addresses
 322                  */
 323                 if ((!arch_check_va_in_userspace(info->address, info->len)) &&
 324                         info->len != X86_BREAKPOINT_EXECUTE)
 325                         return ret;
 326
 327         switch (info->len) {
 328         case X86_BREAKPOINT_LEN_1:
 329                 align = 0;
 330                 break;
 331         case X86_BREAKPOINT_LEN_2:
 332                 align = 1;
 333                 break;
 334         case X86_BREAKPOINT_LEN_4:
 335                 align = 3;
 336                 break;
 337 #ifdef CONFIG_X86_64
 338         case X86_BREAKPOINT_LEN_8:
 339                 align = 7;
 340                 break;
 341 #endif
 342         default:
 343                 return ret;
 344         }
 345
 346         /*
 347          * Check that the low-order bits of the address are appropriate
 348          * for the alignment implied by len.
 349          */
 350         if (info->address & align)
 351                 return -EINVAL;
 352
 353         /* Check that the virtual address is in the proper range */
 354         if (tsk) {
 355                 if (!arch_check_va_in_userspace(info->address, info->len))
 356                         return -EFAULT;
 357         } else {
 358                 if (!arch_check_va_in_kernelspace(info->address, info->len))
 359                         return -EFAULT;
 360         }
 361
 362         return 0;
 363 }
 364
 365 /*
 366  * Dump the debug register contents to the user.
 367  * We can't dump our per cpu values because it
 368  * may contain cpu wide breakpoint, something that
 369  * doesn't belong to the current task.
 370  *
 371  * TODO: include non-ptrace user breakpoints (perf)
 372  */
 373 void aout_dump_debugregs(struct user *dump)
 374 {
 375         int i;
 376         int dr7 = 0;
 377         struct perf_event *bp;
 378         struct arch_hw_breakpoint *info;
 379         struct thread_struct *thread = &current->thread;
 380
 381         for (i = 0; i < HBP_NUM; i++) {
 382                 bp = thread->ptrace_bps[i];
 383
 384                 if (bp && !bp->attr.disabled) {
 385                         dump->u_debugreg[i] = bp->attr.bp_addr;
 386                         info = counter_arch_bp(bp);
 387                         dr7 |= encode_dr7(i, info->len, info->type);
 388                 } else {
 389                         dump->u_debugreg[i] = 0;
 390                 }
 391         }
 392
 393         dump->u_debugreg[4] = 0;
 394         dump->u_debugreg[5] = 0;
 395         dump->u_debugreg[6] = current->thread.debugreg6;
 396
 397         dump->u_debugreg[7] = dr7;
 398 }
 399 EXPORT_SYMBOL_GPL(aout_dump_debugregs);
 400
 401 /*
 402  * Release the user breakpoints used by ptrace
 403  */
 404 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
 405 {
 406         int i;
 407         struct thread_struct *t = &tsk->thread;
 408
 409         for (i = 0; i < HBP_NUM; i++) {
 410                 unregister_hw_breakpoint(t->ptrace_bps[i]);
 411                 t->ptrace_bps[i] = NULL;
 412         }
 413 }
 414
 415 void hw_breakpoint_restore(void)
 416 {
 417         set_debugreg(__get_cpu_var(cpu_debugreg[0]), 0);
 418         set_debugreg(__get_cpu_var(cpu_debugreg[1]), 1);
 419         set_debugreg(__get_cpu_var(cpu_debugreg[2]), 2);
 420         set_debugreg(__get_cpu_var(cpu_debugreg[3]), 3);
 421         set_debugreg(current->thread.debugreg6, 6);
 422         set_debugreg(__get_cpu_var(cpu_dr7), 7);
 423 }
 424 EXPORT_SYMBOL_GPL(hw_breakpoint_restore);
 425
 426 /*
 427  * Handle debug exception notifications.
 428  *
 429  * Return value is either NOTIFY_STOP or NOTIFY_DONE as explained below.
 430  *
 431  * NOTIFY_DONE returned if one of the following conditions is true.
 432  * i) When the causative address is from user-space and the exception
 433  * is a valid one, i.e. not triggered as a result of lazy debug register
 434  * switching
 435  * ii) When there are more bits than trap<n> set in DR6 register (such
 436  * as BD, BS or BT) indicating that more than one debug condition is
 437  * met and requires some more action in do_debug().
 438  *
 439  * NOTIFY_STOP returned for all other cases
 440  *
 441  */
 442 static int __kprobes hw_breakpoint_handler(struct die_args *args)
 443 {
 444         int i, cpu, rc = NOTIFY_STOP;
 445         struct perf_event *bp;
 446         unsigned long dr7, dr6;
 447         unsigned long *dr6_p;
 448
 449         /* The DR6 value is pointed by args->err */
 450         dr6_p = (unsigned long *)ERR_PTR(args->err);
 451         dr6 = *dr6_p;
 452
 453         /* Do an early return if no trap bits are set in DR6 */
 454         if ((dr6 & DR_TRAP_BITS) == 0)
 455                 return NOTIFY_DONE;
 456
 457         get_debugreg(dr7, 7);
 458         /* Disable breakpoints during exception handling */
 459         set_debugreg(0UL, 7);
 460         /*
 461          * Assert that local interrupts are disabled
 462          * Reset the DRn bits in the virtualized register value.
 463          * The ptrace trigger routine will add in whatever is needed.
 464          */
 465         current->thread.debugreg6 &= ~DR_TRAP_BITS;
 466         cpu = get_cpu();
 467
 468         /* Handle all the breakpoints that were triggered */
 469         for (i = 0; i < HBP_NUM; ++i) {
 470                 if (likely(!(dr6 & (DR_TRAP0 << i))))
 471                         continue;
 472
 473                 /*
 474                  * The counter may be concurrently released but that can only
 475                  * occur from a call_rcu() path. We can then safely fetch
 476                  * the breakpoint, use its callback, touch its counter
 477                  * while we are in an rcu_read_lock() path.
 478                  */
 479                 rcu_read_lock();
 480
 481                 bp = per_cpu(bp_per_reg[i], cpu);
 482                 /*
 483                  * Reset the 'i'th TRAP bit in dr6 to denote completion of
 484                  * exception handling
 485                  */
 486                 (*dr6_p) &= ~(DR_TRAP0 << i);
 487                 /*
 488                  * bp can be NULL due to lazy debug register switching
 489                  * or due to concurrent perf counter removing.
 490                  */
 491                 if (!bp) {
 492                         rcu_read_unlock();
 493                         break;
 494                 }
 495
 496                 perf_bp_event(bp, args->regs);
 497
 498                 rcu_read_unlock();
 499         }
 500         /*
 501          * Further processing in do_debug() is needed for a) user-space
 502          * breakpoints (to generate signals) and b) when the system has
 503          * taken exception due to multiple causes
 504          */
 505         if ((current->thread.debugreg6 & DR_TRAP_BITS) ||
 506             (dr6 & (~DR_TRAP_BITS)))
 507                 rc = NOTIFY_DONE;
 508
 509         set_debugreg(dr7, 7);
 510         put_cpu();
 511
 512         return rc;
 513 }
 514
 515 /*
 516  * Handle debug exception notifications.
 517  */
 518 int __kprobes hw_breakpoint_exceptions_notify(
 519                 struct notifier_block *unused, unsigned long val, void *data)
 520 {
 521         if (val != DIE_DEBUG)
 522                 return NOTIFY_DONE;
 523
 524         return hw_breakpoint_handler(data);
 525 }
 526
 527 void hw_breakpoint_pmu_read(struct perf_event *bp)
 528 {
 529         /* TODO */
 530 }