arch/x86/kernel/i387.c

   1 /*
   2  *  Copyright (C) 1994 Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *  General FPU state handling cleanups
   6  *      Gareth Hughes <gareth@valinux.com>, May 2000
   7  */
   8 #include <linux/module.h>
   9 #include <linux/regset.h>
  10 #include <linux/sched.h>
  11 #include <linux/slab.h>
  12
  13 #include <asm/sigcontext.h>
  14 #include <asm/processor.h>
  15 #include <asm/math_emu.h>
  16 #include <asm/uaccess.h>
  17 #include <asm/ptrace.h>
  18 #include <asm/i387.h>
  19 #include <asm/fpu-internal.h>
  20 #include <asm/user.h>
  21
  22 /*
  23  * Were we in an interrupt that interrupted kernel mode?
  24  *
  25  * For now, on xsave platforms we will return interrupted
  26  * kernel FPU as not-idle. TBD: As we use non-lazy FPU restore
  27  * for xsave platforms, ideally we can change the return value
  28  * to something like __thread_has_fpu(current). But we need to
  29  * be careful of doing __thread_clear_has_fpu() before saving
  30  * the FPU etc for supporting nested uses etc. For now, take
  31  * the simple route!
  32  *
  33  * On others, we can do a kernel_fpu_begin/end() pair *ONLY* if that
  34  * pair does nothing at all: the thread must not have fpu (so
  35  * that we don't try to save the FPU state), and TS must
  36  * be set (so that the clts/stts pair does nothing that is
  37  * visible in the interrupted kernel thread).
  38  */
  39 static inline bool interrupted_kernel_fpu_idle(void)
  40 {
  41         if (use_xsave())
  42                 return 0;
  43
  44         return !__thread_has_fpu(current) &&
  45                 (read_cr0() & X86_CR0_TS);
  46 }
  47
  48 /*
  49  * Were we in user mode (or vm86 mode) when we were
  50  * interrupted?
  51  *
  52  * Doing kernel_fpu_begin/end() is ok if we are running
  53  * in an interrupt context from user mode - we'll just
  54  * save the FPU state as required.
  55  */
  56 static inline bool interrupted_user_mode(void)
  57 {
  58         struct pt_regs *regs = get_irq_regs();
  59         return regs && user_mode_vm(regs);
  60 }
  61
  62 /*
  63  * Can we use the FPU in kernel mode with the
  64  * whole "kernel_fpu_begin/end()" sequence?
  65  *
  66  * It's always ok in process context (ie "not interrupt")
  67  * but it is sometimes ok even from an irq.
  68  */
  69 bool irq_fpu_usable(void)
  70 {
  71         return !in_interrupt() ||
  72                 interrupted_user_mode() ||
  73                 interrupted_kernel_fpu_idle();
  74 }
  75 EXPORT_SYMBOL(irq_fpu_usable);
  76
  77 void kernel_fpu_begin(void)
  78 {
  79         struct task_struct *me = current;
  80
  81         WARN_ON_ONCE(!irq_fpu_usable());
  82         preempt_disable();
  83         if (__thread_has_fpu(me)) {
  84                 __save_init_fpu(me);
  85                 __thread_clear_has_fpu(me);
  86                 /* We do 'stts()' in kernel_fpu_end() */
  87         } else if (!use_xsave()) {
  88                 this_cpu_write(fpu_owner_task, NULL);
  89                 clts();
  90         }
  91 }
  92 EXPORT_SYMBOL(kernel_fpu_begin);
  93
  94 void kernel_fpu_end(void)
  95 {
  96         if (use_xsave())
  97                 math_state_restore();
  98         else
  99                 stts();
 100         preempt_enable();
 101 }
 102 EXPORT_SYMBOL(kernel_fpu_end);
 103
 104 void unlazy_fpu(struct task_struct *tsk)
 105 {
 106         preempt_disable();
 107         if (__thread_has_fpu(tsk)) {
 108                 __save_init_fpu(tsk);
 109                 __thread_fpu_end(tsk);
 110         } else
 111                 tsk->fpu_counter = 0;
 112         preempt_enable();
 113 }
 114 EXPORT_SYMBOL(unlazy_fpu);
 115
 116 unsigned int mxcsr_feature_mask __read_mostly = 0xffffffffu;
 117 unsigned int xstate_size;
 118 EXPORT_SYMBOL_GPL(xstate_size);
 119 static struct i387_fxsave_struct fx_scratch __cpuinitdata;
 120
 121 static void __cpuinit mxcsr_feature_mask_init(void)
 122 {
 123         unsigned long mask = 0;
 124
 125         clts();
 126         if (cpu_has_fxsr) {
 127                 memset(&fx_scratch, 0, sizeof(struct i387_fxsave_struct));
 128                 asm volatile("fxsave %0" : : "m" (fx_scratch));
 129                 mask = fx_scratch.mxcsr_mask;
 130                 if (mask == 0)
 131                         mask = 0x0000ffbf;
 132         }
 133         mxcsr_feature_mask &= mask;
 134         stts();
 135 }
 136
 137 static void __cpuinit init_thread_xstate(void)
 138 {
 139         /*
 140          * Note that xstate_size might be overwriten later during
 141          * xsave_init().
 142          */
 143
 144         if (!HAVE_HWFP) {
 145                 /*
 146                  * Disable xsave as we do not support it if i387
 147                  * emulation is enabled.
 148                  */
 149                 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
 150                 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
 151                 xstate_size = sizeof(struct i387_soft_struct);
 152                 return;
 153         }
 154
 155         if (cpu_has_fxsr)
 156                 xstate_size = sizeof(struct i387_fxsave_struct);
 157         else
 158                 xstate_size = sizeof(struct i387_fsave_struct);
 159 }
 160
 161 /*
 162  * Called at bootup to set up the initial FPU state that is later cloned
 163  * into all processes.
 164  */
 165
 166 void __cpuinit fpu_init(void)
 167 {
 168         unsigned long cr0;
 169         unsigned long cr4_mask = 0;
 170
 171         if (cpu_has_fxsr)
 172                 cr4_mask |= X86_CR4_OSFXSR;
 173         if (cpu_has_xmm)
 174                 cr4_mask |= X86_CR4_OSXMMEXCPT;
 175         if (cr4_mask)
 176                 set_in_cr4(cr4_mask);
 177
 178         cr0 = read_cr0();
 179         cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */
 180         if (!HAVE_HWFP)
 181                 cr0 |= X86_CR0_EM;
 182         write_cr0(cr0);
 183
 184         if (!smp_processor_id())
 185                 init_thread_xstate();
 186
 187         mxcsr_feature_mask_init();
 188         /* clean state in init */
 189         current_thread_info()->status = 0;
 190         clear_used_math();
 191 }
 192
 193 void fpu_finit(struct fpu *fpu)
 194 {
 195         if (!HAVE_HWFP) {
 196                 finit_soft_fpu(&fpu->state->soft);
 197                 return;
 198         }
 199
 200         if (cpu_has_fxsr) {
 201                 struct i387_fxsave_struct *fx = &fpu->state->fxsave;
 202
 203                 memset(fx, 0, xstate_size);
 204                 fx->cwd = 0x37f;
 205                 if (cpu_has_xmm)
 206                         fx->mxcsr = MXCSR_DEFAULT;
 207         } else {
 208                 struct i387_fsave_struct *fp = &fpu->state->fsave;
 209                 memset(fp, 0, xstate_size);
 210                 fp->cwd = 0xffff037fu;
 211                 fp->swd = 0xffff0000u;
 212                 fp->twd = 0xffffffffu;
 213                 fp->fos = 0xffff0000u;
 214         }
 215 }
 216 EXPORT_SYMBOL_GPL(fpu_finit);
 217
 218 /*
 219  * The _current_ task is using the FPU for the first time
 220  * so initialize it and set the mxcsr to its default
 221  * value at reset if we support XMM instructions and then
 222  * remember the current task has used the FPU.
 223  */
 224 int init_fpu(struct task_struct *tsk)
 225 {
 226         int ret;
 227
 228         if (tsk_used_math(tsk)) {
 229                 if (HAVE_HWFP && tsk == current)
 230                         unlazy_fpu(tsk);
 231                 tsk->thread.fpu.last_cpu = ~0;
 232                 return 0;
 233         }
 234
 235         /*
 236          * Memory allocation at the first usage of the FPU and other state.
 237          */
 238         ret = fpu_alloc(&tsk->thread.fpu);
 239         if (ret)
 240                 return ret;
 241
 242         fpu_finit(&tsk->thread.fpu);
 243
 244         set_stopped_child_used_math(tsk);
 245         return 0;
 246 }
 247 EXPORT_SYMBOL_GPL(init_fpu);
 248
 249 /*
 250  * The xstateregs_active() routine is the same as the fpregs_active() routine,
 251  * as the "regset->n" for the xstate regset will be updated based on the feature
 252  * capabilites supported by the xsave.
 253  */
 254 int fpregs_active(struct task_struct *target, const struct user_regset *regset)
 255 {
 256         return tsk_used_math(target) ? regset->n : 0;
 257 }
 258
 259 int xfpregs_active(struct task_struct *target, const struct user_regset *regset)
 260 {
 261         return (cpu_has_fxsr && tsk_used_math(target)) ? regset->n : 0;
 262 }
 263
 264 int xfpregs_get(struct task_struct *target, const struct user_regset *regset,
 265                 unsigned int pos, unsigned int count,
 266                 void *kbuf, void __user *ubuf)
 267 {
 268         int ret;
 269
 270         if (!cpu_has_fxsr)
 271                 return -ENODEV;
 272
 273         ret = init_fpu(target);
 274         if (ret)
 275                 return ret;
 276
 277         sanitize_i387_state(target);
 278
 279         return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 280                                    &target->thread.fpu.state->fxsave, 0, -1);
 281 }
 282
 283 int xfpregs_set(struct task_struct *target, const struct user_regset *regset,
 284                 unsigned int pos, unsigned int count,
 285                 const void *kbuf, const void __user *ubuf)
 286 {
 287         int ret;
 288
 289         if (!cpu_has_fxsr)
 290                 return -ENODEV;
 291
 292         ret = init_fpu(target);
 293         if (ret)
 294                 return ret;
 295
 296         sanitize_i387_state(target);
 297
 298         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 299                                  &target->thread.fpu.state->fxsave, 0, -1);
 300
 301         /*
 302          * mxcsr reserved bits must be masked to zero for security reasons.
 303          */
 304         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 305
 306         /*
 307          * update the header bits in the xsave header, indicating the
 308          * presence of FP and SSE state.
 309          */
 310         if (cpu_has_xsave)
 311                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FPSSE;
 312
 313         return ret;
 314 }
 315
 316 int xstateregs_get(struct task_struct *target, const struct user_regset *regset,
 317                 unsigned int pos, unsigned int count,
 318                 void *kbuf, void __user *ubuf)
 319 {
 320         int ret;
 321
 322         if (!cpu_has_xsave)
 323                 return -ENODEV;
 324
 325         ret = init_fpu(target);
 326         if (ret)
 327                 return ret;
 328
 329         /*
 330          * Copy the 48bytes defined by the software first into the xstate
 331          * memory layout in the thread struct, so that we can copy the entire
 332          * xstateregs to the user using one user_regset_copyout().
 333          */
 334         memcpy(&target->thread.fpu.state->fxsave.sw_reserved,
 335                xstate_fx_sw_bytes, sizeof(xstate_fx_sw_bytes));
 336
 337         /*
 338          * Copy the xstate memory layout.
 339          */
 340         ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 341                                   &target->thread.fpu.state->xsave, 0, -1);
 342         return ret;
 343 }
 344
 345 int xstateregs_set(struct task_struct *target, const struct user_regset *regset,
 346                   unsigned int pos, unsigned int count,
 347                   const void *kbuf, const void __user *ubuf)
 348 {
 349         int ret;
 350         struct xsave_hdr_struct *xsave_hdr;
 351
 352         if (!cpu_has_xsave)
 353                 return -ENODEV;
 354
 355         ret = init_fpu(target);
 356         if (ret)
 357                 return ret;
 358
 359         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 360                                  &target->thread.fpu.state->xsave, 0, -1);
 361
 362         /*
 363          * mxcsr reserved bits must be masked to zero for security reasons.
 364          */
 365         target->thread.fpu.state->fxsave.mxcsr &= mxcsr_feature_mask;
 366
 367         xsave_hdr = &target->thread.fpu.state->xsave.xsave_hdr;
 368
 369         xsave_hdr->xstate_bv &= pcntxt_mask;
 370         /*
 371          * These bits must be zero.
 372          */
 373         xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
 374
 375         return ret;
 376 }
 377
 378 #if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
 379
 380 /*
 381  * FPU tag word conversions.
 382  */
 383
 384 static inline unsigned short twd_i387_to_fxsr(unsigned short twd)
 385 {
 386         unsigned int tmp; /* to avoid 16 bit prefixes in the code */
 387
 388         /* Transform each pair of bits into 01 (valid) or 00 (empty) */
 389         tmp = ~twd;
 390         tmp = (tmp | (tmp>>1)) & 0x5555; /* 0V0V0V0V0V0V0V0V */
 391         /* and move the valid bits to the lower byte. */
 392         tmp = (tmp | (tmp >> 1)) & 0x3333; /* 00VV00VV00VV00VV */
 393         tmp = (tmp | (tmp >> 2)) & 0x0f0f; /* 0000VVVV0000VVVV */
 394         tmp = (tmp | (tmp >> 4)) & 0x00ff; /* 00000000VVVVVVVV */
 395
 396         return tmp;
 397 }
 398
 399 #define FPREG_ADDR(f, n)        ((void *)&(f)->st_space + (n) * 16)
 400 #define FP_EXP_TAG_VALID        0
 401 #define FP_EXP_TAG_ZERO         1
 402 #define FP_EXP_TAG_SPECIAL      2
 403 #define FP_EXP_TAG_EMPTY        3
 404
 405 static inline u32 twd_fxsr_to_i387(struct i387_fxsave_struct *fxsave)
 406 {
 407         struct _fpxreg *st;
 408         u32 tos = (fxsave->swd >> 11) & 7;
 409         u32 twd = (unsigned long) fxsave->twd;
 410         u32 tag;
 411         u32 ret = 0xffff0000u;
 412         int i;
 413
 414         for (i = 0; i < 8; i++, twd >>= 1) {
 415                 if (twd & 0x1) {
 416                         st = FPREG_ADDR(fxsave, (i - tos) & 7);
 417
 418                         switch (st->exponent & 0x7fff) {
 419                         case 0x7fff:
 420                                 tag = FP_EXP_TAG_SPECIAL;
 421                                 break;
 422                         case 0x0000:
 423                                 if (!st->significand[0] &&
 424                                     !st->significand[1] &&
 425                                     !st->significand[2] &&
 426                                     !st->significand[3])
 427                                         tag = FP_EXP_TAG_ZERO;
 428                                 else
 429                                         tag = FP_EXP_TAG_SPECIAL;
 430                                 break;
 431                         default:
 432                                 if (st->significand[3] & 0x8000)
 433                                         tag = FP_EXP_TAG_VALID;
 434                                 else
 435                                         tag = FP_EXP_TAG_SPECIAL;
 436                                 break;
 437                         }
 438                 } else {
 439                         tag = FP_EXP_TAG_EMPTY;
 440                 }
 441                 ret |= tag << (2 * i);
 442         }
 443         return ret;
 444 }
 445
 446 /*
 447  * FXSR floating point environment conversions.
 448  */
 449
 450 void
 451 convert_from_fxsr(struct user_i387_ia32_struct *env, struct task_struct *tsk)
 452 {
 453         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 454         struct _fpreg *to = (struct _fpreg *) &env->st_space[0];
 455         struct _fpxreg *from = (struct _fpxreg *) &fxsave->st_space[0];
 456         int i;
 457
 458         env->cwd = fxsave->cwd | 0xffff0000u;
 459         env->swd = fxsave->swd | 0xffff0000u;
 460         env->twd = twd_fxsr_to_i387(fxsave);
 461
 462 #ifdef CONFIG_X86_64
 463         env->fip = fxsave->rip;
 464         env->foo = fxsave->rdp;
 465         /*
 466          * should be actually ds/cs at fpu exception time, but
 467          * that information is not available in 64bit mode.
 468          */
 469         env->fcs = task_pt_regs(tsk)->cs;
 470         if (tsk == current) {
 471                 savesegment(ds, env->fos);
 472         } else {
 473                 env->fos = tsk->thread.ds;
 474         }
 475         env->fos |= 0xffff0000;
 476 #else
 477         env->fip = fxsave->fip;
 478         env->fcs = (u16) fxsave->fcs | ((u32) fxsave->fop << 16);
 479         env->foo = fxsave->foo;
 480         env->fos = fxsave->fos;
 481 #endif
 482
 483         for (i = 0; i < 8; ++i)
 484                 memcpy(&to[i], &from[i], sizeof(to[0]));
 485 }
 486
 487 void convert_to_fxsr(struct task_struct *tsk,
 488                      const struct user_i387_ia32_struct *env)
 489
 490 {
 491         struct i387_fxsave_struct *fxsave = &tsk->thread.fpu.state->fxsave;
 492         struct _fpreg *from = (struct _fpreg *) &env->st_space[0];
 493         struct _fpxreg *to = (struct _fpxreg *) &fxsave->st_space[0];
 494         int i;
 495
 496         fxsave->cwd = env->cwd;
 497         fxsave->swd = env->swd;
 498         fxsave->twd = twd_i387_to_fxsr(env->twd);
 499         fxsave->fop = (u16) ((u32) env->fcs >> 16);
 500 #ifdef CONFIG_X86_64
 501         fxsave->rip = env->fip;
 502         fxsave->rdp = env->foo;
 503         /* cs and ds ignored */
 504 #else
 505         fxsave->fip = env->fip;
 506         fxsave->fcs = (env->fcs & 0xffff);
 507         fxsave->foo = env->foo;
 508         fxsave->fos = env->fos;
 509 #endif
 510
 511         for (i = 0; i < 8; ++i)
 512                 memcpy(&to[i], &from[i], sizeof(from[0]));
 513 }
 514
 515 int fpregs_get(struct task_struct *target, const struct user_regset *regset,
 516                unsigned int pos, unsigned int count,
 517                void *kbuf, void __user *ubuf)
 518 {
 519         struct user_i387_ia32_struct env;
 520         int ret;
 521
 522         ret = init_fpu(target);
 523         if (ret)
 524                 return ret;
 525
 526         if (!HAVE_HWFP)
 527                 return fpregs_soft_get(target, regset, pos, count, kbuf, ubuf);
 528
 529         if (!cpu_has_fxsr) {
 530                 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
 531                                            &target->thread.fpu.state->fsave, 0,
 532                                            -1);
 533         }
 534
 535         sanitize_i387_state(target);
 536
 537         if (kbuf && pos == 0 && count == sizeof(env)) {
 538                 convert_from_fxsr(kbuf, target);
 539                 return 0;
 540         }
 541
 542         convert_from_fxsr(&env, target);
 543
 544         return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 545 }
 546
 547 int fpregs_set(struct task_struct *target, const struct user_regset *regset,
 548                unsigned int pos, unsigned int count,
 549                const void *kbuf, const void __user *ubuf)
 550 {
 551         struct user_i387_ia32_struct env;
 552         int ret;
 553
 554         ret = init_fpu(target);
 555         if (ret)
 556                 return ret;
 557
 558         sanitize_i387_state(target);
 559
 560         if (!HAVE_HWFP)
 561                 return fpregs_soft_set(target, regset, pos, count, kbuf, ubuf);
 562
 563         if (!cpu_has_fxsr) {
 564                 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 565                                           &target->thread.fpu.state->fsave, 0, -1);
 566         }
 567
 568         if (pos > 0 || count < sizeof(env))
 569                 convert_from_fxsr(&env, target);
 570
 571         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &env, 0, -1);
 572         if (!ret)
 573                 convert_to_fxsr(target, &env);
 574
 575         /*
 576          * update the header bit in the xsave header, indicating the
 577          * presence of FP.
 578          */
 579         if (cpu_has_xsave)
 580                 target->thread.fpu.state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;
 581         return ret;
 582 }
 583
 584 /*
 585  * FPU state for core dumps.
 586  * This is only used for a.out dumps now.
 587  * It is declared generically using elf_fpregset_t (which is
 588  * struct user_i387_struct) but is in fact only used for 32-bit
 589  * dumps, so on 64-bit it is really struct user_i387_ia32_struct.
 590  */
 591 int dump_fpu(struct pt_regs *regs, struct user_i387_struct *fpu)
 592 {
 593         struct task_struct *tsk = current;
 594         int fpvalid;
 595
 596         fpvalid = !!used_math();
 597         if (fpvalid)
 598                 fpvalid = !fpregs_get(tsk, NULL,
 599                                       0, sizeof(struct user_i387_ia32_struct),
 600                                       fpu, NULL);
 601
 602         return fpvalid;
 603 }
 604 EXPORT_SYMBOL(dump_fpu);
 605
 606 #endif  /* CONFIG_X86_32 || CONFIG_IA32_EMULATION */