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git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - arch/x86/kernel/ipi.c
1 #include <linux/cpumask.h>
2 #include <linux/interrupt.h>
3 #include <linux/init.h>
6 #include <linux/delay.h>
7 #include <linux/spinlock.h>
8 #include <linux/kernel_stat.h>
9 #include <linux/mc146818rtc.h>
10 #include <linux/cache.h>
11 #include <linux/cpu.h>
12 #include <linux/module.h>
16 #include <asm/tlbflush.h>
17 #include <asm/mmu_context.h>
19 #include <asm/proto.h>
22 #include <mach_apic.h>
26 * the following functions deal with sending IPIs between CPUs.
28 * We use 'broadcast', CPU->CPU IPIs and self-IPIs too.
31 static inline int __prepare_ICR(unsigned int shortcut
, int vector
)
33 unsigned int icr
= shortcut
| APIC_DEST_LOGICAL
;
37 icr
|= APIC_DM_FIXED
| vector
;
46 static inline int __prepare_ICR2(unsigned int mask
)
48 return SET_APIC_DEST_FIELD(mask
);
51 void __send_IPI_shortcut(unsigned int shortcut
, int vector
)
54 * Subtle. In the case of the 'never do double writes' workaround
55 * we have to lock out interrupts to be safe. As we don't care
56 * of the value read we use an atomic rmw access to avoid costly
57 * cli/sti. Otherwise we use an even cheaper single atomic write
68 * No need to touch the target chip field
70 cfg
= __prepare_ICR(shortcut
, vector
);
73 * Send the IPI. The write to APIC_ICR fires this off.
75 apic_write(APIC_ICR
, cfg
);
78 void send_IPI_self(int vector
)
80 __send_IPI_shortcut(APIC_DEST_SELF
, vector
);
84 * This is used to send an IPI with no shorthand notation (the destination is
85 * specified in bits 56 to 63 of the ICR).
87 static inline void __send_IPI_dest_field(unsigned long mask
, int vector
)
94 if (unlikely(vector
== NMI_VECTOR
))
95 safe_apic_wait_icr_idle();
100 * prepare target chip field
102 cfg
= __prepare_ICR2(mask
);
103 apic_write(APIC_ICR2
, cfg
);
108 cfg
= __prepare_ICR(0, vector
);
111 * Send the IPI. The write to APIC_ICR fires this off.
113 apic_write(APIC_ICR
, cfg
);
117 * This is only used on smaller machines.
119 void send_IPI_mask_bitmask(const struct cpumask
*cpumask
, int vector
)
121 unsigned long mask
= cpumask_bits(cpumask
)[0];
124 local_irq_save(flags
);
125 WARN_ON(mask
& ~cpumask_bits(cpu_online_mask
)[0]);
126 __send_IPI_dest_field(mask
, vector
);
127 local_irq_restore(flags
);
130 void send_IPI_mask_sequence(const struct cpumask
*mask
, int vector
)
133 unsigned int query_cpu
;
136 * Hack. The clustered APIC addressing mode doesn't allow us to send
137 * to an arbitrary mask, so I do a unicasts to each CPU instead. This
138 * should be modified to do 1 message per cluster ID - mbligh
141 local_irq_save(flags
);
142 for_each_cpu(query_cpu
, mask
)
143 __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu
), vector
);
144 local_irq_restore(flags
);
147 void send_IPI_mask_allbutself(const struct cpumask
*mask
, int vector
)
150 unsigned int query_cpu
;
151 unsigned int this_cpu
= smp_processor_id();
153 /* See Hack comment above */
155 local_irq_save(flags
);
156 for_each_cpu(query_cpu
, mask
)
157 if (query_cpu
!= this_cpu
)
158 __send_IPI_dest_field(cpu_to_logical_apicid(query_cpu
),
160 local_irq_restore(flags
);
163 /* must come after the send_IPI functions above for inlining */
164 static int convert_apicid_to_cpu(int apic_id
)
168 for_each_possible_cpu(i
) {
169 if (per_cpu(x86_cpu_to_apicid
, i
) == apic_id
)
175 int safe_smp_processor_id(void)
179 if (!boot_cpu_has(X86_FEATURE_APIC
))
182 apicid
= hard_smp_processor_id();
183 if (apicid
== BAD_APICID
)
186 cpuid
= convert_apicid_to_cpu(apicid
);
188 return cpuid
>= 0 ? cpuid
: 0;