arch/x86/kernel/irqinit_32.c

   1 #include <linux/errno.h>
   2 #include <linux/signal.h>
   3 #include <linux/sched.h>
   4 #include <linux/ioport.h>
   5 #include <linux/interrupt.h>
   6 #include <linux/slab.h>
   7 #include <linux/random.h>
   8 #include <linux/init.h>
   9 #include <linux/kernel_stat.h>
  10 #include <linux/sysdev.h>
  11 #include <linux/bitops.h>
  12
  13 #include <asm/atomic.h>
  14 #include <asm/system.h>
  15 #include <asm/io.h>
  16 #include <asm/timer.h>
  17 #include <asm/pgtable.h>
  18 #include <asm/delay.h>
  19 #include <asm/desc.h>
  20 #include <asm/apic.h>
  21 #include <asm/arch_hooks.h>
  22 #include <asm/i8259.h>
  23
  24
  25
  26 /*
  27  * Note that on a 486, we don't want to do a SIGFPE on an irq13
  28  * as the irq is unreliable, and exception 16 works correctly
  29  * (ie as explained in the intel literature). On a 386, you
  30  * can't use exception 16 due to bad IBM design, so we have to
  31  * rely on the less exact irq13.
  32  *
  33  * Careful.. Not only is IRQ13 unreliable, but it is also
  34  * leads to races. IBM designers who came up with it should
  35  * be shot.
  36  */
  37
  38
  39 static irqreturn_t math_error_irq(int cpl, void *dev_id)
  40 {
  41         extern void math_error(void __user *);
  42         outb(0,0xF0);
  43         if (ignore_fpu_irq || !boot_cpu_data.hard_math)
  44                 return IRQ_NONE;
  45         math_error((void __user *)get_irq_regs()->ip);
  46         return IRQ_HANDLED;
  47 }
  48
  49 /*
  50  * New motherboards sometimes make IRQ 13 be a PCI interrupt,
  51  * so allow interrupt sharing.
  52  */
  53 static struct irqaction fpu_irq = {
  54         .handler = math_error_irq,
  55         .mask = CPU_MASK_NONE,
  56         .name = "fpu",
  57 };
  58
  59 void __init init_ISA_irqs (void)
  60 {
  61         int i;
  62
  63 #ifdef CONFIG_X86_LOCAL_APIC
  64         init_bsp_APIC();
  65 #endif
  66         init_8259A(0);
  67
  68         /*
  69          * 16 old-style INTA-cycle interrupts:
  70          */
  71         for (i = 0; i < NR_IRQS_LEGACY; i++) {
  72                 struct irq_desc *desc = irq_to_desc(i);
  73
  74                 desc->status = IRQ_DISABLED;
  75                 desc->action = NULL;
  76                 desc->depth = 1;
  77
  78                 set_irq_chip_and_handler_name(i, &i8259A_chip,
  79                                               handle_level_irq, "XT");
  80         }
  81 }
  82
  83 /*
  84  * IRQ2 is cascade interrupt to second interrupt controller
  85  */
  86 static struct irqaction irq2 = {
  87         .handler = no_action,
  88         .mask = CPU_MASK_NONE,
  89         .name = "cascade",
  90 };
  91
  92 DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
  93         [0 ... IRQ0_VECTOR - 1] = -1,
  94         [IRQ0_VECTOR] = 0,
  95         [IRQ1_VECTOR] = 1,
  96         [IRQ2_VECTOR] = 2,
  97         [IRQ3_VECTOR] = 3,
  98         [IRQ4_VECTOR] = 4,
  99         [IRQ5_VECTOR] = 5,
 100         [IRQ6_VECTOR] = 6,
 101         [IRQ7_VECTOR] = 7,
 102         [IRQ8_VECTOR] = 8,
 103         [IRQ9_VECTOR] = 9,
 104         [IRQ10_VECTOR] = 10,
 105         [IRQ11_VECTOR] = 11,
 106         [IRQ12_VECTOR] = 12,
 107         [IRQ13_VECTOR] = 13,
 108         [IRQ14_VECTOR] = 14,
 109         [IRQ15_VECTOR] = 15,
 110         [IRQ15_VECTOR + 1 ... NR_VECTORS - 1] = -1
 111 };
 112
 113 /* Overridden in paravirt.c */
 114 void init_IRQ(void) __attribute__((weak, alias("native_init_IRQ")));
 115
 116 void __init native_init_IRQ(void)
 117 {
 118         int i;
 119
 120         /* all the set up before the call gates are initialised */
 121         pre_intr_init_hook();
 122
 123         /*
 124          * Cover the whole vector space, no vector can escape
 125          * us. (some of these will be overridden and become
 126          * 'special' SMP interrupts)
 127          */
 128         for (i =  FIRST_EXTERNAL_VECTOR; i < NR_VECTORS; i++) {
 129                 /* SYSCALL_VECTOR was reserved in trap_init. */
 130                 if (i != SYSCALL_VECTOR)
 131                         set_intr_gate(i, interrupt[i]);
 132         }
 133
 134
 135 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_SMP)
 136         /*
 137          * The reschedule interrupt is a CPU-to-CPU reschedule-helper
 138          * IPI, driven by wakeup.
 139          */
 140         alloc_intr_gate(RESCHEDULE_VECTOR, reschedule_interrupt);
 141
 142         /* IPI for invalidation */
 143         alloc_intr_gate(INVALIDATE_TLB_VECTOR, invalidate_interrupt);
 144
 145         /* IPI for generic function call */
 146         alloc_intr_gate(CALL_FUNCTION_VECTOR, call_function_interrupt);
 147
 148         /* IPI for single call function */
 149         set_intr_gate(CALL_FUNCTION_SINGLE_VECTOR, call_function_single_interrupt);
 150
 151         /* Low priority IPI to cleanup after moving an irq */
 152         set_intr_gate(IRQ_MOVE_CLEANUP_VECTOR, irq_move_cleanup_interrupt);
 153 #endif
 154
 155 #ifdef CONFIG_X86_LOCAL_APIC
 156         /* self generated IPI for local APIC timer */
 157         alloc_intr_gate(LOCAL_TIMER_VECTOR, apic_timer_interrupt);
 158
 159         /* IPI vectors for APIC spurious and error interrupts */
 160         alloc_intr_gate(SPURIOUS_APIC_VECTOR, spurious_interrupt);
 161         alloc_intr_gate(ERROR_APIC_VECTOR, error_interrupt);
 162 #endif
 163
 164 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_MCE_P4THERMAL)
 165         /* thermal monitor LVT interrupt */
 166         alloc_intr_gate(THERMAL_APIC_VECTOR, thermal_interrupt);
 167 #endif
 168
 169         if (!acpi_ioapic)
 170                 setup_irq(2, &irq2);
 171
 172         /* setup after call gates are initialised (usually add in
 173          * the architecture specific gates)
 174          */
 175         intr_init_hook();
 176
 177         /*
 178          * External FPU? Set up irq13 if so, for
 179          * original braindamaged IBM FERR coupling.
 180          */
 181         if (boot_cpu_data.hard_math && !cpu_has_fpu)
 182                 setup_irq(FPU_IRQ, &fpu_irq);
 183
 184         irq_ctx_init(smp_processor_id());
 185 }