2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
6 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/bootmem.h>
14 #include <linux/memblock.h>
15 #include <linux/kernel_stat.h>
16 #include <linux/mc146818rtc.h>
17 #include <linux/bitops.h>
18 #include <linux/acpi.h>
19 #include <linux/smp.h>
20 #include <linux/pci.h>
22 #include <asm/irqdomain.h>
24 #include <asm/mpspec.h>
25 #include <asm/pgalloc.h>
26 #include <asm/io_apic.h>
27 #include <asm/proto.h>
28 #include <asm/bios_ebda.h>
30 #include <asm/setup.h>
35 * Checksum an MP configuration block.
38 static int __init
mpf_checksum(unsigned char *mp
, int len
)
48 int __init
default_mpc_apic_id(struct mpc_cpu
*m
)
53 static void __init
MP_processor_info(struct mpc_cpu
*m
)
56 char *bootup_cpu
= "";
58 if (!(m
->cpuflag
& CPU_ENABLED
)) {
63 apicid
= x86_init
.mpparse
.mpc_apic_id(m
);
65 if (m
->cpuflag
& CPU_BOOTPROCESSOR
) {
66 bootup_cpu
= " (Bootup-CPU)";
67 boot_cpu_physical_apicid
= m
->apicid
;
70 pr_info("Processor #%d%s\n", m
->apicid
, bootup_cpu
);
71 generic_processor_info(apicid
, m
->apicver
);
74 #ifdef CONFIG_X86_IO_APIC
75 void __init
default_mpc_oem_bus_info(struct mpc_bus
*m
, char *str
)
77 memcpy(str
, m
->bustype
, 6);
79 apic_printk(APIC_VERBOSE
, "Bus #%d is %s\n", m
->busid
, str
);
82 static void __init
MP_bus_info(struct mpc_bus
*m
)
86 x86_init
.mpparse
.mpc_oem_bus_info(m
, str
);
88 #if MAX_MP_BUSSES < 256
89 if (m
->busid
>= MAX_MP_BUSSES
) {
90 pr_warn("MP table busid value (%d) for bustype %s is too large, max. supported is %d\n",
91 m
->busid
, str
, MAX_MP_BUSSES
- 1);
96 set_bit(m
->busid
, mp_bus_not_pci
);
97 if (strncmp(str
, BUSTYPE_ISA
, sizeof(BUSTYPE_ISA
) - 1) == 0) {
99 mp_bus_id_to_type
[m
->busid
] = MP_BUS_ISA
;
101 } else if (strncmp(str
, BUSTYPE_PCI
, sizeof(BUSTYPE_PCI
) - 1) == 0) {
102 if (x86_init
.mpparse
.mpc_oem_pci_bus
)
103 x86_init
.mpparse
.mpc_oem_pci_bus(m
);
105 clear_bit(m
->busid
, mp_bus_not_pci
);
107 mp_bus_id_to_type
[m
->busid
] = MP_BUS_PCI
;
108 } else if (strncmp(str
, BUSTYPE_EISA
, sizeof(BUSTYPE_EISA
) - 1) == 0) {
109 mp_bus_id_to_type
[m
->busid
] = MP_BUS_EISA
;
112 pr_warn("Unknown bustype %s - ignoring\n", str
);
115 static void __init
MP_ioapic_info(struct mpc_ioapic
*m
)
117 struct ioapic_domain_cfg cfg
= {
118 .type
= IOAPIC_DOMAIN_LEGACY
,
119 .ops
= &mp_ioapic_irqdomain_ops
,
122 if (m
->flags
& MPC_APIC_USABLE
)
123 mp_register_ioapic(m
->apicid
, m
->apicaddr
, gsi_top
, &cfg
);
126 static void __init
print_mp_irq_info(struct mpc_intsrc
*mp_irq
)
128 apic_printk(APIC_VERBOSE
,
129 "Int: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC INT %02x\n",
130 mp_irq
->irqtype
, mp_irq
->irqflag
& 3,
131 (mp_irq
->irqflag
>> 2) & 3, mp_irq
->srcbus
,
132 mp_irq
->srcbusirq
, mp_irq
->dstapic
, mp_irq
->dstirq
);
135 #else /* CONFIG_X86_IO_APIC */
136 static inline void __init
MP_bus_info(struct mpc_bus
*m
) {}
137 static inline void __init
MP_ioapic_info(struct mpc_ioapic
*m
) {}
138 #endif /* CONFIG_X86_IO_APIC */
140 static void __init
MP_lintsrc_info(struct mpc_lintsrc
*m
)
142 apic_printk(APIC_VERBOSE
,
143 "Lint: type %d, pol %d, trig %d, bus %02x, IRQ %02x, APIC ID %x, APIC LINT %02x\n",
144 m
->irqtype
, m
->irqflag
& 3, (m
->irqflag
>> 2) & 3, m
->srcbusid
,
145 m
->srcbusirq
, m
->destapic
, m
->destapiclint
);
151 static int __init
smp_check_mpc(struct mpc_table
*mpc
, char *oem
, char *str
)
154 if (memcmp(mpc
->signature
, MPC_SIGNATURE
, 4)) {
155 pr_err("MPTABLE: bad signature [%c%c%c%c]!\n",
156 mpc
->signature
[0], mpc
->signature
[1],
157 mpc
->signature
[2], mpc
->signature
[3]);
160 if (mpf_checksum((unsigned char *)mpc
, mpc
->length
)) {
161 pr_err("MPTABLE: checksum error!\n");
164 if (mpc
->spec
!= 0x01 && mpc
->spec
!= 0x04) {
165 pr_err("MPTABLE: bad table version (%d)!!\n", mpc
->spec
);
169 pr_err("MPTABLE: null local APIC address!\n");
172 memcpy(oem
, mpc
->oem
, 8);
174 pr_info("MPTABLE: OEM ID: %s\n", oem
);
176 memcpy(str
, mpc
->productid
, 12);
179 pr_info("MPTABLE: Product ID: %s\n", str
);
181 pr_info("MPTABLE: APIC at: 0x%X\n", mpc
->lapic
);
186 static void skip_entry(unsigned char **ptr
, int *count
, int size
)
192 static void __init
smp_dump_mptable(struct mpc_table
*mpc
, unsigned char *mpt
)
194 pr_err("Your mptable is wrong, contact your HW vendor!\n");
195 pr_cont("type %x\n", *mpt
);
196 print_hex_dump(KERN_ERR
, " ", DUMP_PREFIX_ADDRESS
, 16,
197 1, mpc
, mpc
->length
, 1);
200 void __init
default_smp_read_mpc_oem(struct mpc_table
*mpc
) { }
202 static int __init
smp_read_mpc(struct mpc_table
*mpc
, unsigned early
)
207 int count
= sizeof(*mpc
);
208 unsigned char *mpt
= ((unsigned char *)mpc
) + count
;
210 if (!smp_check_mpc(mpc
, oem
, str
))
213 /* Initialize the lapic mapping */
215 register_lapic_address(mpc
->lapic
);
221 x86_init
.mpparse
.smp_read_mpc_oem(mpc
);
224 * Now process the configuration blocks.
226 x86_init
.mpparse
.mpc_record(0);
228 while (count
< mpc
->length
) {
231 /* ACPI may have already provided this data */
233 MP_processor_info((struct mpc_cpu
*)mpt
);
234 skip_entry(&mpt
, &count
, sizeof(struct mpc_cpu
));
237 MP_bus_info((struct mpc_bus
*)mpt
);
238 skip_entry(&mpt
, &count
, sizeof(struct mpc_bus
));
241 MP_ioapic_info((struct mpc_ioapic
*)mpt
);
242 skip_entry(&mpt
, &count
, sizeof(struct mpc_ioapic
));
245 mp_save_irq((struct mpc_intsrc
*)mpt
);
246 skip_entry(&mpt
, &count
, sizeof(struct mpc_intsrc
));
249 MP_lintsrc_info((struct mpc_lintsrc
*)mpt
);
250 skip_entry(&mpt
, &count
, sizeof(struct mpc_lintsrc
));
254 smp_dump_mptable(mpc
, mpt
);
258 x86_init
.mpparse
.mpc_record(1);
262 pr_err("MPTABLE: no processors registered!\n");
263 return num_processors
;
266 #ifdef CONFIG_X86_IO_APIC
268 static int __init
ELCR_trigger(unsigned int irq
)
272 port
= 0x4d0 + (irq
>> 3);
273 return (inb(port
) >> (irq
& 7)) & 1;
276 static void __init
construct_default_ioirq_mptable(int mpc_default_type
)
278 struct mpc_intsrc intsrc
;
280 int ELCR_fallback
= 0;
282 intsrc
.type
= MP_INTSRC
;
283 intsrc
.irqflag
= 0; /* conforming */
285 intsrc
.dstapic
= mpc_ioapic_id(0);
287 intsrc
.irqtype
= mp_INT
;
290 * If true, we have an ISA/PCI system with no IRQ entries
291 * in the MP table. To prevent the PCI interrupts from being set up
292 * incorrectly, we try to use the ELCR. The sanity check to see if
293 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
294 * never be level sensitive, so we simply see if the ELCR agrees.
295 * If it does, we assume it's valid.
297 if (mpc_default_type
== 5) {
298 pr_info("ISA/PCI bus type with no IRQ information... falling back to ELCR\n");
300 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
302 pr_err("ELCR contains invalid data... not using ELCR\n");
304 pr_info("Using ELCR to identify PCI interrupts\n");
309 for (i
= 0; i
< 16; i
++) {
310 switch (mpc_default_type
) {
312 if (i
== 0 || i
== 13)
313 continue; /* IRQ0 & IRQ13 not connected */
317 continue; /* IRQ2 is never connected */
322 * If the ELCR indicates a level-sensitive interrupt, we
323 * copy that information over to the MP table in the
324 * irqflag field (level sensitive, active high polarity).
332 intsrc
.srcbusirq
= i
;
333 intsrc
.dstirq
= i
? i
: 2; /* IRQ0 to INTIN2 */
334 mp_save_irq(&intsrc
);
337 intsrc
.irqtype
= mp_ExtINT
;
338 intsrc
.srcbusirq
= 0;
339 intsrc
.dstirq
= 0; /* 8259A to INTIN0 */
340 mp_save_irq(&intsrc
);
344 static void __init
construct_ioapic_table(int mpc_default_type
)
346 struct mpc_ioapic ioapic
;
351 switch (mpc_default_type
) {
353 pr_err("???\nUnknown standard configuration %d\n",
358 memcpy(bus
.bustype
, "ISA ", 6);
363 memcpy(bus
.bustype
, "EISA ", 6);
367 if (mpc_default_type
> 4) {
369 memcpy(bus
.bustype
, "PCI ", 6);
373 ioapic
.type
= MP_IOAPIC
;
375 ioapic
.apicver
= mpc_default_type
> 4 ? 0x10 : 0x01;
376 ioapic
.flags
= MPC_APIC_USABLE
;
377 ioapic
.apicaddr
= IO_APIC_DEFAULT_PHYS_BASE
;
378 MP_ioapic_info(&ioapic
);
381 * We set up most of the low 16 IO-APIC pins according to MPS rules.
383 construct_default_ioirq_mptable(mpc_default_type
);
386 static inline void __init
construct_ioapic_table(int mpc_default_type
) { }
389 static inline void __init
construct_default_ISA_mptable(int mpc_default_type
)
391 struct mpc_cpu processor
;
392 struct mpc_lintsrc lintsrc
;
393 int linttypes
[2] = { mp_ExtINT
, mp_NMI
};
397 * local APIC has default address
399 mp_lapic_addr
= APIC_DEFAULT_PHYS_BASE
;
402 * 2 CPUs, numbered 0 & 1.
404 processor
.type
= MP_PROCESSOR
;
405 /* Either an integrated APIC or a discrete 82489DX. */
406 processor
.apicver
= mpc_default_type
> 4 ? 0x10 : 0x01;
407 processor
.cpuflag
= CPU_ENABLED
;
408 processor
.cpufeature
= (boot_cpu_data
.x86
<< 8) |
409 (boot_cpu_data
.x86_model
<< 4) | boot_cpu_data
.x86_mask
;
410 processor
.featureflag
= boot_cpu_data
.x86_capability
[CPUID_1_EDX
];
411 processor
.reserved
[0] = 0;
412 processor
.reserved
[1] = 0;
413 for (i
= 0; i
< 2; i
++) {
414 processor
.apicid
= i
;
415 MP_processor_info(&processor
);
418 construct_ioapic_table(mpc_default_type
);
420 lintsrc
.type
= MP_LINTSRC
;
421 lintsrc
.irqflag
= 0; /* conforming */
422 lintsrc
.srcbusid
= 0;
423 lintsrc
.srcbusirq
= 0;
424 lintsrc
.destapic
= MP_APIC_ALL
;
425 for (i
= 0; i
< 2; i
++) {
426 lintsrc
.irqtype
= linttypes
[i
];
427 lintsrc
.destapiclint
= i
;
428 MP_lintsrc_info(&lintsrc
);
432 static struct mpf_intel
*mpf_found
;
434 static unsigned long __init
get_mpc_size(unsigned long physptr
)
436 struct mpc_table
*mpc
;
439 mpc
= early_ioremap(physptr
, PAGE_SIZE
);
441 early_iounmap(mpc
, PAGE_SIZE
);
442 apic_printk(APIC_VERBOSE
, " mpc: %lx-%lx\n", physptr
, physptr
+ size
);
447 static int __init
check_physptr(struct mpf_intel
*mpf
, unsigned int early
)
449 struct mpc_table
*mpc
;
452 size
= get_mpc_size(mpf
->physptr
);
453 mpc
= early_ioremap(mpf
->physptr
, size
);
455 * Read the physical hardware table. Anything here will
456 * override the defaults.
458 if (!smp_read_mpc(mpc
, early
)) {
459 #ifdef CONFIG_X86_LOCAL_APIC
460 smp_found_config
= 0;
462 pr_err("BIOS bug, MP table errors detected!...\n");
463 pr_cont("... disabling SMP support. (tell your hw vendor)\n");
464 early_iounmap(mpc
, size
);
467 early_iounmap(mpc
, size
);
472 #ifdef CONFIG_X86_IO_APIC
474 * If there are no explicit MP IRQ entries, then we are
475 * broken. We set up most of the low 16 IO-APIC pins to
476 * ISA defaults and hope it will work.
478 if (!mp_irq_entries
) {
481 pr_err("BIOS bug, no explicit IRQ entries, using default mptable. (tell your hw vendor)\n");
485 memcpy(bus
.bustype
, "ISA ", 6);
488 construct_default_ioirq_mptable(0);
496 * Scan the memory blocks for an SMP configuration block.
498 void __init
default_get_smp_config(unsigned int early
)
500 struct mpf_intel
*mpf
= mpf_found
;
502 if (!smp_found_config
)
508 if (acpi_lapic
&& early
)
512 * MPS doesn't support hyperthreading, aka only have
513 * thread 0 apic id in MPS table
515 if (acpi_lapic
&& acpi_ioapic
)
518 pr_info("Intel MultiProcessor Specification v1.%d\n",
520 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
521 if (mpf
->feature2
& (1 << 7)) {
522 pr_info(" IMCR and PIC compatibility mode.\n");
525 pr_info(" Virtual Wire compatibility mode.\n");
530 * Now see if we need to read further.
532 if (mpf
->feature1
!= 0) {
535 * local APIC has default address
537 mp_lapic_addr
= APIC_DEFAULT_PHYS_BASE
;
541 pr_info("Default MP configuration #%d\n", mpf
->feature1
);
542 construct_default_ISA_mptable(mpf
->feature1
);
544 } else if (mpf
->physptr
) {
545 if (check_physptr(mpf
, early
))
551 pr_info("Processors: %d\n", num_processors
);
553 * Only use the first configuration found.
557 static void __init
smp_reserve_memory(struct mpf_intel
*mpf
)
559 memblock_reserve(mpf
->physptr
, get_mpc_size(mpf
->physptr
));
562 static int __init
smp_scan_config(unsigned long base
, unsigned long length
)
564 unsigned int *bp
= phys_to_virt(base
);
565 struct mpf_intel
*mpf
;
568 apic_printk(APIC_VERBOSE
, "Scan for SMP in [mem %#010lx-%#010lx]\n",
569 base
, base
+ length
- 1);
570 BUILD_BUG_ON(sizeof(*mpf
) != 16);
573 mpf
= (struct mpf_intel
*)bp
;
574 if ((*bp
== SMP_MAGIC_IDENT
) &&
575 (mpf
->length
== 1) &&
576 !mpf_checksum((unsigned char *)bp
, 16) &&
577 ((mpf
->specification
== 1)
578 || (mpf
->specification
== 4))) {
579 #ifdef CONFIG_X86_LOCAL_APIC
580 smp_found_config
= 1;
584 pr_info("found SMP MP-table at [mem %#010llx-%#010llx] mapped at [%p]\n",
585 (unsigned long long) virt_to_phys(mpf
),
586 (unsigned long long) virt_to_phys(mpf
) +
587 sizeof(*mpf
) - 1, mpf
);
589 mem
= virt_to_phys(mpf
);
590 memblock_reserve(mem
, sizeof(*mpf
));
592 smp_reserve_memory(mpf
);
602 void __init
default_find_smp_config(void)
604 unsigned int address
;
607 * FIXME: Linux assumes you have 640K of base ram..
608 * this continues the error...
610 * 1) Scan the bottom 1K for a signature
611 * 2) Scan the top 1K of base RAM
612 * 3) Scan the 64K of bios
614 if (smp_scan_config(0x0, 0x400) ||
615 smp_scan_config(639 * 0x400, 0x400) ||
616 smp_scan_config(0xF0000, 0x10000))
619 * If it is an SMP machine we should know now, unless the
620 * configuration is in an EISA bus machine with an
621 * extended bios data area.
623 * there is a real-mode segmented pointer pointing to the
624 * 4K EBDA area at 0x40E, calculate and scan it here.
626 * NOTE! There are Linux loaders that will corrupt the EBDA
627 * area, and as such this kind of SMP config may be less
628 * trustworthy, simply because the SMP table may have been
629 * stomped on during early boot. These loaders are buggy and
632 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
635 address
= get_bios_ebda();
637 smp_scan_config(address
, 0x400);
640 #ifdef CONFIG_X86_IO_APIC
641 static u8 __initdata irq_used
[MAX_IRQ_SOURCES
];
643 static int __init
get_MP_intsrc_index(struct mpc_intsrc
*m
)
647 if (m
->irqtype
!= mp_INT
)
650 if (m
->irqflag
!= 0x0f)
655 for (i
= 0; i
< mp_irq_entries
; i
++) {
656 if (mp_irqs
[i
].irqtype
!= mp_INT
)
659 if (mp_irqs
[i
].irqflag
!= 0x0f)
662 if (mp_irqs
[i
].srcbus
!= m
->srcbus
)
664 if (mp_irqs
[i
].srcbusirq
!= m
->srcbusirq
)
667 /* already claimed */
678 #define SPARE_SLOT_NUM 20
680 static struct mpc_intsrc __initdata
*m_spare
[SPARE_SLOT_NUM
];
682 static void __init
check_irq_src(struct mpc_intsrc
*m
, int *nr_m_spare
)
686 apic_printk(APIC_VERBOSE
, "OLD ");
687 print_mp_irq_info(m
);
689 i
= get_MP_intsrc_index(m
);
691 memcpy(m
, &mp_irqs
[i
], sizeof(*m
));
692 apic_printk(APIC_VERBOSE
, "NEW ");
693 print_mp_irq_info(&mp_irqs
[i
]);
697 /* legacy, do nothing */
700 if (*nr_m_spare
< SPARE_SLOT_NUM
) {
702 * not found (-1), or duplicated (-2) are invalid entries,
703 * we need to use the slot later
705 m_spare
[*nr_m_spare
] = m
;
711 check_slot(unsigned long mpc_new_phys
, unsigned long mpc_new_length
, int count
)
713 if (!mpc_new_phys
|| count
<= mpc_new_length
) {
714 WARN(1, "update_mptable: No spare slots (length: %x)\n", count
);
720 #else /* CONFIG_X86_IO_APIC */
722 inline void __init
check_irq_src(struct mpc_intsrc
*m
, int *nr_m_spare
) {}
723 #endif /* CONFIG_X86_IO_APIC */
725 static int __init
replace_intsrc_all(struct mpc_table
*mpc
,
726 unsigned long mpc_new_phys
,
727 unsigned long mpc_new_length
)
729 #ifdef CONFIG_X86_IO_APIC
732 int count
= sizeof(*mpc
);
734 unsigned char *mpt
= ((unsigned char *)mpc
) + count
;
736 pr_info("mpc_length %x\n", mpc
->length
);
737 while (count
< mpc
->length
) {
740 skip_entry(&mpt
, &count
, sizeof(struct mpc_cpu
));
743 skip_entry(&mpt
, &count
, sizeof(struct mpc_bus
));
746 skip_entry(&mpt
, &count
, sizeof(struct mpc_ioapic
));
749 check_irq_src((struct mpc_intsrc
*)mpt
, &nr_m_spare
);
750 skip_entry(&mpt
, &count
, sizeof(struct mpc_intsrc
));
753 skip_entry(&mpt
, &count
, sizeof(struct mpc_lintsrc
));
757 smp_dump_mptable(mpc
, mpt
);
762 #ifdef CONFIG_X86_IO_APIC
763 for (i
= 0; i
< mp_irq_entries
; i
++) {
767 if (mp_irqs
[i
].irqtype
!= mp_INT
)
770 if (mp_irqs
[i
].irqflag
!= 0x0f)
773 if (nr_m_spare
> 0) {
774 apic_printk(APIC_VERBOSE
, "*NEW* found\n");
776 memcpy(m_spare
[nr_m_spare
], &mp_irqs
[i
], sizeof(mp_irqs
[i
]));
777 m_spare
[nr_m_spare
] = NULL
;
779 struct mpc_intsrc
*m
= (struct mpc_intsrc
*)mpt
;
780 count
+= sizeof(struct mpc_intsrc
);
781 if (check_slot(mpc_new_phys
, mpc_new_length
, count
) < 0)
783 memcpy(m
, &mp_irqs
[i
], sizeof(*m
));
785 mpt
+= sizeof(struct mpc_intsrc
);
787 print_mp_irq_info(&mp_irqs
[i
]);
791 /* update checksum */
793 mpc
->checksum
-= mpf_checksum((unsigned char *)mpc
, mpc
->length
);
798 int enable_update_mptable
;
800 static int __init
update_mptable_setup(char *str
)
802 enable_update_mptable
= 1;
808 early_param("update_mptable", update_mptable_setup
);
810 static unsigned long __initdata mpc_new_phys
;
811 static unsigned long mpc_new_length __initdata
= 4096;
813 /* alloc_mptable or alloc_mptable=4k */
814 static int __initdata alloc_mptable
;
815 static int __init
parse_alloc_mptable_opt(char *p
)
817 enable_update_mptable
= 1;
824 mpc_new_length
= memparse(p
, &p
);
827 early_param("alloc_mptable", parse_alloc_mptable_opt
);
829 void __init
early_reserve_e820_mpc_new(void)
831 if (enable_update_mptable
&& alloc_mptable
)
832 mpc_new_phys
= early_reserve_e820(mpc_new_length
, 4);
835 static int __init
update_mp_table(void)
839 struct mpf_intel
*mpf
;
840 struct mpc_table
*mpc
, *mpc_new
;
842 if (!enable_update_mptable
)
850 * Now see if we need to go further.
852 if (mpf
->feature1
!= 0)
858 mpc
= phys_to_virt(mpf
->physptr
);
860 if (!smp_check_mpc(mpc
, oem
, str
))
863 pr_info("mpf: %llx\n", (u64
)virt_to_phys(mpf
));
864 pr_info("physptr: %x\n", mpf
->physptr
);
866 if (mpc_new_phys
&& mpc
->length
> mpc_new_length
) {
868 pr_info("mpc_new_length is %ld, please use alloc_mptable=8k\n",
873 unsigned char old
, new;
874 /* check if we can change the position */
876 old
= mpf_checksum((unsigned char *)mpc
, mpc
->length
);
877 mpc
->checksum
= 0xff;
878 new = mpf_checksum((unsigned char *)mpc
, mpc
->length
);
880 pr_info("mpc is readonly, please try alloc_mptable instead\n");
883 pr_info("use in-position replacing\n");
885 mpf
->physptr
= mpc_new_phys
;
886 mpc_new
= phys_to_virt(mpc_new_phys
);
887 memcpy(mpc_new
, mpc
, mpc
->length
);
889 /* check if we can modify that */
890 if (mpc_new_phys
- mpf
->physptr
) {
891 struct mpf_intel
*mpf_new
;
892 /* steal 16 bytes from [0, 1k) */
893 pr_info("mpf new: %x\n", 0x400 - 16);
894 mpf_new
= phys_to_virt(0x400 - 16);
895 memcpy(mpf_new
, mpf
, 16);
897 mpf
->physptr
= mpc_new_phys
;
900 mpf
->checksum
-= mpf_checksum((unsigned char *)mpf
, 16);
901 pr_info("physptr new: %x\n", mpf
->physptr
);
905 * only replace the one with mp_INT and
906 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
907 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
908 * may need pci=routeirq for all coverage
910 replace_intsrc_all(mpc
, mpc_new_phys
, mpc_new_length
);
915 late_initcall(update_mp_table
);