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x86: make config_irqsrc not MPspec specific
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1 /*
2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
4 *
5 * (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
6 * (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
8 */
9
10 #include <linux/mm.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/bootmem.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/mc146818rtc.h>
16 #include <linux/bitops.h>
17 #include <linux/acpi.h>
18 #include <linux/module.h>
19
20 #include <asm/smp.h>
21 #include <asm/mtrr.h>
22 #include <asm/mpspec.h>
23 #include <asm/pgalloc.h>
24 #include <asm/io_apic.h>
25 #include <asm/proto.h>
26 #include <asm/acpi.h>
27 #include <asm/bios_ebda.h>
28
29 #include <mach_apic.h>
30 #ifdef CONFIG_X86_32
31 #include <mach_apicdef.h>
32 #include <mach_mpparse.h>
33 #endif
34
35 /* Have we found an MP table */
36 int smp_found_config;
37
38 /*
39 * Various Linux-internal data structures created from the
40 * MP-table.
41 */
42 #if defined (CONFIG_MCA) || defined (CONFIG_EISA)
43 int mp_bus_id_to_type[MAX_MP_BUSSES];
44 #endif
45
46 DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
47 int mp_bus_id_to_pci_bus[MAX_MP_BUSSES] = {[0 ... MAX_MP_BUSSES - 1] = -1 };
48
49 static int mp_current_pci_id;
50
51 int pic_mode;
52
53 /*
54 * Intel MP BIOS table parsing routines:
55 */
56
57 /*
58 * Checksum an MP configuration block.
59 */
60
61 static int __init mpf_checksum(unsigned char *mp, int len)
62 {
63 int sum = 0;
64
65 while (len--)
66 sum += *mp++;
67
68 return sum & 0xFF;
69 }
70
71 #ifdef CONFIG_X86_NUMAQ
72 /*
73 * Have to match translation table entries to main table entries by counter
74 * hence the mpc_record variable .... can't see a less disgusting way of
75 * doing this ....
76 */
77
78 static int mpc_record;
79 static struct mpc_config_translation *translation_table[MAX_MPC_ENTRY]
80 __cpuinitdata;
81 #endif
82
83 static void __cpuinit MP_processor_info(struct mpc_config_processor *m)
84 {
85 int apicid;
86 char *bootup_cpu = "";
87
88 if (!(m->mpc_cpuflag & CPU_ENABLED)) {
89 disabled_cpus++;
90 return;
91 }
92 #ifdef CONFIG_X86_NUMAQ
93 apicid = mpc_apic_id(m, translation_table[mpc_record]);
94 #else
95 apicid = m->mpc_apicid;
96 #endif
97 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
98 bootup_cpu = " (Bootup-CPU)";
99 boot_cpu_physical_apicid = m->mpc_apicid;
100 }
101
102 printk(KERN_INFO "Processor #%d%s\n", m->mpc_apicid, bootup_cpu);
103 generic_processor_info(apicid, m->mpc_apicver);
104 }
105
106 static void __init MP_bus_info(struct mpc_config_bus *m)
107 {
108 char str[7];
109
110 memcpy(str, m->mpc_bustype, 6);
111 str[6] = 0;
112
113 #ifdef CONFIG_X86_NUMAQ
114 mpc_oem_bus_info(m, str, translation_table[mpc_record]);
115 #else
116 printk(KERN_INFO "Bus #%d is %s\n", m->mpc_busid, str);
117 #endif
118
119 #if MAX_MP_BUSSES < 256
120 if (m->mpc_busid >= MAX_MP_BUSSES) {
121 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
122 " is too large, max. supported is %d\n",
123 m->mpc_busid, str, MAX_MP_BUSSES - 1);
124 return;
125 }
126 #endif
127
128 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
129 set_bit(m->mpc_busid, mp_bus_not_pci);
130 #if defined(CONFIG_EISA) || defined (CONFIG_MCA)
131 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_ISA;
132 #endif
133 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
134 #ifdef CONFIG_X86_NUMAQ
135 mpc_oem_pci_bus(m, translation_table[mpc_record]);
136 #endif
137 clear_bit(m->mpc_busid, mp_bus_not_pci);
138 mp_bus_id_to_pci_bus[m->mpc_busid] = mp_current_pci_id;
139 mp_current_pci_id++;
140 #if defined(CONFIG_EISA) || defined (CONFIG_MCA)
141 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_PCI;
142 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
143 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_EISA;
144 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
145 mp_bus_id_to_type[m->mpc_busid] = MP_BUS_MCA;
146 #endif
147 } else
148 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
149 }
150
151 #ifdef CONFIG_X86_IO_APIC
152
153 static int bad_ioapic(unsigned long address)
154 {
155 if (nr_ioapics >= MAX_IO_APICS) {
156 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
157 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
158 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
159 }
160 if (!address) {
161 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
162 " found in table, skipping!\n");
163 return 1;
164 }
165 return 0;
166 }
167
168 static void __init MP_ioapic_info(struct mpc_config_ioapic *m)
169 {
170 if (!(m->mpc_flags & MPC_APIC_USABLE))
171 return;
172
173 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
174 m->mpc_apicid, m->mpc_apicver, m->mpc_apicaddr);
175
176 if (bad_ioapic(m->mpc_apicaddr))
177 return;
178
179 mp_ioapics[nr_ioapics].mp_apicaddr = m->mpc_apicaddr;
180 mp_ioapics[nr_ioapics].mp_apicid = m->mpc_apicid;
181 mp_ioapics[nr_ioapics].mp_type = m->mpc_type;
182 mp_ioapics[nr_ioapics].mp_apicver = m->mpc_apicver;
183 mp_ioapics[nr_ioapics].mp_flags = m->mpc_flags;
184 nr_ioapics++;
185 }
186
187 static void __init MP_intsrc_info(struct mpc_config_intsrc *m)
188 {
189 printk(KERN_INFO "Int: type %d, pol %d, trig %d, bus %02x,"
190 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
191 m->mpc_irqtype, m->mpc_irqflag & 3,
192 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbus,
193 m->mpc_srcbusirq, m->mpc_dstapic, m->mpc_dstirq);
194 mp_irqs[mp_irq_entries].mp_dstapic = m->mpc_dstapic;
195 mp_irqs[mp_irq_entries].mp_type = m->mpc_type;
196 mp_irqs[mp_irq_entries].mp_irqtype = m->mpc_irqtype;
197 mp_irqs[mp_irq_entries].mp_irqflag = m->mpc_irqflag;
198 mp_irqs[mp_irq_entries].mp_srcbus = m->mpc_srcbus;
199 mp_irqs[mp_irq_entries].mp_srcbusirq = m->mpc_srcbusirq;
200 mp_irqs[mp_irq_entries].mp_dstirq = m->mpc_dstirq;
201 if (++mp_irq_entries == MAX_IRQ_SOURCES)
202 panic("Max # of irq sources exceeded!!\n");
203 }
204
205 #endif
206
207 static void __init MP_lintsrc_info(struct mpc_config_lintsrc *m)
208 {
209 printk(KERN_INFO "Lint: type %d, pol %d, trig %d, bus %02x,"
210 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
211 m->mpc_irqtype, m->mpc_irqflag & 3,
212 (m->mpc_irqflag >> 2) & 3, m->mpc_srcbusid,
213 m->mpc_srcbusirq, m->mpc_destapic, m->mpc_destapiclint);
214 }
215
216 #ifdef CONFIG_X86_NUMAQ
217 static void __init MP_translation_info(struct mpc_config_translation *m)
218 {
219 printk(KERN_INFO
220 "Translation: record %d, type %d, quad %d, global %d, local %d\n",
221 mpc_record, m->trans_type, m->trans_quad, m->trans_global,
222 m->trans_local);
223
224 if (mpc_record >= MAX_MPC_ENTRY)
225 printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
226 else
227 translation_table[mpc_record] = m; /* stash this for later */
228 if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
229 node_set_online(m->trans_quad);
230 }
231
232 /*
233 * Read/parse the MPC oem tables
234 */
235
236 static void __init smp_read_mpc_oem(struct mp_config_oemtable *oemtable,
237 unsigned short oemsize)
238 {
239 int count = sizeof(*oemtable); /* the header size */
240 unsigned char *oemptr = ((unsigned char *)oemtable) + count;
241
242 mpc_record = 0;
243 printk(KERN_INFO "Found an OEM MPC table at %8p - parsing it ... \n",
244 oemtable);
245 if (memcmp(oemtable->oem_signature, MPC_OEM_SIGNATURE, 4)) {
246 printk(KERN_WARNING
247 "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
248 oemtable->oem_signature[0], oemtable->oem_signature[1],
249 oemtable->oem_signature[2], oemtable->oem_signature[3]);
250 return;
251 }
252 if (mpf_checksum((unsigned char *)oemtable, oemtable->oem_length)) {
253 printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
254 return;
255 }
256 while (count < oemtable->oem_length) {
257 switch (*oemptr) {
258 case MP_TRANSLATION:
259 {
260 struct mpc_config_translation *m =
261 (struct mpc_config_translation *)oemptr;
262 MP_translation_info(m);
263 oemptr += sizeof(*m);
264 count += sizeof(*m);
265 ++mpc_record;
266 break;
267 }
268 default:
269 {
270 printk(KERN_WARNING
271 "Unrecognised OEM table entry type! - %d\n",
272 (int)*oemptr);
273 return;
274 }
275 }
276 }
277 }
278
279 static inline void mps_oem_check(struct mp_config_table *mpc, char *oem,
280 char *productid)
281 {
282 if (strncmp(oem, "IBM NUMA", 8))
283 printk("Warning! May not be a NUMA-Q system!\n");
284 if (mpc->mpc_oemptr)
285 smp_read_mpc_oem((struct mp_config_oemtable *)mpc->mpc_oemptr,
286 mpc->mpc_oemsize);
287 }
288 #endif /* CONFIG_X86_NUMAQ */
289
290 /*
291 * Read/parse the MPC
292 */
293
294 static int __init smp_read_mpc(struct mp_config_table *mpc, unsigned early)
295 {
296 char str[16];
297 char oem[10];
298 int count = sizeof(*mpc);
299 unsigned char *mpt = ((unsigned char *)mpc) + count;
300
301 if (memcmp(mpc->mpc_signature, MPC_SIGNATURE, 4)) {
302 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
303 mpc->mpc_signature[0], mpc->mpc_signature[1],
304 mpc->mpc_signature[2], mpc->mpc_signature[3]);
305 return 0;
306 }
307 if (mpf_checksum((unsigned char *)mpc, mpc->mpc_length)) {
308 printk(KERN_ERR "MPTABLE: checksum error!\n");
309 return 0;
310 }
311 if (mpc->mpc_spec != 0x01 && mpc->mpc_spec != 0x04) {
312 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
313 mpc->mpc_spec);
314 return 0;
315 }
316 if (!mpc->mpc_lapic) {
317 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
318 return 0;
319 }
320 memcpy(oem, mpc->mpc_oem, 8);
321 oem[8] = 0;
322 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
323
324 memcpy(str, mpc->mpc_productid, 12);
325 str[12] = 0;
326
327 #ifdef CONFIG_X86_32
328 mps_oem_check(mpc, oem, str);
329 #endif
330 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
331
332 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->mpc_lapic);
333
334 /* save the local APIC address, it might be non-default */
335 if (!acpi_lapic)
336 mp_lapic_addr = mpc->mpc_lapic;
337
338 if (early)
339 return 1;
340
341 /*
342 * Now process the configuration blocks.
343 */
344 #ifdef CONFIG_X86_NUMAQ
345 mpc_record = 0;
346 #endif
347 while (count < mpc->mpc_length) {
348 switch (*mpt) {
349 case MP_PROCESSOR:
350 {
351 struct mpc_config_processor *m =
352 (struct mpc_config_processor *)mpt;
353 /* ACPI may have already provided this data */
354 if (!acpi_lapic)
355 MP_processor_info(m);
356 mpt += sizeof(*m);
357 count += sizeof(*m);
358 break;
359 }
360 case MP_BUS:
361 {
362 struct mpc_config_bus *m =
363 (struct mpc_config_bus *)mpt;
364 MP_bus_info(m);
365 mpt += sizeof(*m);
366 count += sizeof(*m);
367 break;
368 }
369 case MP_IOAPIC:
370 {
371 #ifdef CONFIG_X86_IO_APIC
372 struct mpc_config_ioapic *m =
373 (struct mpc_config_ioapic *)mpt;
374 MP_ioapic_info(m);
375 #endif
376 mpt += sizeof(struct mpc_config_ioapic);
377 count += sizeof(struct mpc_config_ioapic);
378 break;
379 }
380 case MP_INTSRC:
381 {
382 #ifdef CONFIG_X86_IO_APIC
383 struct mpc_config_intsrc *m =
384 (struct mpc_config_intsrc *)mpt;
385
386 MP_intsrc_info(m);
387 #endif
388 mpt += sizeof(struct mpc_config_intsrc);
389 count += sizeof(struct mpc_config_intsrc);
390 break;
391 }
392 case MP_LINTSRC:
393 {
394 struct mpc_config_lintsrc *m =
395 (struct mpc_config_lintsrc *)mpt;
396 MP_lintsrc_info(m);
397 mpt += sizeof(*m);
398 count += sizeof(*m);
399 break;
400 }
401 default:
402 /* wrong mptable */
403 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n");
404 printk(KERN_ERR "type %x\n", *mpt);
405 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
406 1, mpc, mpc->mpc_length, 1);
407 count = mpc->mpc_length;
408 break;
409 }
410 #ifdef CONFIG_X86_NUMAQ
411 ++mpc_record;
412 #endif
413 }
414 setup_apic_routing();
415 if (!num_processors)
416 printk(KERN_ERR "MPTABLE: no processors registered!\n");
417 return num_processors;
418 }
419
420 #ifdef CONFIG_X86_IO_APIC
421
422 static int __init ELCR_trigger(unsigned int irq)
423 {
424 unsigned int port;
425
426 port = 0x4d0 + (irq >> 3);
427 return (inb(port) >> (irq & 7)) & 1;
428 }
429
430 static void __init construct_default_ioirq_mptable(int mpc_default_type)
431 {
432 struct mpc_config_intsrc intsrc;
433 int i;
434 int ELCR_fallback = 0;
435
436 intsrc.mpc_type = MP_INTSRC;
437 intsrc.mpc_irqflag = 0; /* conforming */
438 intsrc.mpc_srcbus = 0;
439 intsrc.mpc_dstapic = mp_ioapics[0].mp_apicid;
440
441 intsrc.mpc_irqtype = mp_INT;
442
443 /*
444 * If true, we have an ISA/PCI system with no IRQ entries
445 * in the MP table. To prevent the PCI interrupts from being set up
446 * incorrectly, we try to use the ELCR. The sanity check to see if
447 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
448 * never be level sensitive, so we simply see if the ELCR agrees.
449 * If it does, we assume it's valid.
450 */
451 if (mpc_default_type == 5) {
452 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
453 "falling back to ELCR\n");
454
455 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
456 ELCR_trigger(13))
457 printk(KERN_ERR "ELCR contains invalid data... "
458 "not using ELCR\n");
459 else {
460 printk(KERN_INFO
461 "Using ELCR to identify PCI interrupts\n");
462 ELCR_fallback = 1;
463 }
464 }
465
466 for (i = 0; i < 16; i++) {
467 switch (mpc_default_type) {
468 case 2:
469 if (i == 0 || i == 13)
470 continue; /* IRQ0 & IRQ13 not connected */
471 /* fall through */
472 default:
473 if (i == 2)
474 continue; /* IRQ2 is never connected */
475 }
476
477 if (ELCR_fallback) {
478 /*
479 * If the ELCR indicates a level-sensitive interrupt, we
480 * copy that information over to the MP table in the
481 * irqflag field (level sensitive, active high polarity).
482 */
483 if (ELCR_trigger(i))
484 intsrc.mpc_irqflag = 13;
485 else
486 intsrc.mpc_irqflag = 0;
487 }
488
489 intsrc.mpc_srcbusirq = i;
490 intsrc.mpc_dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
491 MP_intsrc_info(&intsrc);
492 }
493
494 intsrc.mpc_irqtype = mp_ExtINT;
495 intsrc.mpc_srcbusirq = 0;
496 intsrc.mpc_dstirq = 0; /* 8259A to INTIN0 */
497 MP_intsrc_info(&intsrc);
498 }
499
500 #endif
501
502 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
503 {
504 struct mpc_config_processor processor;
505 struct mpc_config_bus bus;
506 #ifdef CONFIG_X86_IO_APIC
507 struct mpc_config_ioapic ioapic;
508 #endif
509 struct mpc_config_lintsrc lintsrc;
510 int linttypes[2] = { mp_ExtINT, mp_NMI };
511 int i;
512
513 /*
514 * local APIC has default address
515 */
516 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
517
518 /*
519 * 2 CPUs, numbered 0 & 1.
520 */
521 processor.mpc_type = MP_PROCESSOR;
522 /* Either an integrated APIC or a discrete 82489DX. */
523 processor.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
524 processor.mpc_cpuflag = CPU_ENABLED;
525 processor.mpc_cpufeature = (boot_cpu_data.x86 << 8) |
526 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
527 processor.mpc_featureflag = boot_cpu_data.x86_capability[0];
528 processor.mpc_reserved[0] = 0;
529 processor.mpc_reserved[1] = 0;
530 for (i = 0; i < 2; i++) {
531 processor.mpc_apicid = i;
532 MP_processor_info(&processor);
533 }
534
535 bus.mpc_type = MP_BUS;
536 bus.mpc_busid = 0;
537 switch (mpc_default_type) {
538 default:
539 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
540 mpc_default_type);
541 /* fall through */
542 case 1:
543 case 5:
544 memcpy(bus.mpc_bustype, "ISA ", 6);
545 break;
546 case 2:
547 case 6:
548 case 3:
549 memcpy(bus.mpc_bustype, "EISA ", 6);
550 break;
551 case 4:
552 case 7:
553 memcpy(bus.mpc_bustype, "MCA ", 6);
554 }
555 MP_bus_info(&bus);
556 if (mpc_default_type > 4) {
557 bus.mpc_busid = 1;
558 memcpy(bus.mpc_bustype, "PCI ", 6);
559 MP_bus_info(&bus);
560 }
561
562 #ifdef CONFIG_X86_IO_APIC
563 ioapic.mpc_type = MP_IOAPIC;
564 ioapic.mpc_apicid = 2;
565 ioapic.mpc_apicver = mpc_default_type > 4 ? 0x10 : 0x01;
566 ioapic.mpc_flags = MPC_APIC_USABLE;
567 ioapic.mpc_apicaddr = 0xFEC00000;
568 MP_ioapic_info(&ioapic);
569
570 /*
571 * We set up most of the low 16 IO-APIC pins according to MPS rules.
572 */
573 construct_default_ioirq_mptable(mpc_default_type);
574 #endif
575 lintsrc.mpc_type = MP_LINTSRC;
576 lintsrc.mpc_irqflag = 0; /* conforming */
577 lintsrc.mpc_srcbusid = 0;
578 lintsrc.mpc_srcbusirq = 0;
579 lintsrc.mpc_destapic = MP_APIC_ALL;
580 for (i = 0; i < 2; i++) {
581 lintsrc.mpc_irqtype = linttypes[i];
582 lintsrc.mpc_destapiclint = i;
583 MP_lintsrc_info(&lintsrc);
584 }
585 }
586
587 static struct intel_mp_floating *mpf_found;
588
589 /*
590 * Scan the memory blocks for an SMP configuration block.
591 */
592 static void __init __get_smp_config(unsigned early)
593 {
594 struct intel_mp_floating *mpf = mpf_found;
595
596 if (acpi_lapic && early)
597 return;
598 /*
599 * ACPI supports both logical (e.g. Hyper-Threading) and physical
600 * processors, where MPS only supports physical.
601 */
602 if (acpi_lapic && acpi_ioapic) {
603 printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
604 "information\n");
605 return;
606 } else if (acpi_lapic)
607 printk(KERN_INFO "Using ACPI for processor (LAPIC) "
608 "configuration information\n");
609
610 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
611 mpf->mpf_specification);
612 #ifdef CONFIG_X86_32
613 if (mpf->mpf_feature2 & (1 << 7)) {
614 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
615 pic_mode = 1;
616 } else {
617 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
618 pic_mode = 0;
619 }
620 #endif
621 /*
622 * Now see if we need to read further.
623 */
624 if (mpf->mpf_feature1 != 0) {
625 if (early) {
626 /*
627 * local APIC has default address
628 */
629 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
630 return;
631 }
632
633 printk(KERN_INFO "Default MP configuration #%d\n",
634 mpf->mpf_feature1);
635 construct_default_ISA_mptable(mpf->mpf_feature1);
636
637 } else if (mpf->mpf_physptr) {
638
639 /*
640 * Read the physical hardware table. Anything here will
641 * override the defaults.
642 */
643 if (!smp_read_mpc(phys_to_virt(mpf->mpf_physptr), early)) {
644 smp_found_config = 0;
645 printk(KERN_ERR
646 "BIOS bug, MP table errors detected!...\n");
647 printk(KERN_ERR "... disabling SMP support. "
648 "(tell your hw vendor)\n");
649 return;
650 }
651
652 if (early)
653 return;
654 #ifdef CONFIG_X86_IO_APIC
655 /*
656 * If there are no explicit MP IRQ entries, then we are
657 * broken. We set up most of the low 16 IO-APIC pins to
658 * ISA defaults and hope it will work.
659 */
660 if (!mp_irq_entries) {
661 struct mpc_config_bus bus;
662
663 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
664 "using default mptable. "
665 "(tell your hw vendor)\n");
666
667 bus.mpc_type = MP_BUS;
668 bus.mpc_busid = 0;
669 memcpy(bus.mpc_bustype, "ISA ", 6);
670 MP_bus_info(&bus);
671
672 construct_default_ioirq_mptable(0);
673 }
674 #endif
675 } else
676 BUG();
677
678 if (!early)
679 printk(KERN_INFO "Processors: %d\n", num_processors);
680 /*
681 * Only use the first configuration found.
682 */
683 }
684
685 void __init early_get_smp_config(void)
686 {
687 __get_smp_config(1);
688 }
689
690 void __init get_smp_config(void)
691 {
692 __get_smp_config(0);
693 }
694
695 static int __init smp_scan_config(unsigned long base, unsigned long length,
696 unsigned reserve)
697 {
698 unsigned int *bp = phys_to_virt(base);
699 struct intel_mp_floating *mpf;
700
701 printk(KERN_DEBUG "Scan SMP from %p for %ld bytes.\n", bp, length);
702 BUILD_BUG_ON(sizeof(*mpf) != 16);
703
704 while (length > 0) {
705 mpf = (struct intel_mp_floating *)bp;
706 if ((*bp == SMP_MAGIC_IDENT) &&
707 (mpf->mpf_length == 1) &&
708 !mpf_checksum((unsigned char *)bp, 16) &&
709 ((mpf->mpf_specification == 1)
710 || (mpf->mpf_specification == 4))) {
711
712 smp_found_config = 1;
713 mpf_found = mpf;
714 #ifdef CONFIG_X86_32
715 printk(KERN_INFO "found SMP MP-table at [%p] %08lx\n",
716 mpf, virt_to_phys(mpf));
717 reserve_bootmem(virt_to_phys(mpf), PAGE_SIZE,
718 BOOTMEM_DEFAULT);
719 if (mpf->mpf_physptr) {
720 /*
721 * We cannot access to MPC table to compute
722 * table size yet, as only few megabytes from
723 * the bottom is mapped now.
724 * PC-9800's MPC table places on the very last
725 * of physical memory; so that simply reserving
726 * PAGE_SIZE from mpg->mpf_physptr yields BUG()
727 * in reserve_bootmem.
728 */
729 unsigned long size = PAGE_SIZE;
730 unsigned long end = max_low_pfn * PAGE_SIZE;
731 if (mpf->mpf_physptr + size > end)
732 size = end - mpf->mpf_physptr;
733 reserve_bootmem(mpf->mpf_physptr, size,
734 BOOTMEM_DEFAULT);
735 }
736
737 #else
738 if (!reserve)
739 return 1;
740
741 reserve_bootmem_generic(virt_to_phys(mpf), PAGE_SIZE);
742 if (mpf->mpf_physptr)
743 reserve_bootmem_generic(mpf->mpf_physptr,
744 PAGE_SIZE);
745 #endif
746 return 1;
747 }
748 bp += 4;
749 length -= 16;
750 }
751 return 0;
752 }
753
754 static void __init __find_smp_config(unsigned reserve)
755 {
756 unsigned int address;
757
758 /*
759 * FIXME: Linux assumes you have 640K of base ram..
760 * this continues the error...
761 *
762 * 1) Scan the bottom 1K for a signature
763 * 2) Scan the top 1K of base RAM
764 * 3) Scan the 64K of bios
765 */
766 if (smp_scan_config(0x0, 0x400, reserve) ||
767 smp_scan_config(639 * 0x400, 0x400, reserve) ||
768 smp_scan_config(0xF0000, 0x10000, reserve))
769 return;
770 /*
771 * If it is an SMP machine we should know now, unless the
772 * configuration is in an EISA/MCA bus machine with an
773 * extended bios data area.
774 *
775 * there is a real-mode segmented pointer pointing to the
776 * 4K EBDA area at 0x40E, calculate and scan it here.
777 *
778 * NOTE! There are Linux loaders that will corrupt the EBDA
779 * area, and as such this kind of SMP config may be less
780 * trustworthy, simply because the SMP table may have been
781 * stomped on during early boot. These loaders are buggy and
782 * should be fixed.
783 *
784 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
785 */
786
787 address = get_bios_ebda();
788 if (address)
789 smp_scan_config(address, 0x400, reserve);
790 }
791
792 void __init early_find_smp_config(void)
793 {
794 __find_smp_config(0);
795 }
796
797 void __init find_smp_config(void)
798 {
799 __find_smp_config(1);
800 }