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ACPI, x86: expose some IO-APIC routines when CONFIG_ACPI=n
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1 /*
2 * Intel Multiprocessor Specification 1.1 and 1.4
3 * compliant MP-table parsing routines.
4 *
5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
6 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
8 */
9
10 #include <linux/mm.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/bootmem.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/mc146818rtc.h>
16 #include <linux/bitops.h>
17 #include <linux/acpi.h>
18 #include <linux/module.h>
19 #include <linux/smp.h>
20 #include <linux/pci.h>
21
22 #include <asm/mtrr.h>
23 #include <asm/mpspec.h>
24 #include <asm/pgalloc.h>
25 #include <asm/io_apic.h>
26 #include <asm/proto.h>
27 #include <asm/bios_ebda.h>
28 #include <asm/e820.h>
29 #include <asm/trampoline.h>
30 #include <asm/setup.h>
31 #include <asm/smp.h>
32
33 #include <asm/apic.h>
34 /*
35 * Checksum an MP configuration block.
36 */
37
38 static int __init mpf_checksum(unsigned char *mp, int len)
39 {
40 int sum = 0;
41
42 while (len--)
43 sum += *mp++;
44
45 return sum & 0xFF;
46 }
47
48 static void __init MP_processor_info(struct mpc_cpu *m)
49 {
50 int apicid;
51 char *bootup_cpu = "";
52
53 if (!(m->cpuflag & CPU_ENABLED)) {
54 disabled_cpus++;
55 return;
56 }
57
58 if (x86_quirks->mpc_apic_id)
59 apicid = x86_quirks->mpc_apic_id(m);
60 else
61 apicid = m->apicid;
62
63 if (m->cpuflag & CPU_BOOTPROCESSOR) {
64 bootup_cpu = " (Bootup-CPU)";
65 boot_cpu_physical_apicid = m->apicid;
66 }
67
68 printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
69 generic_processor_info(apicid, m->apicver);
70 }
71
72 #ifdef CONFIG_X86_IO_APIC
73 static void __init MP_bus_info(struct mpc_bus *m)
74 {
75 char str[7];
76 memcpy(str, m->bustype, 6);
77 str[6] = 0;
78
79 if (x86_quirks->mpc_oem_bus_info)
80 x86_quirks->mpc_oem_bus_info(m, str);
81 else
82 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
83
84 #if MAX_MP_BUSSES < 256
85 if (m->busid >= MAX_MP_BUSSES) {
86 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
87 " is too large, max. supported is %d\n",
88 m->busid, str, MAX_MP_BUSSES - 1);
89 return;
90 }
91 #endif
92
93 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
94 set_bit(m->busid, mp_bus_not_pci);
95 #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
96 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
97 #endif
98 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
99 if (x86_quirks->mpc_oem_pci_bus)
100 x86_quirks->mpc_oem_pci_bus(m);
101
102 clear_bit(m->busid, mp_bus_not_pci);
103 #if defined(CONFIG_EISA) || defined(CONFIG_MCA)
104 mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
105 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
106 mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
107 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
108 mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
109 #endif
110 } else
111 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
112 }
113
114 static int bad_ioapic(unsigned long address)
115 {
116 if (nr_ioapics >= MAX_IO_APICS) {
117 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
118 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
119 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
120 }
121 if (!address) {
122 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
123 " found in table, skipping!\n");
124 return 1;
125 }
126 return 0;
127 }
128
129 static void __init MP_ioapic_info(struct mpc_ioapic *m)
130 {
131 if (!(m->flags & MPC_APIC_USABLE))
132 return;
133
134 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
135 m->apicid, m->apicver, m->apicaddr);
136
137 if (bad_ioapic(m->apicaddr))
138 return;
139
140 mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
141 mp_ioapics[nr_ioapics].apicid = m->apicid;
142 mp_ioapics[nr_ioapics].type = m->type;
143 mp_ioapics[nr_ioapics].apicver = m->apicver;
144 mp_ioapics[nr_ioapics].flags = m->flags;
145 nr_ioapics++;
146 }
147
148 static void print_MP_intsrc_info(struct mpc_intsrc *m)
149 {
150 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
151 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
152 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
153 m->srcbusirq, m->dstapic, m->dstirq);
154 }
155
156 static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
157 {
158 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
159 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
160 mp_irq->irqtype, mp_irq->irqflag & 3,
161 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
162 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
163 }
164
165 static void __init assign_to_mp_irq(struct mpc_intsrc *m,
166 struct mpc_intsrc *mp_irq)
167 {
168 mp_irq->dstapic = m->dstapic;
169 mp_irq->type = m->type;
170 mp_irq->irqtype = m->irqtype;
171 mp_irq->irqflag = m->irqflag;
172 mp_irq->srcbus = m->srcbus;
173 mp_irq->srcbusirq = m->srcbusirq;
174 mp_irq->dstirq = m->dstirq;
175 }
176
177 static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
178 struct mpc_intsrc *m)
179 {
180 m->dstapic = mp_irq->dstapic;
181 m->type = mp_irq->type;
182 m->irqtype = mp_irq->irqtype;
183 m->irqflag = mp_irq->irqflag;
184 m->srcbus = mp_irq->srcbus;
185 m->srcbusirq = mp_irq->srcbusirq;
186 m->dstirq = mp_irq->dstirq;
187 }
188
189 static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
190 struct mpc_intsrc *m)
191 {
192 if (mp_irq->dstapic != m->dstapic)
193 return 1;
194 if (mp_irq->type != m->type)
195 return 2;
196 if (mp_irq->irqtype != m->irqtype)
197 return 3;
198 if (mp_irq->irqflag != m->irqflag)
199 return 4;
200 if (mp_irq->srcbus != m->srcbus)
201 return 5;
202 if (mp_irq->srcbusirq != m->srcbusirq)
203 return 6;
204 if (mp_irq->dstirq != m->dstirq)
205 return 7;
206
207 return 0;
208 }
209
210 static void __init MP_intsrc_info(struct mpc_intsrc *m)
211 {
212 int i;
213
214 print_MP_intsrc_info(m);
215
216 for (i = 0; i < mp_irq_entries; i++) {
217 if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
218 return;
219 }
220
221 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
222 if (++mp_irq_entries == MAX_IRQ_SOURCES)
223 panic("Max # of irq sources exceeded!!\n");
224 }
225 #else /* CONFIG_X86_IO_APIC */
226 static inline void __init MP_bus_info(struct mpc_bus *m) {}
227 static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
228 static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {}
229 #endif /* CONFIG_X86_IO_APIC */
230
231
232 static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
233 {
234 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
235 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
236 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
237 m->srcbusirq, m->destapic, m->destapiclint);
238 }
239
240 /*
241 * Read/parse the MPC
242 */
243
244 static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
245 {
246
247 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
248 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
249 mpc->signature[0], mpc->signature[1],
250 mpc->signature[2], mpc->signature[3]);
251 return 0;
252 }
253 if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
254 printk(KERN_ERR "MPTABLE: checksum error!\n");
255 return 0;
256 }
257 if (mpc->spec != 0x01 && mpc->spec != 0x04) {
258 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
259 mpc->spec);
260 return 0;
261 }
262 if (!mpc->lapic) {
263 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
264 return 0;
265 }
266 memcpy(oem, mpc->oem, 8);
267 oem[8] = 0;
268 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
269
270 memcpy(str, mpc->productid, 12);
271 str[12] = 0;
272
273 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
274
275 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
276
277 return 1;
278 }
279
280 static void skip_entry(unsigned char **ptr, int *count, int size)
281 {
282 *ptr += size;
283 *count += size;
284 }
285
286 static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
287 {
288 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"
289 "type %x\n", *mpt);
290 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
291 1, mpc, mpc->length, 1);
292 }
293
294 static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
295 {
296 char str[16];
297 char oem[10];
298
299 int count = sizeof(*mpc);
300 unsigned char *mpt = ((unsigned char *)mpc) + count;
301
302 if (!smp_check_mpc(mpc, oem, str))
303 return 0;
304
305 #ifdef CONFIG_X86_32
306 generic_mps_oem_check(mpc, oem, str);
307 #endif
308 /* save the local APIC address, it might be non-default */
309 if (!acpi_lapic)
310 mp_lapic_addr = mpc->lapic;
311
312 if (early)
313 return 1;
314
315 if (mpc->oemptr && x86_quirks->smp_read_mpc_oem) {
316 struct mpc_oemtable *oem_table = (void *)(long)mpc->oemptr;
317 x86_quirks->smp_read_mpc_oem(oem_table, mpc->oemsize);
318 }
319
320 /*
321 * Now process the configuration blocks.
322 */
323 if (x86_quirks->mpc_record)
324 *x86_quirks->mpc_record = 0;
325
326 while (count < mpc->length) {
327 switch (*mpt) {
328 case MP_PROCESSOR:
329 /* ACPI may have already provided this data */
330 if (!acpi_lapic)
331 MP_processor_info((struct mpc_cpu *)mpt);
332 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
333 break;
334 case MP_BUS:
335 MP_bus_info((struct mpc_bus *)mpt);
336 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
337 break;
338 case MP_IOAPIC:
339 MP_ioapic_info((struct mpc_ioapic *)mpt);
340 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
341 break;
342 case MP_INTSRC:
343 MP_intsrc_info((struct mpc_intsrc *)mpt);
344 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
345 break;
346 case MP_LINTSRC:
347 MP_lintsrc_info((struct mpc_lintsrc *)mpt);
348 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
349 break;
350 default:
351 /* wrong mptable */
352 smp_dump_mptable(mpc, mpt);
353 count = mpc->length;
354 break;
355 }
356 if (x86_quirks->mpc_record)
357 (*x86_quirks->mpc_record)++;
358 }
359
360 #ifdef CONFIG_X86_BIGSMP
361 generic_bigsmp_probe();
362 #endif
363
364 if (apic->setup_apic_routing)
365 apic->setup_apic_routing();
366
367 if (!num_processors)
368 printk(KERN_ERR "MPTABLE: no processors registered!\n");
369 return num_processors;
370 }
371
372 #ifdef CONFIG_X86_IO_APIC
373
374 static int __init ELCR_trigger(unsigned int irq)
375 {
376 unsigned int port;
377
378 port = 0x4d0 + (irq >> 3);
379 return (inb(port) >> (irq & 7)) & 1;
380 }
381
382 static void __init construct_default_ioirq_mptable(int mpc_default_type)
383 {
384 struct mpc_intsrc intsrc;
385 int i;
386 int ELCR_fallback = 0;
387
388 intsrc.type = MP_INTSRC;
389 intsrc.irqflag = 0; /* conforming */
390 intsrc.srcbus = 0;
391 intsrc.dstapic = mp_ioapics[0].apicid;
392
393 intsrc.irqtype = mp_INT;
394
395 /*
396 * If true, we have an ISA/PCI system with no IRQ entries
397 * in the MP table. To prevent the PCI interrupts from being set up
398 * incorrectly, we try to use the ELCR. The sanity check to see if
399 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
400 * never be level sensitive, so we simply see if the ELCR agrees.
401 * If it does, we assume it's valid.
402 */
403 if (mpc_default_type == 5) {
404 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
405 "falling back to ELCR\n");
406
407 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
408 ELCR_trigger(13))
409 printk(KERN_ERR "ELCR contains invalid data... "
410 "not using ELCR\n");
411 else {
412 printk(KERN_INFO
413 "Using ELCR to identify PCI interrupts\n");
414 ELCR_fallback = 1;
415 }
416 }
417
418 for (i = 0; i < 16; i++) {
419 switch (mpc_default_type) {
420 case 2:
421 if (i == 0 || i == 13)
422 continue; /* IRQ0 & IRQ13 not connected */
423 /* fall through */
424 default:
425 if (i == 2)
426 continue; /* IRQ2 is never connected */
427 }
428
429 if (ELCR_fallback) {
430 /*
431 * If the ELCR indicates a level-sensitive interrupt, we
432 * copy that information over to the MP table in the
433 * irqflag field (level sensitive, active high polarity).
434 */
435 if (ELCR_trigger(i))
436 intsrc.irqflag = 13;
437 else
438 intsrc.irqflag = 0;
439 }
440
441 intsrc.srcbusirq = i;
442 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
443 MP_intsrc_info(&intsrc);
444 }
445
446 intsrc.irqtype = mp_ExtINT;
447 intsrc.srcbusirq = 0;
448 intsrc.dstirq = 0; /* 8259A to INTIN0 */
449 MP_intsrc_info(&intsrc);
450 }
451
452
453 static void __init construct_ioapic_table(int mpc_default_type)
454 {
455 struct mpc_ioapic ioapic;
456 struct mpc_bus bus;
457
458 bus.type = MP_BUS;
459 bus.busid = 0;
460 switch (mpc_default_type) {
461 default:
462 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
463 mpc_default_type);
464 /* fall through */
465 case 1:
466 case 5:
467 memcpy(bus.bustype, "ISA ", 6);
468 break;
469 case 2:
470 case 6:
471 case 3:
472 memcpy(bus.bustype, "EISA ", 6);
473 break;
474 case 4:
475 case 7:
476 memcpy(bus.bustype, "MCA ", 6);
477 }
478 MP_bus_info(&bus);
479 if (mpc_default_type > 4) {
480 bus.busid = 1;
481 memcpy(bus.bustype, "PCI ", 6);
482 MP_bus_info(&bus);
483 }
484
485 ioapic.type = MP_IOAPIC;
486 ioapic.apicid = 2;
487 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
488 ioapic.flags = MPC_APIC_USABLE;
489 ioapic.apicaddr = 0xFEC00000;
490 MP_ioapic_info(&ioapic);
491
492 /*
493 * We set up most of the low 16 IO-APIC pins according to MPS rules.
494 */
495 construct_default_ioirq_mptable(mpc_default_type);
496 }
497 #else
498 static inline void __init construct_ioapic_table(int mpc_default_type) { }
499 #endif
500
501 static inline void __init construct_default_ISA_mptable(int mpc_default_type)
502 {
503 struct mpc_cpu processor;
504 struct mpc_lintsrc lintsrc;
505 int linttypes[2] = { mp_ExtINT, mp_NMI };
506 int i;
507
508 /*
509 * local APIC has default address
510 */
511 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
512
513 /*
514 * 2 CPUs, numbered 0 & 1.
515 */
516 processor.type = MP_PROCESSOR;
517 /* Either an integrated APIC or a discrete 82489DX. */
518 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
519 processor.cpuflag = CPU_ENABLED;
520 processor.cpufeature = (boot_cpu_data.x86 << 8) |
521 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
522 processor.featureflag = boot_cpu_data.x86_capability[0];
523 processor.reserved[0] = 0;
524 processor.reserved[1] = 0;
525 for (i = 0; i < 2; i++) {
526 processor.apicid = i;
527 MP_processor_info(&processor);
528 }
529
530 construct_ioapic_table(mpc_default_type);
531
532 lintsrc.type = MP_LINTSRC;
533 lintsrc.irqflag = 0; /* conforming */
534 lintsrc.srcbusid = 0;
535 lintsrc.srcbusirq = 0;
536 lintsrc.destapic = MP_APIC_ALL;
537 for (i = 0; i < 2; i++) {
538 lintsrc.irqtype = linttypes[i];
539 lintsrc.destapiclint = i;
540 MP_lintsrc_info(&lintsrc);
541 }
542 }
543
544 static struct mpf_intel *mpf_found;
545
546 static unsigned long __init get_mpc_size(unsigned long physptr)
547 {
548 struct mpc_table *mpc;
549 unsigned long size;
550
551 mpc = early_ioremap(physptr, PAGE_SIZE);
552 size = mpc->length;
553 early_iounmap(mpc, PAGE_SIZE);
554 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size);
555
556 return size;
557 }
558
559 static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
560 {
561 struct mpc_table *mpc;
562 unsigned long size;
563
564 size = get_mpc_size(mpf->physptr);
565 mpc = early_ioremap(mpf->physptr, size);
566 /*
567 * Read the physical hardware table. Anything here will
568 * override the defaults.
569 */
570 if (!smp_read_mpc(mpc, early)) {
571 #ifdef CONFIG_X86_LOCAL_APIC
572 smp_found_config = 0;
573 #endif
574 printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"
575 "... disabling SMP support. (tell your hw vendor)\n");
576 early_iounmap(mpc, size);
577 return -1;
578 }
579 early_iounmap(mpc, size);
580
581 if (early)
582 return -1;
583
584 #ifdef CONFIG_X86_IO_APIC
585 /*
586 * If there are no explicit MP IRQ entries, then we are
587 * broken. We set up most of the low 16 IO-APIC pins to
588 * ISA defaults and hope it will work.
589 */
590 if (!mp_irq_entries) {
591 struct mpc_bus bus;
592
593 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
594 "using default mptable. (tell your hw vendor)\n");
595
596 bus.type = MP_BUS;
597 bus.busid = 0;
598 memcpy(bus.bustype, "ISA ", 6);
599 MP_bus_info(&bus);
600
601 construct_default_ioirq_mptable(0);
602 }
603 #endif
604
605 return 0;
606 }
607
608 /*
609 * Scan the memory blocks for an SMP configuration block.
610 */
611 static void __init __get_smp_config(unsigned int early)
612 {
613 struct mpf_intel *mpf = mpf_found;
614
615 if (!mpf)
616 return;
617
618 if (acpi_lapic && early)
619 return;
620
621 /*
622 * MPS doesn't support hyperthreading, aka only have
623 * thread 0 apic id in MPS table
624 */
625 if (acpi_lapic && acpi_ioapic)
626 return;
627
628 if (x86_quirks->mach_get_smp_config) {
629 if (x86_quirks->mach_get_smp_config(early))
630 return;
631 }
632
633 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
634 mpf->specification);
635 #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
636 if (mpf->feature2 & (1 << 7)) {
637 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
638 pic_mode = 1;
639 } else {
640 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
641 pic_mode = 0;
642 }
643 #endif
644 /*
645 * Now see if we need to read further.
646 */
647 if (mpf->feature1 != 0) {
648 if (early) {
649 /*
650 * local APIC has default address
651 */
652 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
653 return;
654 }
655
656 printk(KERN_INFO "Default MP configuration #%d\n",
657 mpf->feature1);
658 construct_default_ISA_mptable(mpf->feature1);
659
660 } else if (mpf->physptr) {
661 if (check_physptr(mpf, early))
662 return;
663 } else
664 BUG();
665
666 if (!early)
667 printk(KERN_INFO "Processors: %d\n", num_processors);
668 /*
669 * Only use the first configuration found.
670 */
671 }
672
673 void __init early_get_smp_config(void)
674 {
675 __get_smp_config(1);
676 }
677
678 void __init get_smp_config(void)
679 {
680 __get_smp_config(0);
681 }
682
683 static void __init smp_reserve_bootmem(struct mpf_intel *mpf)
684 {
685 unsigned long size = get_mpc_size(mpf->physptr);
686 #ifdef CONFIG_X86_32
687 /*
688 * We cannot access to MPC table to compute table size yet,
689 * as only few megabytes from the bottom is mapped now.
690 * PC-9800's MPC table places on the very last of physical
691 * memory; so that simply reserving PAGE_SIZE from mpf->physptr
692 * yields BUG() in reserve_bootmem.
693 * also need to make sure physptr is below than max_low_pfn
694 * we don't need reserve the area above max_low_pfn
695 */
696 unsigned long end = max_low_pfn * PAGE_SIZE;
697
698 if (mpf->physptr < end) {
699 if (mpf->physptr + size > end)
700 size = end - mpf->physptr;
701 reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
702 }
703 #else
704 reserve_bootmem_generic(mpf->physptr, size, BOOTMEM_DEFAULT);
705 #endif
706 }
707
708 static int __init smp_scan_config(unsigned long base, unsigned long length,
709 unsigned reserve)
710 {
711 unsigned int *bp = phys_to_virt(base);
712 struct mpf_intel *mpf;
713
714 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
715 bp, length);
716 BUILD_BUG_ON(sizeof(*mpf) != 16);
717
718 while (length > 0) {
719 mpf = (struct mpf_intel *)bp;
720 if ((*bp == SMP_MAGIC_IDENT) &&
721 (mpf->length == 1) &&
722 !mpf_checksum((unsigned char *)bp, 16) &&
723 ((mpf->specification == 1)
724 || (mpf->specification == 4))) {
725 #ifdef CONFIG_X86_LOCAL_APIC
726 smp_found_config = 1;
727 #endif
728 mpf_found = mpf;
729
730 printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
731 mpf, (u64)virt_to_phys(mpf));
732
733 if (!reserve)
734 return 1;
735 reserve_bootmem_generic(virt_to_phys(mpf), sizeof(*mpf),
736 BOOTMEM_DEFAULT);
737 if (mpf->physptr)
738 smp_reserve_bootmem(mpf);
739
740 return 1;
741 }
742 bp += 4;
743 length -= 16;
744 }
745 return 0;
746 }
747
748 static void __init __find_smp_config(unsigned int reserve)
749 {
750 unsigned int address;
751
752 if (x86_quirks->mach_find_smp_config) {
753 if (x86_quirks->mach_find_smp_config(reserve))
754 return;
755 }
756 /*
757 * FIXME: Linux assumes you have 640K of base ram..
758 * this continues the error...
759 *
760 * 1) Scan the bottom 1K for a signature
761 * 2) Scan the top 1K of base RAM
762 * 3) Scan the 64K of bios
763 */
764 if (smp_scan_config(0x0, 0x400, reserve) ||
765 smp_scan_config(639 * 0x400, 0x400, reserve) ||
766 smp_scan_config(0xF0000, 0x10000, reserve))
767 return;
768 /*
769 * If it is an SMP machine we should know now, unless the
770 * configuration is in an EISA/MCA bus machine with an
771 * extended bios data area.
772 *
773 * there is a real-mode segmented pointer pointing to the
774 * 4K EBDA area at 0x40E, calculate and scan it here.
775 *
776 * NOTE! There are Linux loaders that will corrupt the EBDA
777 * area, and as such this kind of SMP config may be less
778 * trustworthy, simply because the SMP table may have been
779 * stomped on during early boot. These loaders are buggy and
780 * should be fixed.
781 *
782 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
783 */
784
785 address = get_bios_ebda();
786 if (address)
787 smp_scan_config(address, 0x400, reserve);
788 }
789
790 void __init early_find_smp_config(void)
791 {
792 __find_smp_config(0);
793 }
794
795 void __init find_smp_config(void)
796 {
797 __find_smp_config(1);
798 }
799
800 #ifdef CONFIG_X86_IO_APIC
801 static u8 __initdata irq_used[MAX_IRQ_SOURCES];
802
803 static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
804 {
805 int i;
806
807 if (m->irqtype != mp_INT)
808 return 0;
809
810 if (m->irqflag != 0x0f)
811 return 0;
812
813 /* not legacy */
814
815 for (i = 0; i < mp_irq_entries; i++) {
816 if (mp_irqs[i].irqtype != mp_INT)
817 continue;
818
819 if (mp_irqs[i].irqflag != 0x0f)
820 continue;
821
822 if (mp_irqs[i].srcbus != m->srcbus)
823 continue;
824 if (mp_irqs[i].srcbusirq != m->srcbusirq)
825 continue;
826 if (irq_used[i]) {
827 /* already claimed */
828 return -2;
829 }
830 irq_used[i] = 1;
831 return i;
832 }
833
834 /* not found */
835 return -1;
836 }
837
838 #define SPARE_SLOT_NUM 20
839
840 static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
841
842 static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
843 {
844 int i;
845
846 apic_printk(APIC_VERBOSE, "OLD ");
847 print_MP_intsrc_info(m);
848
849 i = get_MP_intsrc_index(m);
850 if (i > 0) {
851 assign_to_mpc_intsrc(&mp_irqs[i], m);
852 apic_printk(APIC_VERBOSE, "NEW ");
853 print_mp_irq_info(&mp_irqs[i]);
854 return;
855 }
856 if (!i) {
857 /* legacy, do nothing */
858 return;
859 }
860 if (*nr_m_spare < SPARE_SLOT_NUM) {
861 /*
862 * not found (-1), or duplicated (-2) are invalid entries,
863 * we need to use the slot later
864 */
865 m_spare[*nr_m_spare] = m;
866 *nr_m_spare += 1;
867 }
868 }
869 #else /* CONFIG_X86_IO_APIC */
870 static
871 inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
872 #endif /* CONFIG_X86_IO_APIC */
873
874 static int
875 check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
876 {
877 int ret = 0;
878
879 if (!mpc_new_phys || count <= mpc_new_length) {
880 WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
881 return -1;
882 }
883
884 return ret;
885 }
886
887 static int __init replace_intsrc_all(struct mpc_table *mpc,
888 unsigned long mpc_new_phys,
889 unsigned long mpc_new_length)
890 {
891 #ifdef CONFIG_X86_IO_APIC
892 int i;
893 #endif
894 int count = sizeof(*mpc);
895 int nr_m_spare = 0;
896 unsigned char *mpt = ((unsigned char *)mpc) + count;
897
898 printk(KERN_INFO "mpc_length %x\n", mpc->length);
899 while (count < mpc->length) {
900 switch (*mpt) {
901 case MP_PROCESSOR:
902 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
903 break;
904 case MP_BUS:
905 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
906 break;
907 case MP_IOAPIC:
908 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
909 break;
910 case MP_INTSRC:
911 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
912 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
913 break;
914 case MP_LINTSRC:
915 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
916 break;
917 default:
918 /* wrong mptable */
919 smp_dump_mptable(mpc, mpt);
920 goto out;
921 }
922 }
923
924 #ifdef CONFIG_X86_IO_APIC
925 for (i = 0; i < mp_irq_entries; i++) {
926 if (irq_used[i])
927 continue;
928
929 if (mp_irqs[i].irqtype != mp_INT)
930 continue;
931
932 if (mp_irqs[i].irqflag != 0x0f)
933 continue;
934
935 if (nr_m_spare > 0) {
936 apic_printk(APIC_VERBOSE, "*NEW* found\n");
937 nr_m_spare--;
938 assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
939 m_spare[nr_m_spare] = NULL;
940 } else {
941 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
942 count += sizeof(struct mpc_intsrc);
943 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
944 goto out;
945 assign_to_mpc_intsrc(&mp_irqs[i], m);
946 mpc->length = count;
947 mpt += sizeof(struct mpc_intsrc);
948 }
949 print_mp_irq_info(&mp_irqs[i]);
950 }
951 #endif
952 out:
953 /* update checksum */
954 mpc->checksum = 0;
955 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
956
957 return 0;
958 }
959
960 int enable_update_mptable;
961
962 static int __init update_mptable_setup(char *str)
963 {
964 enable_update_mptable = 1;
965 #ifdef CONFIG_PCI
966 pci_routeirq = 1;
967 #endif
968 return 0;
969 }
970 early_param("update_mptable", update_mptable_setup);
971
972 static unsigned long __initdata mpc_new_phys;
973 static unsigned long mpc_new_length __initdata = 4096;
974
975 /* alloc_mptable or alloc_mptable=4k */
976 static int __initdata alloc_mptable;
977 static int __init parse_alloc_mptable_opt(char *p)
978 {
979 enable_update_mptable = 1;
980 #ifdef CONFIG_PCI
981 pci_routeirq = 1;
982 #endif
983 alloc_mptable = 1;
984 if (!p)
985 return 0;
986 mpc_new_length = memparse(p, &p);
987 return 0;
988 }
989 early_param("alloc_mptable", parse_alloc_mptable_opt);
990
991 void __init early_reserve_e820_mpc_new(void)
992 {
993 if (enable_update_mptable && alloc_mptable) {
994 u64 startt = 0;
995 #ifdef CONFIG_X86_TRAMPOLINE
996 startt = TRAMPOLINE_BASE;
997 #endif
998 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
999 }
1000 }
1001
1002 static int __init update_mp_table(void)
1003 {
1004 char str[16];
1005 char oem[10];
1006 struct mpf_intel *mpf;
1007 struct mpc_table *mpc, *mpc_new;
1008
1009 if (!enable_update_mptable)
1010 return 0;
1011
1012 mpf = mpf_found;
1013 if (!mpf)
1014 return 0;
1015
1016 /*
1017 * Now see if we need to go further.
1018 */
1019 if (mpf->feature1 != 0)
1020 return 0;
1021
1022 if (!mpf->physptr)
1023 return 0;
1024
1025 mpc = phys_to_virt(mpf->physptr);
1026
1027 if (!smp_check_mpc(mpc, oem, str))
1028 return 0;
1029
1030 printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
1031 printk(KERN_INFO "physptr: %x\n", mpf->physptr);
1032
1033 if (mpc_new_phys && mpc->length > mpc_new_length) {
1034 mpc_new_phys = 0;
1035 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
1036 mpc_new_length);
1037 }
1038
1039 if (!mpc_new_phys) {
1040 unsigned char old, new;
1041 /* check if we can change the postion */
1042 mpc->checksum = 0;
1043 old = mpf_checksum((unsigned char *)mpc, mpc->length);
1044 mpc->checksum = 0xff;
1045 new = mpf_checksum((unsigned char *)mpc, mpc->length);
1046 if (old == new) {
1047 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
1048 return 0;
1049 }
1050 printk(KERN_INFO "use in-positon replacing\n");
1051 } else {
1052 mpf->physptr = mpc_new_phys;
1053 mpc_new = phys_to_virt(mpc_new_phys);
1054 memcpy(mpc_new, mpc, mpc->length);
1055 mpc = mpc_new;
1056 /* check if we can modify that */
1057 if (mpc_new_phys - mpf->physptr) {
1058 struct mpf_intel *mpf_new;
1059 /* steal 16 bytes from [0, 1k) */
1060 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
1061 mpf_new = phys_to_virt(0x400 - 16);
1062 memcpy(mpf_new, mpf, 16);
1063 mpf = mpf_new;
1064 mpf->physptr = mpc_new_phys;
1065 }
1066 mpf->checksum = 0;
1067 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
1068 printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
1069 }
1070
1071 /*
1072 * only replace the one with mp_INT and
1073 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
1074 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
1075 * may need pci=routeirq for all coverage
1076 */
1077 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
1078
1079 return 0;
1080 }
1081
1082 late_initcall(update_mp_table);