2 * Written by: Patricia Gaughen, IBM Corporation
4 * Copyright (C) 2002, IBM Corp.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
16 * NON INFRINGEMENT. See the GNU General Public License for more
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * Send feedback to <gone@us.ibm.com>
26 #include <linux/nodemask.h>
27 #include <linux/bootmem.h>
28 #include <linux/mmzone.h>
29 #include <linux/module.h>
32 #include <asm/processor.h>
33 #include <asm/topology.h>
34 #include <asm/genapic.h>
35 #include <asm/numaq.h>
36 #include <asm/setup.h>
39 #define MB_TO_PAGES(addr) ((addr) << (20 - PAGE_SHIFT))
42 * Function: smp_dump_qct()
44 * Description: gets memory layout from the quad config table. This
45 * function also updates node_online_map with the nodes (quads) present.
47 static void __init
smp_dump_qct(void)
50 struct eachquadmem
*eq
;
51 struct sys_cfg_data
*scd
=
52 (struct sys_cfg_data
*)__va(SYS_CFG_DATA_PRIV_ADDR
);
54 nodes_clear(node_online_map
);
56 if (scd
->quads_present31_0
& (1 << node
)) {
57 node_set_online(node
);
59 /* Convert to pages */
60 node_start_pfn
[node
] = MB_TO_PAGES(
61 eq
->hi_shrd_mem_start
- eq
->priv_mem_size
);
62 node_end_pfn
[node
] = MB_TO_PAGES(
63 eq
->hi_shrd_mem_start
+ eq
->hi_shrd_mem_size
);
65 e820_register_active_regions(node
, node_start_pfn
[node
],
68 node_start_pfn
[node
], node_end_pfn
[node
]);
69 node_remap_size
[node
] = node_memmap_size_bytes(node
,
77 void __cpuinit
numaq_tsc_disable(void)
82 if (num_online_nodes() > 1) {
83 printk(KERN_DEBUG
"NUMAQ: disabling TSC\n");
84 setup_clear_cpu_cap(X86_FEATURE_TSC
);
88 static int __init
numaq_pre_time_init(void)
97 * Have to match translation table entries to main table entries by counter
98 * hence the mpc_record variable .... can't see a less disgusting way of
101 struct mpc_config_translation
{
102 unsigned char mpc_type
;
103 unsigned char trans_len
;
104 unsigned char trans_type
;
105 unsigned char trans_quad
;
106 unsigned char trans_global
;
107 unsigned char trans_local
;
108 unsigned short trans_reserved
;
111 /* x86_quirks member */
112 static int mpc_record
;
113 static struct mpc_config_translation
*translation_table
[MAX_MPC_ENTRY
]
116 static inline int generate_logical_apicid(int quad
, int phys_apicid
)
118 return (quad
<< 4) + (phys_apicid
? phys_apicid
<< 1 : 1);
121 /* x86_quirks member */
122 static int mpc_apic_id(struct mpc_cpu
*m
)
124 int quad
= translation_table
[mpc_record
]->trans_quad
;
125 int logical_apicid
= generate_logical_apicid(quad
, m
->apicid
);
127 printk(KERN_DEBUG
"Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n",
128 m
->apicid
, (m
->cpufeature
& CPU_FAMILY_MASK
) >> 8,
129 (m
->cpufeature
& CPU_MODEL_MASK
) >> 4,
130 m
->apicver
, quad
, logical_apicid
);
131 return logical_apicid
;
134 int mp_bus_id_to_node
[MAX_MP_BUSSES
];
136 int mp_bus_id_to_local
[MAX_MP_BUSSES
];
138 /* x86_quirks member */
139 static void mpc_oem_bus_info(struct mpc_bus
*m
, char *name
)
141 int quad
= translation_table
[mpc_record
]->trans_quad
;
142 int local
= translation_table
[mpc_record
]->trans_local
;
144 mp_bus_id_to_node
[m
->busid
] = quad
;
145 mp_bus_id_to_local
[m
->busid
] = local
;
146 printk(KERN_INFO
"Bus #%d is %s (node %d)\n",
147 m
->busid
, name
, quad
);
150 int quad_local_to_mp_bus_id
[NR_CPUS
/4][4];
152 /* x86_quirks member */
153 static void mpc_oem_pci_bus(struct mpc_bus
*m
)
155 int quad
= translation_table
[mpc_record
]->trans_quad
;
156 int local
= translation_table
[mpc_record
]->trans_local
;
158 quad_local_to_mp_bus_id
[quad
][local
] = m
->busid
;
161 static void __init
MP_translation_info(struct mpc_config_translation
*m
)
164 "Translation: record %d, type %d, quad %d, global %d, local %d\n",
165 mpc_record
, m
->trans_type
, m
->trans_quad
, m
->trans_global
,
168 if (mpc_record
>= MAX_MPC_ENTRY
)
169 printk(KERN_ERR
"MAX_MPC_ENTRY exceeded!\n");
171 translation_table
[mpc_record
] = m
; /* stash this for later */
172 if (m
->trans_quad
< MAX_NUMNODES
&& !node_online(m
->trans_quad
))
173 node_set_online(m
->trans_quad
);
176 static int __init
mpf_checksum(unsigned char *mp
, int len
)
187 * Read/parse the MPC oem tables
190 static void __init
smp_read_mpc_oem(struct mpc_oemtable
*oemtable
,
191 unsigned short oemsize
)
193 int count
= sizeof(*oemtable
); /* the header size */
194 unsigned char *oemptr
= ((unsigned char *)oemtable
) + count
;
197 printk(KERN_INFO
"Found an OEM MPC table at %8p - parsing it ... \n",
199 if (memcmp(oemtable
->signature
, MPC_OEM_SIGNATURE
, 4)) {
201 "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
202 oemtable
->signature
[0], oemtable
->signature
[1],
203 oemtable
->signature
[2], oemtable
->signature
[3]);
206 if (mpf_checksum((unsigned char *)oemtable
, oemtable
->length
)) {
207 printk(KERN_WARNING
"SMP oem mptable: checksum error!\n");
210 while (count
< oemtable
->length
) {
214 struct mpc_config_translation
*m
=
215 (struct mpc_config_translation
*)oemptr
;
216 MP_translation_info(m
);
217 oemptr
+= sizeof(*m
);
225 "Unrecognised OEM table entry type! - %d\n",
233 static int __init
numaq_setup_ioapic_ids(void)
239 static int __init
numaq_update_genapic(void)
241 apic
->wakeup_cpu
= wakeup_secondary_cpu_via_nmi
;
246 static struct x86_quirks numaq_x86_quirks __initdata
= {
247 .arch_pre_time_init
= numaq_pre_time_init
,
248 .arch_time_init
= NULL
,
249 .arch_pre_intr_init
= NULL
,
250 .arch_memory_setup
= NULL
,
251 .arch_intr_init
= NULL
,
252 .arch_trap_init
= NULL
,
253 .mach_get_smp_config
= NULL
,
254 .mach_find_smp_config
= NULL
,
255 .mpc_record
= &mpc_record
,
256 .mpc_apic_id
= mpc_apic_id
,
257 .mpc_oem_bus_info
= mpc_oem_bus_info
,
258 .mpc_oem_pci_bus
= mpc_oem_pci_bus
,
259 .smp_read_mpc_oem
= smp_read_mpc_oem
,
260 .setup_ioapic_ids
= numaq_setup_ioapic_ids
,
261 .update_genapic
= numaq_update_genapic
,
264 void numaq_mps_oem_check(struct mpc_table
*mpc
, char *oem
, char *productid
)
266 if (strncmp(oem
, "IBM NUMA", 8))
267 printk("Warning! Not a NUMA-Q system!\n");
272 static __init
void early_check_numaq(void)
275 * Find possible boot-time SMP configuration:
277 early_find_smp_config();
279 * get boot-time SMP configuration:
281 if (smp_found_config
)
282 early_get_smp_config();
285 x86_quirks
= &numaq_x86_quirks
;
288 int __init
get_memcfg_numaq(void)
298 * APIC driver for the IBM NUMAQ chipset.
300 #define APIC_DEFINITION 1
301 #include <linux/threads.h>
302 #include <linux/cpumask.h>
303 #include <asm/mpspec.h>
304 #include <asm/genapic.h>
305 #include <asm/fixmap.h>
306 #include <asm/apicdef.h>
308 #include <linux/kernel.h>
309 #include <linux/string.h>
310 #include <linux/init.h>
311 #include <linux/numa.h>
312 #include <linux/smp.h>
313 #include <asm/numaq.h>
315 #include <linux/mmzone.h>
316 #include <linux/nodemask.h>
318 #define NUMAQ_APIC_DFR_VALUE (APIC_DFR_CLUSTER)
320 static inline unsigned int numaq_get_apic_id(unsigned long x
)
322 return (x
>> 24) & 0x0F;
325 static inline void numaq_send_IPI_mask(const struct cpumask
*mask
, int vector
)
327 default_send_IPI_mask_sequence_logical(mask
, vector
);
330 static inline void numaq_send_IPI_allbutself(int vector
)
332 default_send_IPI_mask_allbutself_logical(cpu_online_mask
, vector
);
335 static inline void numaq_send_IPI_all(int vector
)
337 numaq_send_IPI_mask(cpu_online_mask
, vector
);
340 extern void numaq_mps_oem_check(struct mpc_table
*, char *, char *);
342 #define NUMAQ_TRAMPOLINE_PHYS_LOW (0x8)
343 #define NUMAQ_TRAMPOLINE_PHYS_HIGH (0xa)
346 * Because we use NMIs rather than the INIT-STARTUP sequence to
347 * bootstrap the CPUs, the APIC may be in a weird state. Kick it:
349 static inline void numaq_smp_callin_clear_local_apic(void)
355 numaq_store_NMI_vector(unsigned short *high
, unsigned short *low
)
357 printk("Storing NMI vector\n");
359 *((volatile unsigned short *)phys_to_virt(NUMAQ_TRAMPOLINE_PHYS_HIGH
));
361 *((volatile unsigned short *)phys_to_virt(NUMAQ_TRAMPOLINE_PHYS_LOW
));
364 static inline const cpumask_t
*numaq_target_cpus(void)
366 return &CPU_MASK_ALL
;
369 static inline unsigned long
370 numaq_check_apicid_used(physid_mask_t bitmap
, int apicid
)
372 return physid_isset(apicid
, bitmap
);
375 static inline unsigned long numaq_check_apicid_present(int bit
)
377 return physid_isset(bit
, phys_cpu_present_map
);
380 #define apicid_cluster(apicid) (apicid & 0xF0)
382 static inline int numaq_apic_id_registered(void)
387 static inline void numaq_init_apic_ldr(void)
389 /* Already done in NUMA-Q firmware */
392 static inline void numaq_setup_apic_routing(void)
394 printk("Enabling APIC mode: %s. Using %d I/O APICs\n",
395 "NUMA-Q", nr_ioapics
);
399 * Skip adding the timer int on secondary nodes, which causes
400 * a small but painful rift in the time-space continuum.
402 static inline int numaq_multi_timer_check(int apic
, int irq
)
404 return apic
!= 0 && irq
== 0;
407 static inline physid_mask_t
numaq_ioapic_phys_id_map(physid_mask_t phys_map
)
409 /* We don't have a good way to do this yet - hack */
410 return physids_promote(0xFUL
);
413 /* Mapping from cpu number to logical apicid */
414 extern u8 cpu_2_logical_apicid
[];
416 static inline int numaq_cpu_to_logical_apicid(int cpu
)
418 if (cpu
>= nr_cpu_ids
)
420 return (int)cpu_2_logical_apicid
[cpu
];
424 * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
425 * cpu to APIC ID relation to properly interact with the intelligent
426 * mode of the cluster controller.
428 static inline int numaq_cpu_present_to_apicid(int mps_cpu
)
431 return ((mps_cpu
>> 2) << 4) | (1 << (mps_cpu
& 0x3));
436 static inline int numaq_apicid_to_node(int logical_apicid
)
438 return logical_apicid
>> 4;
441 static inline physid_mask_t
numaq_apicid_to_cpu_present(int logical_apicid
)
443 int node
= numaq_apicid_to_node(logical_apicid
);
444 int cpu
= __ffs(logical_apicid
& 0xf);
446 return physid_mask_of_physid(cpu
+ 4*node
);
449 /* Where the IO area was mapped on multiquad, always 0 otherwise */
452 static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid
)
458 * We use physical apicids here, not logical, so just return the default
459 * physical broadcast to stop people from breaking us
461 static inline unsigned int numaq_cpu_mask_to_apicid(const cpumask_t
*cpumask
)
466 static inline unsigned int
467 numaq_cpu_mask_to_apicid_and(const struct cpumask
*cpumask
,
468 const struct cpumask
*andmask
)
473 /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
474 static inline int numaq_phys_pkg_id(int cpuid_apic
, int index_msb
)
476 return cpuid_apic
>> index_msb
;
478 static int __numaq_mps_oem_check(struct mpc_table
*mpc
, char *oem
, char *productid
)
480 numaq_mps_oem_check(mpc
, oem
, productid
);
484 static int probe_numaq(void)
486 /* already know from get_memcfg_numaq() */
490 static void numaq_vector_allocation_domain(int cpu
, cpumask_t
*retmask
)
492 /* Careful. Some cpus do not strictly honor the set of cpus
493 * specified in the interrupt destination when using lowest
494 * priority interrupt delivery mode.
496 * In particular there was a hyperthreading cpu observed to
497 * deliver interrupts to the wrong hyperthread when only one
498 * hyperthread was specified in the interrupt desitination.
500 *retmask
= (cpumask_t
){ { [0] = APIC_ALL_CPUS
, } };
503 static void numaq_setup_portio_remap(void)
505 int num_quads
= num_online_nodes();
510 printk("Remapping cross-quad port I/O for %d quads\n", num_quads
);
511 xquad_portio
= ioremap(XQUAD_PORTIO_BASE
, num_quads
*XQUAD_PORTIO_QUAD
);
512 printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
513 (u_long
) xquad_portio
, (u_long
) num_quads
*XQUAD_PORTIO_QUAD
);
516 struct genapic apic_numaq
= {
519 .probe
= probe_numaq
,
520 .acpi_madt_oem_check
= NULL
,
521 .apic_id_registered
= numaq_apic_id_registered
,
523 .irq_delivery_mode
= dest_LowestPrio
,
524 /* physical delivery on LOCAL quad: */
527 .target_cpus
= numaq_target_cpus
,
529 .dest_logical
= APIC_DEST_LOGICAL
,
530 .check_apicid_used
= numaq_check_apicid_used
,
531 .check_apicid_present
= numaq_check_apicid_present
,
533 .vector_allocation_domain
= numaq_vector_allocation_domain
,
534 .init_apic_ldr
= numaq_init_apic_ldr
,
536 .ioapic_phys_id_map
= numaq_ioapic_phys_id_map
,
537 .setup_apic_routing
= numaq_setup_apic_routing
,
538 .multi_timer_check
= numaq_multi_timer_check
,
539 .apicid_to_node
= numaq_apicid_to_node
,
540 .cpu_to_logical_apicid
= numaq_cpu_to_logical_apicid
,
541 .cpu_present_to_apicid
= numaq_cpu_present_to_apicid
,
542 .apicid_to_cpu_present
= numaq_apicid_to_cpu_present
,
543 .setup_portio_remap
= numaq_setup_portio_remap
,
544 .check_phys_apicid_present
= numaq_check_phys_apicid_present
,
545 .enable_apic_mode
= NULL
,
546 .phys_pkg_id
= numaq_phys_pkg_id
,
547 .mps_oem_check
= __numaq_mps_oem_check
,
549 .get_apic_id
= numaq_get_apic_id
,
551 .apic_id_mask
= 0x0F << 24,
553 .cpu_mask_to_apicid
= numaq_cpu_mask_to_apicid
,
554 .cpu_mask_to_apicid_and
= numaq_cpu_mask_to_apicid_and
,
556 .send_IPI_mask
= numaq_send_IPI_mask
,
557 .send_IPI_mask_allbutself
= NULL
,
558 .send_IPI_allbutself
= numaq_send_IPI_allbutself
,
559 .send_IPI_all
= numaq_send_IPI_all
,
560 .send_IPI_self
= default_send_IPI_self
,
563 .trampoline_phys_low
= NUMAQ_TRAMPOLINE_PHYS_LOW
,
564 .trampoline_phys_high
= NUMAQ_TRAMPOLINE_PHYS_HIGH
,
566 /* We don't do anything here because we use NMI's to boot instead */
567 .wait_for_init_deassert
= NULL
,
569 .smp_callin_clear_local_apic
= numaq_smp_callin_clear_local_apic
,
570 .store_NMI_vector
= numaq_store_NMI_vector
,
571 .inquire_remote_apic
= NULL
,