arch/x86/kernel/process.c

   1 #include <linux/errno.h>
   2 #include <linux/kernel.h>
   3 #include <linux/mm.h>
   4 #include <linux/smp.h>
   5 #include <linux/prctl.h>
   6 #include <linux/slab.h>
   7 #include <linux/sched.h>
   8 #include <linux/module.h>
   9 #include <linux/pm.h>
  10 #include <linux/clockchips.h>
  11 #include <linux/random.h>
  12 #include <linux/user-return-notifier.h>
  13 #include <linux/dmi.h>
  14 #include <linux/utsname.h>
  15 #include <linux/stackprotector.h>
  16 #include <linux/tick.h>
  17 #include <linux/cpuidle.h>
  18 #include <trace/events/power.h>
  19 #include <linux/hw_breakpoint.h>
  20 #include <asm/cpu.h>
  21 #include <asm/apic.h>
  22 #include <asm/syscalls.h>
  23 #include <asm/idle.h>
  24 #include <asm/uaccess.h>
  25 #include <asm/i387.h>
  26 #include <asm/fpu-internal.h>
  27 #include <asm/debugreg.h>
  28 #include <asm/nmi.h>
  29
  30 #ifdef CONFIG_X86_64
  31 static DEFINE_PER_CPU(unsigned char, is_idle);
  32 static ATOMIC_NOTIFIER_HEAD(idle_notifier);
  33
  34 void idle_notifier_register(struct notifier_block *n)
  35 {
  36         atomic_notifier_chain_register(&idle_notifier, n);
  37 }
  38 EXPORT_SYMBOL_GPL(idle_notifier_register);
  39
  40 void idle_notifier_unregister(struct notifier_block *n)
  41 {
  42         atomic_notifier_chain_unregister(&idle_notifier, n);
  43 }
  44 EXPORT_SYMBOL_GPL(idle_notifier_unregister);
  45 #endif
  46
  47 struct kmem_cache *task_xstate_cachep;
  48 EXPORT_SYMBOL_GPL(task_xstate_cachep);
  49
  50 int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
  51 {
  52         int ret;
  53
  54         *dst = *src;
  55         if (fpu_allocated(&src->thread.fpu)) {
  56                 memset(&dst->thread.fpu, 0, sizeof(dst->thread.fpu));
  57                 ret = fpu_alloc(&dst->thread.fpu);
  58                 if (ret)
  59                         return ret;
  60                 fpu_copy(&dst->thread.fpu, &src->thread.fpu);
  61         }
  62         return 0;
  63 }
  64
  65 void free_thread_xstate(struct task_struct *tsk)
  66 {
  67         fpu_free(&tsk->thread.fpu);
  68 }
  69
  70 void free_thread_info(struct thread_info *ti)
  71 {
  72         free_thread_xstate(ti->task);
  73         free_pages((unsigned long)ti, THREAD_ORDER);
  74 }
  75
  76 void arch_task_cache_init(void)
  77 {
  78         task_xstate_cachep =
  79                 kmem_cache_create("task_xstate", xstate_size,
  80                                   __alignof__(union thread_xstate),
  81                                   SLAB_PANIC | SLAB_NOTRACK, NULL);
  82 }
  83
  84 /*
  85  * Free current thread data structures etc..
  86  */
  87 void exit_thread(void)
  88 {
  89         struct task_struct *me = current;
  90         struct thread_struct *t = &me->thread;
  91         unsigned long *bp = t->io_bitmap_ptr;
  92
  93         if (bp) {
  94                 struct tss_struct *tss = &per_cpu(init_tss, get_cpu());
  95
  96                 t->io_bitmap_ptr = NULL;
  97                 clear_thread_flag(TIF_IO_BITMAP);
  98                 /*
  99                  * Careful, clear this in the TSS too:
 100                  */
 101                 memset(tss->io_bitmap, 0xff, t->io_bitmap_max);
 102                 t->io_bitmap_max = 0;
 103                 put_cpu();
 104                 kfree(bp);
 105         }
 106 }
 107
 108 void show_regs_common(void)
 109 {
 110         const char *vendor, *product, *board;
 111
 112         vendor = dmi_get_system_info(DMI_SYS_VENDOR);
 113         if (!vendor)
 114                 vendor = "";
 115         product = dmi_get_system_info(DMI_PRODUCT_NAME);
 116         if (!product)
 117                 product = "";
 118
 119         /* Board Name is optional */
 120         board = dmi_get_system_info(DMI_BOARD_NAME);
 121
 122         printk(KERN_CONT "\n");
 123         printk(KERN_DEFAULT "Pid: %d, comm: %.20s %s %s %.*s",
 124                 current->pid, current->comm, print_tainted(),
 125                 init_utsname()->release,
 126                 (int)strcspn(init_utsname()->version, " "),
 127                 init_utsname()->version);
 128         printk(KERN_CONT " %s %s", vendor, product);
 129         if (board)
 130                 printk(KERN_CONT "/%s", board);
 131         printk(KERN_CONT "\n");
 132 }
 133
 134 void flush_thread(void)
 135 {
 136         struct task_struct *tsk = current;
 137
 138         flush_ptrace_hw_breakpoint(tsk);
 139         memset(tsk->thread.tls_array, 0, sizeof(tsk->thread.tls_array));
 140         /*
 141          * Forget coprocessor state..
 142          */
 143         tsk->fpu_counter = 0;
 144         clear_fpu(tsk);
 145         clear_used_math();
 146 }
 147
 148 static void hard_disable_TSC(void)
 149 {
 150         write_cr4(read_cr4() | X86_CR4_TSD);
 151 }
 152
 153 void disable_TSC(void)
 154 {
 155         preempt_disable();
 156         if (!test_and_set_thread_flag(TIF_NOTSC))
 157                 /*
 158                  * Must flip the CPU state synchronously with
 159                  * TIF_NOTSC in the current running context.
 160                  */
 161                 hard_disable_TSC();
 162         preempt_enable();
 163 }
 164
 165 static void hard_enable_TSC(void)
 166 {
 167         write_cr4(read_cr4() & ~X86_CR4_TSD);
 168 }
 169
 170 static void enable_TSC(void)
 171 {
 172         preempt_disable();
 173         if (test_and_clear_thread_flag(TIF_NOTSC))
 174                 /*
 175                  * Must flip the CPU state synchronously with
 176                  * TIF_NOTSC in the current running context.
 177                  */
 178                 hard_enable_TSC();
 179         preempt_enable();
 180 }
 181
 182 int get_tsc_mode(unsigned long adr)
 183 {
 184         unsigned int val;
 185
 186         if (test_thread_flag(TIF_NOTSC))
 187                 val = PR_TSC_SIGSEGV;
 188         else
 189                 val = PR_TSC_ENABLE;
 190
 191         return put_user(val, (unsigned int __user *)adr);
 192 }
 193
 194 int set_tsc_mode(unsigned int val)
 195 {
 196         if (val == PR_TSC_SIGSEGV)
 197                 disable_TSC();
 198         else if (val == PR_TSC_ENABLE)
 199                 enable_TSC();
 200         else
 201                 return -EINVAL;
 202
 203         return 0;
 204 }
 205
 206 void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *next_p,
 207                       struct tss_struct *tss)
 208 {
 209         struct thread_struct *prev, *next;
 210
 211         prev = &prev_p->thread;
 212         next = &next_p->thread;
 213
 214         if (test_tsk_thread_flag(prev_p, TIF_BLOCKSTEP) ^
 215             test_tsk_thread_flag(next_p, TIF_BLOCKSTEP)) {
 216                 unsigned long debugctl = get_debugctlmsr();
 217
 218                 debugctl &= ~DEBUGCTLMSR_BTF;
 219                 if (test_tsk_thread_flag(next_p, TIF_BLOCKSTEP))
 220                         debugctl |= DEBUGCTLMSR_BTF;
 221
 222                 update_debugctlmsr(debugctl);
 223         }
 224
 225         if (test_tsk_thread_flag(prev_p, TIF_NOTSC) ^
 226             test_tsk_thread_flag(next_p, TIF_NOTSC)) {
 227                 /* prev and next are different */
 228                 if (test_tsk_thread_flag(next_p, TIF_NOTSC))
 229                         hard_disable_TSC();
 230                 else
 231                         hard_enable_TSC();
 232         }
 233
 234         if (test_tsk_thread_flag(next_p, TIF_IO_BITMAP)) {
 235                 /*
 236                  * Copy the relevant range of the IO bitmap.
 237                  * Normally this is 128 bytes or less:
 238                  */
 239                 memcpy(tss->io_bitmap, next->io_bitmap_ptr,
 240                        max(prev->io_bitmap_max, next->io_bitmap_max));
 241         } else if (test_tsk_thread_flag(prev_p, TIF_IO_BITMAP)) {
 242                 /*
 243                  * Clear any possible leftover bits:
 244                  */
 245                 memset(tss->io_bitmap, 0xff, prev->io_bitmap_max);
 246         }
 247         propagate_user_return_notify(prev_p, next_p);
 248 }
 249
 250 int sys_fork(struct pt_regs *regs)
 251 {
 252         return do_fork(SIGCHLD, regs->sp, regs, 0, NULL, NULL);
 253 }
 254
 255 /*
 256  * This is trivial, and on the face of it looks like it
 257  * could equally well be done in user mode.
 258  *
 259  * Not so, for quite unobvious reasons - register pressure.
 260  * In user mode vfork() cannot have a stack frame, and if
 261  * done by calling the "clone()" system call directly, you
 262  * do not have enough call-clobbered registers to hold all
 263  * the information you need.
 264  */
 265 int sys_vfork(struct pt_regs *regs)
 266 {
 267         return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->sp, regs, 0,
 268                        NULL, NULL);
 269 }
 270
 271 long
 272 sys_clone(unsigned long clone_flags, unsigned long newsp,
 273           void __user *parent_tid, void __user *child_tid, struct pt_regs *regs)
 274 {
 275         if (!newsp)
 276                 newsp = regs->sp;
 277         return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
 278 }
 279
 280 /*
 281  * This gets run with %si containing the
 282  * function to call, and %di containing
 283  * the "args".
 284  */
 285 extern void kernel_thread_helper(void);
 286
 287 /*
 288  * Create a kernel thread
 289  */
 290 int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags)
 291 {
 292         struct pt_regs regs;
 293
 294         memset(&regs, 0, sizeof(regs));
 295
 296         regs.si = (unsigned long) fn;
 297         regs.di = (unsigned long) arg;
 298
 299 #ifdef CONFIG_X86_32
 300         regs.ds = __USER_DS;
 301         regs.es = __USER_DS;
 302         regs.fs = __KERNEL_PERCPU;
 303         regs.gs = __KERNEL_STACK_CANARY;
 304 #else
 305         regs.ss = __KERNEL_DS;
 306 #endif
 307
 308         regs.orig_ax = -1;
 309         regs.ip = (unsigned long) kernel_thread_helper;
 310         regs.cs = __KERNEL_CS | get_kernel_rpl();
 311         regs.flags = X86_EFLAGS_IF | X86_EFLAGS_BIT1;
 312
 313         /* Ok, create the new process.. */
 314         return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs, 0, NULL, NULL);
 315 }
 316 EXPORT_SYMBOL(kernel_thread);
 317
 318 /*
 319  * sys_execve() executes a new program.
 320  */
 321 long sys_execve(const char __user *name,
 322                 const char __user *const __user *argv,
 323                 const char __user *const __user *envp, struct pt_regs *regs)
 324 {
 325         long error;
 326         char *filename;
 327
 328         filename = getname(name);
 329         error = PTR_ERR(filename);
 330         if (IS_ERR(filename))
 331                 return error;
 332         error = do_execve(filename, argv, envp, regs);
 333
 334 #ifdef CONFIG_X86_32
 335         if (error == 0) {
 336                 /* Make sure we don't return using sysenter.. */
 337                 set_thread_flag(TIF_IRET);
 338         }
 339 #endif
 340
 341         putname(filename);
 342         return error;
 343 }
 344
 345 /*
 346  * Idle related variables and functions
 347  */
 348 unsigned long boot_option_idle_override = IDLE_NO_OVERRIDE;
 349 EXPORT_SYMBOL(boot_option_idle_override);
 350
 351 /*
 352  * Powermanagement idle function, if any..
 353  */
 354 void (*pm_idle)(void);
 355 #ifdef CONFIG_APM_MODULE
 356 EXPORT_SYMBOL(pm_idle);
 357 #endif
 358
 359 static inline int hlt_use_halt(void)
 360 {
 361         return 1;
 362 }
 363
 364 #ifndef CONFIG_SMP
 365 static inline void play_dead(void)
 366 {
 367         BUG();
 368 }
 369 #endif
 370
 371 #ifdef CONFIG_X86_64
 372 void enter_idle(void)
 373 {
 374         percpu_write(is_idle, 1);
 375         atomic_notifier_call_chain(&idle_notifier, IDLE_START, NULL);
 376 }
 377
 378 static void __exit_idle(void)
 379 {
 380         if (x86_test_and_clear_bit_percpu(0, is_idle) == 0)
 381                 return;
 382         atomic_notifier_call_chain(&idle_notifier, IDLE_END, NULL);
 383 }
 384
 385 /* Called from interrupts to signify idle end */
 386 void exit_idle(void)
 387 {
 388         /* idle loop has pid 0 */
 389         if (current->pid)
 390                 return;
 391         __exit_idle();
 392 }
 393 #endif
 394
 395 /*
 396  * The idle thread. There's no useful work to be
 397  * done, so just try to conserve power and have a
 398  * low exit latency (ie sit in a loop waiting for
 399  * somebody to say that they'd like to reschedule)
 400  */
 401 void cpu_idle(void)
 402 {
 403         /*
 404          * If we're the non-boot CPU, nothing set the stack canary up
 405          * for us.  CPU0 already has it initialized but no harm in
 406          * doing it again.  This is a good place for updating it, as
 407          * we wont ever return from this function (so the invalid
 408          * canaries already on the stack wont ever trigger).
 409          */
 410         boot_init_stack_canary();
 411         current_thread_info()->status |= TS_POLLING;
 412
 413         while (1) {
 414                 tick_nohz_idle_enter();
 415
 416                 while (!need_resched()) {
 417                         rmb();
 418
 419                         if (cpu_is_offline(smp_processor_id()))
 420                                 play_dead();
 421
 422                         /*
 423                          * Idle routines should keep interrupts disabled
 424                          * from here on, until they go to idle.
 425                          * Otherwise, idle callbacks can misfire.
 426                          */
 427                         local_touch_nmi();
 428                         local_irq_disable();
 429
 430                         enter_idle();
 431
 432                         /* Don't trace irqs off for idle */
 433                         stop_critical_timings();
 434
 435                         /* enter_idle() needs rcu for notifiers */
 436                         rcu_idle_enter();
 437
 438                         if (cpuidle_idle_call())
 439                                 pm_idle();
 440
 441                         rcu_idle_exit();
 442                         start_critical_timings();
 443
 444                         /* In many cases the interrupt that ended idle
 445                            has already called exit_idle. But some idle
 446                            loops can be woken up without interrupt. */
 447                         __exit_idle();
 448                 }
 449
 450                 tick_nohz_idle_exit();
 451                 preempt_enable_no_resched();
 452                 schedule();
 453                 preempt_disable();
 454         }
 455 }
 456
 457 /*
 458  * We use this if we don't have any better
 459  * idle routine..
 460  */
 461 void default_idle(void)
 462 {
 463         if (hlt_use_halt()) {
 464                 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
 465                 trace_cpu_idle_rcuidle(1, smp_processor_id());
 466                 current_thread_info()->status &= ~TS_POLLING;
 467                 /*
 468                  * TS_POLLING-cleared state must be visible before we
 469                  * test NEED_RESCHED:
 470                  */
 471                 smp_mb();
 472
 473                 if (!need_resched())
 474                         safe_halt();    /* enables interrupts racelessly */
 475                 else
 476                         local_irq_enable();
 477                 current_thread_info()->status |= TS_POLLING;
 478                 trace_power_end_rcuidle(smp_processor_id());
 479                 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
 480         } else {
 481                 local_irq_enable();
 482                 /* loop is done by the caller */
 483                 cpu_relax();
 484         }
 485 }
 486 #ifdef CONFIG_APM_MODULE
 487 EXPORT_SYMBOL(default_idle);
 488 #endif
 489
 490 bool set_pm_idle_to_default(void)
 491 {
 492         bool ret = !!pm_idle;
 493
 494         pm_idle = default_idle;
 495
 496         return ret;
 497 }
 498 void stop_this_cpu(void *dummy)
 499 {
 500         local_irq_disable();
 501         /*
 502          * Remove this CPU:
 503          */
 504         set_cpu_online(smp_processor_id(), false);
 505         disable_local_APIC();
 506
 507         for (;;) {
 508                 if (hlt_works(smp_processor_id()))
 509                         halt();
 510         }
 511 }
 512
 513 static void do_nothing(void *unused)
 514 {
 515 }
 516
 517 /*
 518  * cpu_idle_wait - Used to ensure that all the CPUs discard old value of
 519  * pm_idle and update to new pm_idle value. Required while changing pm_idle
 520  * handler on SMP systems.
 521  *
 522  * Caller must have changed pm_idle to the new value before the call. Old
 523  * pm_idle value will not be used by any CPU after the return of this function.
 524  */
 525 void cpu_idle_wait(void)
 526 {
 527         smp_mb();
 528         /* kick all the CPUs so that they exit out of pm_idle */
 529         smp_call_function(do_nothing, NULL, 1);
 530 }
 531 EXPORT_SYMBOL_GPL(cpu_idle_wait);
 532
 533 /* Default MONITOR/MWAIT with no hints, used for default C1 state */
 534 static void mwait_idle(void)
 535 {
 536         if (!need_resched()) {
 537                 trace_power_start_rcuidle(POWER_CSTATE, 1, smp_processor_id());
 538                 trace_cpu_idle_rcuidle(1, smp_processor_id());
 539                 if (this_cpu_has(X86_FEATURE_CLFLUSH_MONITOR))
 540                         clflush((void *)&current_thread_info()->flags);
 541
 542                 __monitor((void *)&current_thread_info()->flags, 0, 0);
 543                 smp_mb();
 544                 if (!need_resched())
 545                         __sti_mwait(0, 0);
 546                 else
 547                         local_irq_enable();
 548                 trace_power_end_rcuidle(smp_processor_id());
 549                 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
 550         } else
 551                 local_irq_enable();
 552 }
 553
 554 /*
 555  * On SMP it's slightly faster (but much more power-consuming!)
 556  * to poll the ->work.need_resched flag instead of waiting for the
 557  * cross-CPU IPI to arrive. Use this option with caution.
 558  */
 559 static void poll_idle(void)
 560 {
 561         trace_power_start_rcuidle(POWER_CSTATE, 0, smp_processor_id());
 562         trace_cpu_idle_rcuidle(0, smp_processor_id());
 563         local_irq_enable();
 564         while (!need_resched())
 565                 cpu_relax();
 566         trace_power_end_rcuidle(smp_processor_id());
 567         trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
 568 }
 569
 570 /*
 571  * mwait selection logic:
 572  *
 573  * It depends on the CPU. For AMD CPUs that support MWAIT this is
 574  * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings
 575  * then depend on a clock divisor and current Pstate of the core. If
 576  * all cores of a processor are in halt state (C1) the processor can
 577  * enter the C1E (C1 enhanced) state. If mwait is used this will never
 578  * happen.
 579  *
 580  * idle=mwait overrides this decision and forces the usage of mwait.
 581  */
 582
 583 #define MWAIT_INFO                      0x05
 584 #define MWAIT_ECX_EXTENDED_INFO         0x01
 585 #define MWAIT_EDX_C1                    0xf0
 586
 587 int mwait_usable(const struct cpuinfo_x86 *c)
 588 {
 589         u32 eax, ebx, ecx, edx;
 590
 591         if (boot_option_idle_override == IDLE_FORCE_MWAIT)
 592                 return 1;
 593
 594         if (c->cpuid_level < MWAIT_INFO)
 595                 return 0;
 596
 597         cpuid(MWAIT_INFO, &eax, &ebx, &ecx, &edx);
 598         /* Check, whether EDX has extended info about MWAIT */
 599         if (!(ecx & MWAIT_ECX_EXTENDED_INFO))
 600                 return 1;
 601
 602         /*
 603          * edx enumeratios MONITOR/MWAIT extensions. Check, whether
 604          * C1  supports MWAIT
 605          */
 606         return (edx & MWAIT_EDX_C1);
 607 }
 608
 609 bool amd_e400_c1e_detected;
 610 EXPORT_SYMBOL(amd_e400_c1e_detected);
 611
 612 static cpumask_var_t amd_e400_c1e_mask;
 613
 614 void amd_e400_remove_cpu(int cpu)
 615 {
 616         if (amd_e400_c1e_mask != NULL)
 617                 cpumask_clear_cpu(cpu, amd_e400_c1e_mask);
 618 }
 619
 620 /*
 621  * AMD Erratum 400 aware idle routine. We check for C1E active in the interrupt
 622  * pending message MSR. If we detect C1E, then we handle it the same
 623  * way as C3 power states (local apic timer and TSC stop)
 624  */
 625 static void amd_e400_idle(void)
 626 {
 627         if (need_resched())
 628                 return;
 629
 630         if (!amd_e400_c1e_detected) {
 631                 u32 lo, hi;
 632
 633                 rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
 634
 635                 if (lo & K8_INTP_C1E_ACTIVE_MASK) {
 636                         amd_e400_c1e_detected = true;
 637                         if (!boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
 638                                 mark_tsc_unstable("TSC halt in AMD C1E");
 639                         printk(KERN_INFO "System has AMD C1E enabled\n");
 640                 }
 641         }
 642
 643         if (amd_e400_c1e_detected) {
 644                 int cpu = smp_processor_id();
 645
 646                 if (!cpumask_test_cpu(cpu, amd_e400_c1e_mask)) {
 647                         cpumask_set_cpu(cpu, amd_e400_c1e_mask);
 648                         /*
 649                          * Force broadcast so ACPI can not interfere.
 650                          */
 651                         clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_FORCE,
 652                                            &cpu);
 653                         printk(KERN_INFO "Switch to broadcast mode on CPU%d\n",
 654                                cpu);
 655                 }
 656                 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
 657
 658                 default_idle();
 659
 660                 /*
 661                  * The switch back from broadcast mode needs to be
 662                  * called with interrupts disabled.
 663                  */
 664                  local_irq_disable();
 665                  clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
 666                  local_irq_enable();
 667         } else
 668                 default_idle();
 669 }
 670
 671 void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c)
 672 {
 673 #ifdef CONFIG_SMP
 674         if (pm_idle == poll_idle && smp_num_siblings > 1) {
 675                 printk_once(KERN_WARNING "WARNING: polling idle and HT enabled,"
 676                         " performance may degrade.\n");
 677         }
 678 #endif
 679         if (pm_idle)
 680                 return;
 681
 682         if (cpu_has(c, X86_FEATURE_MWAIT) && mwait_usable(c)) {
 683                 /*
 684                  * One CPU supports mwait => All CPUs supports mwait
 685                  */
 686                 printk(KERN_INFO "using mwait in idle threads.\n");
 687                 pm_idle = mwait_idle;
 688         } else if (cpu_has_amd_erratum(amd_erratum_400)) {
 689                 /* E400: APIC timer interrupt does not wake up CPU from C1e */
 690                 printk(KERN_INFO "using AMD E400 aware idle routine\n");
 691                 pm_idle = amd_e400_idle;
 692         } else
 693                 pm_idle = default_idle;
 694 }
 695
 696 void __init init_amd_e400_c1e_mask(void)
 697 {
 698         /* If we're using amd_e400_idle, we need to allocate amd_e400_c1e_mask. */
 699         if (pm_idle == amd_e400_idle)
 700                 zalloc_cpumask_var(&amd_e400_c1e_mask, GFP_KERNEL);
 701 }
 702
 703 static int __init idle_setup(char *str)
 704 {
 705         if (!str)
 706                 return -EINVAL;
 707
 708         if (!strcmp(str, "poll")) {
 709                 printk("using polling idle threads.\n");
 710                 pm_idle = poll_idle;
 711                 boot_option_idle_override = IDLE_POLL;
 712         } else if (!strcmp(str, "mwait")) {
 713                 boot_option_idle_override = IDLE_FORCE_MWAIT;
 714                 WARN_ONCE(1, "\"idle=mwait\" will be removed in 2012\n");
 715         } else if (!strcmp(str, "halt")) {
 716                 /*
 717                  * When the boot option of idle=halt is added, halt is
 718                  * forced to be used for CPU idle. In such case CPU C2/C3
 719                  * won't be used again.
 720                  * To continue to load the CPU idle driver, don't touch
 721                  * the boot_option_idle_override.
 722                  */
 723                 pm_idle = default_idle;
 724                 boot_option_idle_override = IDLE_HALT;
 725         } else if (!strcmp(str, "nomwait")) {
 726                 /*
 727                  * If the boot option of "idle=nomwait" is added,
 728                  * it means that mwait will be disabled for CPU C2/C3
 729                  * states. In such case it won't touch the variable
 730                  * of boot_option_idle_override.
 731                  */
 732                 boot_option_idle_override = IDLE_NOMWAIT;
 733         } else
 734                 return -1;
 735
 736         return 0;
 737 }
 738 early_param("idle", idle_setup);
 739
 740 unsigned long arch_align_stack(unsigned long sp)
 741 {
 742         if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
 743                 sp -= get_random_int() % 8192;
 744         return sp & ~0xf;
 745 }
 746
 747 unsigned long arch_randomize_brk(struct mm_struct *mm)
 748 {
 749         unsigned long range_end = mm->brk + 0x02000000;
 750         return randomize_range(mm->brk, range_end, 0) ? : mm->brk;
 751 }
 752