arch/x86/kernel/process_64.c

   1 /*
   2  *  Copyright (C) 1995  Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *      Gareth Hughes <gareth@valinux.com>, May 2000
   6  *
   7  *  X86-64 port
   8  *      Andi Kleen.
   9  *
  10  *      CPU hotplug support - ashok.raj@intel.com
  11  */
  12
  13 /*
  14  * This file handles the architecture-dependent parts of process handling..
  15  */
  16
  17 #include <linux/cpu.h>
  18 #include <linux/errno.h>
  19 #include <linux/sched.h>
  20 #include <linux/fs.h>
  21 #include <linux/kernel.h>
  22 #include <linux/mm.h>
  23 #include <linux/elfcore.h>
  24 #include <linux/smp.h>
  25 #include <linux/slab.h>
  26 #include <linux/user.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/delay.h>
  29 #include <linux/module.h>
  30 #include <linux/ptrace.h>
  31 #include <linux/notifier.h>
  32 #include <linux/kprobes.h>
  33 #include <linux/kdebug.h>
  34 #include <linux/prctl.h>
  35 #include <linux/uaccess.h>
  36 #include <linux/io.h>
  37 #include <linux/ftrace.h>
  38
  39 #include <asm/pgtable.h>
  40 #include <asm/processor.h>
  41 #include <asm/fpu/internal.h>
  42 #include <asm/mmu_context.h>
  43 #include <asm/prctl.h>
  44 #include <asm/desc.h>
  45 #include <asm/proto.h>
  46 #include <asm/ia32.h>
  47 #include <asm/idle.h>
  48 #include <asm/syscalls.h>
  49 #include <asm/debugreg.h>
  50 #include <asm/switch_to.h>
  51
  52 asmlinkage extern void ret_from_fork(void);
  53
  54 __visible DEFINE_PER_CPU(unsigned long, rsp_scratch);
  55
  56 /* Prints also some state that isn't saved in the pt_regs */
  57 void __show_regs(struct pt_regs *regs, int all)
  58 {
  59         unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;
  60         unsigned long d0, d1, d2, d3, d6, d7;
  61         unsigned int fsindex, gsindex;
  62         unsigned int ds, cs, es;
  63
  64         printk(KERN_DEFAULT "RIP: %04lx:[<%016lx>] ", regs->cs & 0xffff, regs->ip);
  65         printk_address(regs->ip);
  66         printk(KERN_DEFAULT "RSP: %04lx:%016lx  EFLAGS: %08lx\n", regs->ss,
  67                         regs->sp, regs->flags);
  68         printk(KERN_DEFAULT "RAX: %016lx RBX: %016lx RCX: %016lx\n",
  69                regs->ax, regs->bx, regs->cx);
  70         printk(KERN_DEFAULT "RDX: %016lx RSI: %016lx RDI: %016lx\n",
  71                regs->dx, regs->si, regs->di);
  72         printk(KERN_DEFAULT "RBP: %016lx R08: %016lx R09: %016lx\n",
  73                regs->bp, regs->r8, regs->r9);
  74         printk(KERN_DEFAULT "R10: %016lx R11: %016lx R12: %016lx\n",
  75                regs->r10, regs->r11, regs->r12);
  76         printk(KERN_DEFAULT "R13: %016lx R14: %016lx R15: %016lx\n",
  77                regs->r13, regs->r14, regs->r15);
  78
  79         asm("movl %%ds,%0" : "=r" (ds));
  80         asm("movl %%cs,%0" : "=r" (cs));
  81         asm("movl %%es,%0" : "=r" (es));
  82         asm("movl %%fs,%0" : "=r" (fsindex));
  83         asm("movl %%gs,%0" : "=r" (gsindex));
  84
  85         rdmsrl(MSR_FS_BASE, fs);
  86         rdmsrl(MSR_GS_BASE, gs);
  87         rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);
  88
  89         if (!all)
  90                 return;
  91
  92         cr0 = read_cr0();
  93         cr2 = read_cr2();
  94         cr3 = read_cr3();
  95         cr4 = __read_cr4();
  96
  97         printk(KERN_DEFAULT "FS:  %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n",
  98                fs, fsindex, gs, gsindex, shadowgs);
  99         printk(KERN_DEFAULT "CS:  %04x DS: %04x ES: %04x CR0: %016lx\n", cs, ds,
 100                         es, cr0);
 101         printk(KERN_DEFAULT "CR2: %016lx CR3: %016lx CR4: %016lx\n", cr2, cr3,
 102                         cr4);
 103
 104         get_debugreg(d0, 0);
 105         get_debugreg(d1, 1);
 106         get_debugreg(d2, 2);
 107         get_debugreg(d3, 3);
 108         get_debugreg(d6, 6);
 109         get_debugreg(d7, 7);
 110
 111         /* Only print out debug registers if they are in their non-default state. */
 112         if ((d0 == 0) && (d1 == 0) && (d2 == 0) && (d3 == 0) &&
 113             (d6 == DR6_RESERVED) && (d7 == 0x400))
 114                 return;
 115
 116         printk(KERN_DEFAULT "DR0: %016lx DR1: %016lx DR2: %016lx\n", d0, d1, d2);
 117         printk(KERN_DEFAULT "DR3: %016lx DR6: %016lx DR7: %016lx\n", d3, d6, d7);
 118
 119 }
 120
 121 void release_thread(struct task_struct *dead_task)
 122 {
 123         if (dead_task->mm) {
 124                 if (dead_task->mm->context.ldt) {
 125                         pr_warn("WARNING: dead process %s still has LDT? <%p/%d>\n",
 126                                 dead_task->comm,
 127                                 dead_task->mm->context.ldt,
 128                                 dead_task->mm->context.ldt->size);
 129                         BUG();
 130                 }
 131         }
 132 }
 133
 134 static inline void set_32bit_tls(struct task_struct *t, int tls, u32 addr)
 135 {
 136         struct user_desc ud = {
 137                 .base_addr = addr,
 138                 .limit = 0xfffff,
 139                 .seg_32bit = 1,
 140                 .limit_in_pages = 1,
 141                 .useable = 1,
 142         };
 143         struct desc_struct *desc = t->thread.tls_array;
 144         desc += tls;
 145         fill_ldt(desc, &ud);
 146 }
 147
 148 static inline u32 read_32bit_tls(struct task_struct *t, int tls)
 149 {
 150         return get_desc_base(&t->thread.tls_array[tls]);
 151 }
 152
 153 int copy_thread_tls(unsigned long clone_flags, unsigned long sp,
 154                 unsigned long arg, struct task_struct *p, unsigned long tls)
 155 {
 156         int err;
 157         struct pt_regs *childregs;
 158         struct task_struct *me = current;
 159
 160         p->thread.sp0 = (unsigned long)task_stack_page(p) + THREAD_SIZE;
 161         childregs = task_pt_regs(p);
 162         p->thread.sp = (unsigned long) childregs;
 163         set_tsk_thread_flag(p, TIF_FORK);
 164         p->thread.io_bitmap_ptr = NULL;
 165
 166         savesegment(gs, p->thread.gsindex);
 167         p->thread.gs = p->thread.gsindex ? 0 : me->thread.gs;
 168         savesegment(fs, p->thread.fsindex);
 169         p->thread.fs = p->thread.fsindex ? 0 : me->thread.fs;
 170         savesegment(es, p->thread.es);
 171         savesegment(ds, p->thread.ds);
 172         memset(p->thread.ptrace_bps, 0, sizeof(p->thread.ptrace_bps));
 173
 174         if (unlikely(p->flags & PF_KTHREAD)) {
 175                 /* kernel thread */
 176                 memset(childregs, 0, sizeof(struct pt_regs));
 177                 childregs->sp = (unsigned long)childregs;
 178                 childregs->ss = __KERNEL_DS;
 179                 childregs->bx = sp; /* function */
 180                 childregs->bp = arg;
 181                 childregs->orig_ax = -1;
 182                 childregs->cs = __KERNEL_CS | get_kernel_rpl();
 183                 childregs->flags = X86_EFLAGS_IF | X86_EFLAGS_FIXED;
 184                 return 0;
 185         }
 186         *childregs = *current_pt_regs();
 187
 188         childregs->ax = 0;
 189         if (sp)
 190                 childregs->sp = sp;
 191
 192         err = -ENOMEM;
 193         if (unlikely(test_tsk_thread_flag(me, TIF_IO_BITMAP))) {
 194                 p->thread.io_bitmap_ptr = kmemdup(me->thread.io_bitmap_ptr,
 195                                                   IO_BITMAP_BYTES, GFP_KERNEL);
 196                 if (!p->thread.io_bitmap_ptr) {
 197                         p->thread.io_bitmap_max = 0;
 198                         return -ENOMEM;
 199                 }
 200                 set_tsk_thread_flag(p, TIF_IO_BITMAP);
 201         }
 202
 203         /*
 204          * Set a new TLS for the child thread?
 205          */
 206         if (clone_flags & CLONE_SETTLS) {
 207 #ifdef CONFIG_IA32_EMULATION
 208                 if (is_ia32_task())
 209                         err = do_set_thread_area(p, -1,
 210                                 (struct user_desc __user *)tls, 0);
 211                 else
 212 #endif
 213                         err = do_arch_prctl(p, ARCH_SET_FS, tls);
 214                 if (err)
 215                         goto out;
 216         }
 217         err = 0;
 218 out:
 219         if (err && p->thread.io_bitmap_ptr) {
 220                 kfree(p->thread.io_bitmap_ptr);
 221                 p->thread.io_bitmap_max = 0;
 222         }
 223
 224         return err;
 225 }
 226
 227 static void
 228 start_thread_common(struct pt_regs *regs, unsigned long new_ip,
 229                     unsigned long new_sp,
 230                     unsigned int _cs, unsigned int _ss, unsigned int _ds)
 231 {
 232         loadsegment(fs, 0);
 233         loadsegment(es, _ds);
 234         loadsegment(ds, _ds);
 235         load_gs_index(0);
 236         regs->ip                = new_ip;
 237         regs->sp                = new_sp;
 238         regs->cs                = _cs;
 239         regs->ss                = _ss;
 240         regs->flags             = X86_EFLAGS_IF;
 241         force_iret();
 242 }
 243
 244 void
 245 start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
 246 {
 247         start_thread_common(regs, new_ip, new_sp,
 248                             __USER_CS, __USER_DS, 0);
 249 }
 250
 251 #ifdef CONFIG_IA32_EMULATION
 252 void start_thread_ia32(struct pt_regs *regs, u32 new_ip, u32 new_sp)
 253 {
 254         start_thread_common(regs, new_ip, new_sp,
 255                             test_thread_flag(TIF_X32)
 256                             ? __USER_CS : __USER32_CS,
 257                             __USER_DS, __USER_DS);
 258 }
 259 #endif
 260
 261 /*
 262  *      switch_to(x,y) should switch tasks from x to y.
 263  *
 264  * This could still be optimized:
 265  * - fold all the options into a flag word and test it with a single test.
 266  * - could test fs/gs bitsliced
 267  *
 268  * Kprobes not supported here. Set the probe on schedule instead.
 269  * Function graph tracer not supported too.
 270  */
 271 __visible __notrace_funcgraph struct task_struct *
 272 __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
 273 {
 274         struct thread_struct *prev = &prev_p->thread;
 275         struct thread_struct *next = &next_p->thread;
 276         struct fpu *prev_fpu = &prev->fpu;
 277         struct fpu *next_fpu = &next->fpu;
 278         int cpu = smp_processor_id();
 279         struct tss_struct *tss = &per_cpu(cpu_tss, cpu);
 280         unsigned fsindex, gsindex;
 281         fpu_switch_t fpu_switch;
 282
 283         fpu_switch = switch_fpu_prepare(prev_fpu, next_fpu, cpu);
 284
 285         /* We must save %fs and %gs before load_TLS() because
 286          * %fs and %gs may be cleared by load_TLS().
 287          *
 288          * (e.g. xen_load_tls())
 289          */
 290         savesegment(fs, fsindex);
 291         savesegment(gs, gsindex);
 292
 293         /*
 294          * Load TLS before restoring any segments so that segment loads
 295          * reference the correct GDT entries.
 296          */
 297         load_TLS(next, cpu);
 298
 299         /*
 300          * Leave lazy mode, flushing any hypercalls made here.  This
 301          * must be done after loading TLS entries in the GDT but before
 302          * loading segments that might reference them, and and it must
 303          * be done before fpu__restore(), so the TS bit is up to
 304          * date.
 305          */
 306         arch_end_context_switch(next_p);
 307
 308         /* Switch DS and ES.
 309          *
 310          * Reading them only returns the selectors, but writing them (if
 311          * nonzero) loads the full descriptor from the GDT or LDT.  The
 312          * LDT for next is loaded in switch_mm, and the GDT is loaded
 313          * above.
 314          *
 315          * We therefore need to write new values to the segment
 316          * registers on every context switch unless both the new and old
 317          * values are zero.
 318          *
 319          * Note that we don't need to do anything for CS and SS, as
 320          * those are saved and restored as part of pt_regs.
 321          */
 322         savesegment(es, prev->es);
 323         if (unlikely(next->es | prev->es))
 324                 loadsegment(es, next->es);
 325
 326         savesegment(ds, prev->ds);
 327         if (unlikely(next->ds | prev->ds))
 328                 loadsegment(ds, next->ds);
 329
 330         /*
 331          * Switch FS and GS.
 332          *
 333          * These are even more complicated than FS and GS: they have
 334          * 64-bit bases are that controlled by arch_prctl.  Those bases
 335          * only differ from the values in the GDT or LDT if the selector
 336          * is 0.
 337          *
 338          * Loading the segment register resets the hidden base part of
 339          * the register to 0 or the value from the GDT / LDT.  If the
 340          * next base address zero, writing 0 to the segment register is
 341          * much faster than using wrmsr to explicitly zero the base.
 342          *
 343          * The thread_struct.fs and thread_struct.gs values are 0
 344          * if the fs and gs bases respectively are not overridden
 345          * from the values implied by fsindex and gsindex.  They
 346          * are nonzero, and store the nonzero base addresses, if
 347          * the bases are overridden.
 348          *
 349          * (fs != 0 && fsindex != 0) || (gs != 0 && gsindex != 0) should
 350          * be impossible.
 351          *
 352          * Therefore we need to reload the segment registers if either
 353          * the old or new selector is nonzero, and we need to override
 354          * the base address if next thread expects it to be overridden.
 355          *
 356          * This code is unnecessarily slow in the case where the old and
 357          * new indexes are zero and the new base is nonzero -- it will
 358          * unnecessarily write 0 to the selector before writing the new
 359          * base address.
 360          *
 361          * Note: This all depends on arch_prctl being the only way that
 362          * user code can override the segment base.  Once wrfsbase and
 363          * wrgsbase are enabled, most of this code will need to change.
 364          */
 365         if (unlikely(fsindex | next->fsindex | prev->fs)) {
 366                 loadsegment(fs, next->fsindex);
 367
 368                 /*
 369                  * If user code wrote a nonzero value to FS, then it also
 370                  * cleared the overridden base address.
 371                  *
 372                  * XXX: if user code wrote 0 to FS and cleared the base
 373                  * address itself, we won't notice and we'll incorrectly
 374                  * restore the prior base address next time we reschdule
 375                  * the process.
 376                  */
 377                 if (fsindex)
 378                         prev->fs = 0;
 379         }
 380         if (next->fs)
 381                 wrmsrl(MSR_FS_BASE, next->fs);
 382         prev->fsindex = fsindex;
 383
 384         if (unlikely(gsindex | next->gsindex | prev->gs)) {
 385                 load_gs_index(next->gsindex);
 386
 387                 /* This works (and fails) the same way as fsindex above. */
 388                 if (gsindex)
 389                         prev->gs = 0;
 390         }
 391         if (next->gs)
 392                 wrmsrl(MSR_KERNEL_GS_BASE, next->gs);
 393         prev->gsindex = gsindex;
 394
 395         switch_fpu_finish(next_fpu, fpu_switch);
 396
 397         /*
 398          * Switch the PDA and FPU contexts.
 399          */
 400         this_cpu_write(current_task, next_p);
 401
 402         /*
 403          * If it were not for PREEMPT_ACTIVE we could guarantee that the
 404          * preempt_count of all tasks was equal here and this would not be
 405          * needed.
 406          */
 407         task_thread_info(prev_p)->saved_preempt_count = this_cpu_read(__preempt_count);
 408         this_cpu_write(__preempt_count, task_thread_info(next_p)->saved_preempt_count);
 409
 410         /* Reload esp0 and ss1.  This changes current_thread_info(). */
 411         load_sp0(tss, next);
 412
 413         /*
 414          * Now maybe reload the debug registers and handle I/O bitmaps
 415          */
 416         if (unlikely(task_thread_info(next_p)->flags & _TIF_WORK_CTXSW_NEXT ||
 417                      task_thread_info(prev_p)->flags & _TIF_WORK_CTXSW_PREV))
 418                 __switch_to_xtra(prev_p, next_p, tss);
 419
 420         if (static_cpu_has_bug(X86_BUG_SYSRET_SS_ATTRS)) {
 421                 /*
 422                  * AMD CPUs have a misfeature: SYSRET sets the SS selector but
 423                  * does not update the cached descriptor.  As a result, if we
 424                  * do SYSRET while SS is NULL, we'll end up in user mode with
 425                  * SS apparently equal to __USER_DS but actually unusable.
 426                  *
 427                  * The straightforward workaround would be to fix it up just
 428                  * before SYSRET, but that would slow down the system call
 429                  * fast paths.  Instead, we ensure that SS is never NULL in
 430                  * system call context.  We do this by replacing NULL SS
 431                  * selectors at every context switch.  SYSCALL sets up a valid
 432                  * SS, so the only way to get NULL is to re-enter the kernel
 433                  * from CPL 3 through an interrupt.  Since that can't happen
 434                  * in the same task as a running syscall, we are guaranteed to
 435                  * context switch between every interrupt vector entry and a
 436                  * subsequent SYSRET.
 437                  *
 438                  * We read SS first because SS reads are much faster than
 439                  * writes.  Out of caution, we force SS to __KERNEL_DS even if
 440                  * it previously had a different non-NULL value.
 441                  */
 442                 unsigned short ss_sel;
 443                 savesegment(ss, ss_sel);
 444                 if (ss_sel != __KERNEL_DS)
 445                         loadsegment(ss, __KERNEL_DS);
 446         }
 447
 448         return prev_p;
 449 }
 450
 451 void set_personality_64bit(void)
 452 {
 453         /* inherit personality from parent */
 454
 455         /* Make sure to be in 64bit mode */
 456         clear_thread_flag(TIF_IA32);
 457         clear_thread_flag(TIF_ADDR32);
 458         clear_thread_flag(TIF_X32);
 459
 460         /* Ensure the corresponding mm is not marked. */
 461         if (current->mm)
 462                 current->mm->context.ia32_compat = 0;
 463
 464         /* TBD: overwrites user setup. Should have two bits.
 465            But 64bit processes have always behaved this way,
 466            so it's not too bad. The main problem is just that
 467            32bit childs are affected again. */
 468         current->personality &= ~READ_IMPLIES_EXEC;
 469 }
 470
 471 void set_personality_ia32(bool x32)
 472 {
 473         /* inherit personality from parent */
 474
 475         /* Make sure to be in 32bit mode */
 476         set_thread_flag(TIF_ADDR32);
 477
 478         /* Mark the associated mm as containing 32-bit tasks. */
 479         if (x32) {
 480                 clear_thread_flag(TIF_IA32);
 481                 set_thread_flag(TIF_X32);
 482                 if (current->mm)
 483                         current->mm->context.ia32_compat = TIF_X32;
 484                 current->personality &= ~READ_IMPLIES_EXEC;
 485                 /* is_compat_task() uses the presence of the x32
 486                    syscall bit flag to determine compat status */
 487                 current_thread_info()->status &= ~TS_COMPAT;
 488         } else {
 489                 set_thread_flag(TIF_IA32);
 490                 clear_thread_flag(TIF_X32);
 491                 if (current->mm)
 492                         current->mm->context.ia32_compat = TIF_IA32;
 493                 current->personality |= force_personality32;
 494                 /* Prepare the first "return" to user space */
 495                 current_thread_info()->status |= TS_COMPAT;
 496         }
 497 }
 498 EXPORT_SYMBOL_GPL(set_personality_ia32);
 499
 500 unsigned long get_wchan(struct task_struct *p)
 501 {
 502         unsigned long stack;
 503         u64 fp, ip;
 504         int count = 0;
 505
 506         if (!p || p == current || p->state == TASK_RUNNING)
 507                 return 0;
 508         stack = (unsigned long)task_stack_page(p);
 509         if (p->thread.sp < stack || p->thread.sp >= stack+THREAD_SIZE)
 510                 return 0;
 511         fp = *(u64 *)(p->thread.sp);
 512         do {
 513                 if (fp < (unsigned long)stack ||
 514                     fp >= (unsigned long)stack+THREAD_SIZE)
 515                         return 0;
 516                 ip = *(u64 *)(fp+8);
 517                 if (!in_sched_functions(ip))
 518                         return ip;
 519                 fp = *(u64 *)fp;
 520         } while (count++ < 16);
 521         return 0;
 522 }
 523
 524 long do_arch_prctl(struct task_struct *task, int code, unsigned long addr)
 525 {
 526         int ret = 0;
 527         int doit = task == current;
 528         int cpu;
 529
 530         switch (code) {
 531         case ARCH_SET_GS:
 532                 if (addr >= TASK_SIZE_OF(task))
 533                         return -EPERM;
 534                 cpu = get_cpu();
 535                 /* handle small bases via the GDT because that's faster to
 536                    switch. */
 537                 if (addr <= 0xffffffff) {
 538                         set_32bit_tls(task, GS_TLS, addr);
 539                         if (doit) {
 540                                 load_TLS(&task->thread, cpu);
 541                                 load_gs_index(GS_TLS_SEL);
 542                         }
 543                         task->thread.gsindex = GS_TLS_SEL;
 544                         task->thread.gs = 0;
 545                 } else {
 546                         task->thread.gsindex = 0;
 547                         task->thread.gs = addr;
 548                         if (doit) {
 549                                 load_gs_index(0);
 550                                 ret = wrmsrl_safe(MSR_KERNEL_GS_BASE, addr);
 551                         }
 552                 }
 553                 put_cpu();
 554                 break;
 555         case ARCH_SET_FS:
 556                 /* Not strictly needed for fs, but do it for symmetry
 557                    with gs */
 558                 if (addr >= TASK_SIZE_OF(task))
 559                         return -EPERM;
 560                 cpu = get_cpu();
 561                 /* handle small bases via the GDT because that's faster to
 562                    switch. */
 563                 if (addr <= 0xffffffff) {
 564                         set_32bit_tls(task, FS_TLS, addr);
 565                         if (doit) {
 566                                 load_TLS(&task->thread, cpu);
 567                                 loadsegment(fs, FS_TLS_SEL);
 568                         }
 569                         task->thread.fsindex = FS_TLS_SEL;
 570                         task->thread.fs = 0;
 571                 } else {
 572                         task->thread.fsindex = 0;
 573                         task->thread.fs = addr;
 574                         if (doit) {
 575                                 /* set the selector to 0 to not confuse
 576                                    __switch_to */
 577                                 loadsegment(fs, 0);
 578                                 ret = wrmsrl_safe(MSR_FS_BASE, addr);
 579                         }
 580                 }
 581                 put_cpu();
 582                 break;
 583         case ARCH_GET_FS: {
 584                 unsigned long base;
 585                 if (task->thread.fsindex == FS_TLS_SEL)
 586                         base = read_32bit_tls(task, FS_TLS);
 587                 else if (doit)
 588                         rdmsrl(MSR_FS_BASE, base);
 589                 else
 590                         base = task->thread.fs;
 591                 ret = put_user(base, (unsigned long __user *)addr);
 592                 break;
 593         }
 594         case ARCH_GET_GS: {
 595                 unsigned long base;
 596                 unsigned gsindex;
 597                 if (task->thread.gsindex == GS_TLS_SEL)
 598                         base = read_32bit_tls(task, GS_TLS);
 599                 else if (doit) {
 600                         savesegment(gs, gsindex);
 601                         if (gsindex)
 602                                 rdmsrl(MSR_KERNEL_GS_BASE, base);
 603                         else
 604                                 base = task->thread.gs;
 605                 } else
 606                         base = task->thread.gs;
 607                 ret = put_user(base, (unsigned long __user *)addr);
 608                 break;
 609         }
 610
 611         default:
 612                 ret = -EINVAL;
 613                 break;
 614         }
 615
 616         return ret;
 617 }
 618
 619 long sys_arch_prctl(int code, unsigned long addr)
 620 {
 621         return do_arch_prctl(current, code, addr);
 622 }
 623
 624 unsigned long KSTK_ESP(struct task_struct *task)
 625 {
 626         return task_pt_regs(task)->sp;
 627 }