arch/x86/kernel/setup64.c

   1 /*
   2  * X86-64 specific CPU setup.
   3  * Copyright (C) 1995  Linus Torvalds
   4  * Copyright 2001, 2002, 2003 SuSE Labs / Andi Kleen.
   5  * See setup.c for older changelog.
   6  */
   7 #include <linux/init.h>
   8 #include <linux/kernel.h>
   9 #include <linux/sched.h>
  10 #include <linux/string.h>
  11 #include <linux/bootmem.h>
  12 #include <linux/bitops.h>
  13 #include <linux/module.h>
  14 #include <linux/kgdb.h>
  15 #include <asm/pda.h>
  16 #include <asm/pgtable.h>
  17 #include <asm/processor.h>
  18 #include <asm/desc.h>
  19 #include <asm/atomic.h>
  20 #include <asm/mmu_context.h>
  21 #include <asm/smp.h>
  22 #include <asm/i387.h>
  23 #include <asm/percpu.h>
  24 #include <asm/proto.h>
  25 #include <asm/sections.h>
  26 #include <asm/setup.h>
  27 #include <asm/genapic.h>
  28
  29 #ifndef CONFIG_DEBUG_BOOT_PARAMS
  30 struct boot_params __initdata boot_params;
  31 #else
  32 struct boot_params boot_params;
  33 #endif
  34
  35 cpumask_t cpu_initialized __cpuinitdata = CPU_MASK_NONE;
  36
  37 struct x8664_pda *_cpu_pda[NR_CPUS] __read_mostly;
  38 EXPORT_SYMBOL(_cpu_pda);
  39 struct x8664_pda boot_cpu_pda[NR_CPUS] __cacheline_aligned;
  40
  41 struct desc_ptr idt_descr = { 256 * 16 - 1, (unsigned long) idt_table };
  42
  43 char boot_cpu_stack[IRQSTACKSIZE] __attribute__((section(".bss.page_aligned")));
  44
  45 unsigned long __supported_pte_mask __read_mostly = ~0UL;
  46 EXPORT_SYMBOL_GPL(__supported_pte_mask);
  47
  48 static int do_not_nx __cpuinitdata = 0;
  49
  50 /* noexec=on|off
  51 Control non executable mappings for 64bit processes.
  52
  53 on      Enable(default)
  54 off     Disable
  55 */
  56 static int __init nonx_setup(char *str)
  57 {
  58         if (!str)
  59                 return -EINVAL;
  60         if (!strncmp(str, "on", 2)) {
  61                 __supported_pte_mask |= _PAGE_NX;
  62                 do_not_nx = 0;
  63         } else if (!strncmp(str, "off", 3)) {
  64                 do_not_nx = 1;
  65                 __supported_pte_mask &= ~_PAGE_NX;
  66         }
  67         return 0;
  68 }
  69 early_param("noexec", nonx_setup);
  70
  71 int force_personality32 = 0;
  72
  73 /* noexec32=on|off
  74 Control non executable heap for 32bit processes.
  75 To control the stack too use noexec=off
  76
  77 on      PROT_READ does not imply PROT_EXEC for 32bit processes (default)
  78 off     PROT_READ implies PROT_EXEC
  79 */
  80 static int __init nonx32_setup(char *str)
  81 {
  82         if (!strcmp(str, "on"))
  83                 force_personality32 &= ~READ_IMPLIES_EXEC;
  84         else if (!strcmp(str, "off"))
  85                 force_personality32 |= READ_IMPLIES_EXEC;
  86         return 1;
  87 }
  88 __setup("noexec32=", nonx32_setup);
  89
  90 void pda_init(int cpu)
  91 {
  92         struct x8664_pda *pda = cpu_pda(cpu);
  93
  94         /* Setup up data that may be needed in __get_free_pages early */
  95         asm volatile("movl %0,%%fs ; movl %0,%%gs" :: "r" (0));
  96         /* Memory clobbers used to order PDA accessed */
  97         mb();
  98         wrmsrl(MSR_GS_BASE, pda);
  99         mb();
 100
 101         pda->cpunumber = cpu;
 102         pda->irqcount = -1;
 103         pda->kernelstack =
 104                 (unsigned long)stack_thread_info() - PDA_STACKOFFSET + THREAD_SIZE;
 105         pda->active_mm = &init_mm;
 106         pda->mmu_state = 0;
 107
 108         if (cpu == 0) {
 109                 /* others are initialized in smpboot.c */
 110                 pda->pcurrent = &init_task;
 111                 pda->irqstackptr = boot_cpu_stack;
 112         } else {
 113                 pda->irqstackptr = (char *)
 114                         __get_free_pages(GFP_ATOMIC, IRQSTACK_ORDER);
 115                 if (!pda->irqstackptr)
 116                         panic("cannot allocate irqstack for cpu %d", cpu);
 117         }
 118
 119
 120         pda->irqstackptr += IRQSTACKSIZE-64;
 121 }
 122
 123 char boot_exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ]
 124 __attribute__((section(".bss.page_aligned")));
 125
 126 extern asmlinkage void ignore_sysret(void);
 127
 128 /* May not be marked __init: used by software suspend */
 129 void syscall_init(void)
 130 {
 131         /*
 132          * LSTAR and STAR live in a bit strange symbiosis.
 133          * They both write to the same internal register. STAR allows to set CS/DS
 134          * but only a 32bit target. LSTAR sets the 64bit rip.
 135          */
 136         wrmsrl(MSR_STAR,  ((u64)__USER32_CS)<<48  | ((u64)__KERNEL_CS)<<32);
 137         wrmsrl(MSR_LSTAR, system_call);
 138         wrmsrl(MSR_CSTAR, ignore_sysret);
 139
 140 #ifdef CONFIG_IA32_EMULATION
 141         syscall32_cpu_init ();
 142 #endif
 143
 144         /* Flags to clear on syscall */
 145         wrmsrl(MSR_SYSCALL_MASK,
 146                X86_EFLAGS_TF|X86_EFLAGS_DF|X86_EFLAGS_IF|X86_EFLAGS_IOPL);
 147 }
 148
 149 void __cpuinit check_efer(void)
 150 {
 151         unsigned long efer;
 152
 153         rdmsrl(MSR_EFER, efer);
 154         if (!(efer & EFER_NX) || do_not_nx) {
 155                 __supported_pte_mask &= ~_PAGE_NX;
 156         }
 157 }
 158
 159 unsigned long kernel_eflags;
 160
 161 /*
 162  * Copies of the original ist values from the tss are only accessed during
 163  * debugging, no special alignment required.
 164  */
 165 DEFINE_PER_CPU(struct orig_ist, orig_ist);
 166
 167 /*
 168  * cpu_init() initializes state that is per-CPU. Some data is already
 169  * initialized (naturally) in the bootstrap process, such as the GDT
 170  * and IDT. We reload them nevertheless, this function acts as a
 171  * 'CPU state barrier', nothing should get across.
 172  * A lot of state is already set up in PDA init.
 173  */
 174 void __cpuinit cpu_init (void)
 175 {
 176         int cpu = stack_smp_processor_id();
 177         struct tss_struct *t = &per_cpu(init_tss, cpu);
 178         struct orig_ist *orig_ist = &per_cpu(orig_ist, cpu);
 179         unsigned long v;
 180         char *estacks = NULL;
 181         struct task_struct *me;
 182         int i;
 183
 184         /* CPU 0 is initialised in head64.c */
 185         if (cpu != 0) {
 186                 pda_init(cpu);
 187         } else
 188                 estacks = boot_exception_stacks;
 189
 190         me = current;
 191
 192         if (cpu_test_and_set(cpu, cpu_initialized))
 193                 panic("CPU#%d already initialized!\n", cpu);
 194
 195         printk("Initializing CPU#%d\n", cpu);
 196
 197         clear_in_cr4(X86_CR4_VME|X86_CR4_PVI|X86_CR4_TSD|X86_CR4_DE);
 198
 199         /*
 200          * Initialize the per-CPU GDT with the boot GDT,
 201          * and set up the GDT descriptor:
 202          */
 203         if (cpu)
 204                 memcpy(get_cpu_gdt_table(cpu), cpu_gdt_table, GDT_SIZE);
 205
 206         cpu_gdt_descr[cpu].size = GDT_SIZE;
 207         load_gdt((const struct desc_ptr *)&cpu_gdt_descr[cpu]);
 208         load_idt((const struct desc_ptr *)&idt_descr);
 209
 210         memset(me->thread.tls_array, 0, GDT_ENTRY_TLS_ENTRIES * 8);
 211         syscall_init();
 212
 213         wrmsrl(MSR_FS_BASE, 0);
 214         wrmsrl(MSR_KERNEL_GS_BASE, 0);
 215         barrier();
 216
 217         check_efer();
 218
 219         /*
 220          * set up and load the per-CPU TSS
 221          */
 222         for (v = 0; v < N_EXCEPTION_STACKS; v++) {
 223                 static const unsigned int order[N_EXCEPTION_STACKS] = {
 224                         [0 ... N_EXCEPTION_STACKS - 1] = EXCEPTION_STACK_ORDER,
 225                         [DEBUG_STACK - 1] = DEBUG_STACK_ORDER
 226                 };
 227                 if (cpu) {
 228                         estacks = (char *)__get_free_pages(GFP_ATOMIC, order[v]);
 229                         if (!estacks)
 230                                 panic("Cannot allocate exception stack %ld %d\n",
 231                                       v, cpu);
 232                 }
 233                 estacks += PAGE_SIZE << order[v];
 234                 orig_ist->ist[v] = t->x86_tss.ist[v] = (unsigned long)estacks;
 235         }
 236
 237         t->x86_tss.io_bitmap_base = offsetof(struct tss_struct, io_bitmap);
 238         /*
 239          * <= is required because the CPU will access up to
 240          * 8 bits beyond the end of the IO permission bitmap.
 241          */
 242         for (i = 0; i <= IO_BITMAP_LONGS; i++)
 243                 t->io_bitmap[i] = ~0UL;
 244
 245         atomic_inc(&init_mm.mm_count);
 246         me->active_mm = &init_mm;
 247         if (me->mm)
 248                 BUG();
 249         enter_lazy_tlb(&init_mm, me);
 250
 251         set_tss_desc(cpu, t);
 252         load_TR_desc();
 253         load_LDT(&init_mm.context);
 254
 255 #ifdef CONFIG_KGDB
 256         /*
 257          * If the kgdb is connected no debug regs should be altered.  This
 258          * is only applicable when KGDB and a KGDB I/O module are built
 259          * into the kernel and you are using early debugging with
 260          * kgdbwait. KGDB will control the kernel HW breakpoint registers.
 261          */
 262         if (kgdb_connected && arch_kgdb_ops.correct_hw_break)
 263                 arch_kgdb_ops.correct_hw_break();
 264         else {
 265 #endif
 266         /*
 267          * Clear all 6 debug registers:
 268          */
 269
 270         set_debugreg(0UL, 0);
 271         set_debugreg(0UL, 1);
 272         set_debugreg(0UL, 2);
 273         set_debugreg(0UL, 3);
 274         set_debugreg(0UL, 6);
 275         set_debugreg(0UL, 7);
 276 #ifdef CONFIG_KGDB
 277         /* If the kgdb is connected no debug regs should be altered. */
 278         }
 279 #endif
 280
 281         fpu_init();
 282
 283         raw_local_save_flags(kernel_eflags);
 284
 285         if (is_uv_system())
 286                 uv_cpu_init();
 287 }