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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * AMD Memory Encryption Support
4 *
5 * Copyright (C) 2019 SUSE
6 *
7 * Author: Joerg Roedel <jroedel@suse.de>
8 */
9
10 #define pr_fmt(fmt) "SEV-ES: " fmt
11
12 #include <linux/sched/debug.h> /* For show_regs() */
13 #include <linux/percpu-defs.h>
14 #include <linux/mem_encrypt.h>
15 #include <linux/lockdep.h>
16 #include <linux/printk.h>
17 #include <linux/mm_types.h>
18 #include <linux/set_memory.h>
19 #include <linux/memblock.h>
20 #include <linux/kernel.h>
21 #include <linux/mm.h>
22
23 #include <asm/cpu_entry_area.h>
24 #include <asm/stacktrace.h>
25 #include <asm/sev-es.h>
26 #include <asm/insn-eval.h>
27 #include <asm/fpu/internal.h>
28 #include <asm/processor.h>
29 #include <asm/realmode.h>
30 #include <asm/traps.h>
31 #include <asm/svm.h>
32 #include <asm/smp.h>
33 #include <asm/cpu.h>
34
35 #define DR7_RESET_VALUE 0x400
36
37 /* For early boot hypervisor communication in SEV-ES enabled guests */
38 static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE);
39
40 /*
41 * Needs to be in the .data section because we need it NULL before bss is
42 * cleared
43 */
44 static struct ghcb __initdata *boot_ghcb;
45
46 /* #VC handler runtime per-CPU data */
47 struct sev_es_runtime_data {
48 struct ghcb ghcb_page;
49
50 /* Physical storage for the per-CPU IST stack of the #VC handler */
51 char ist_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE);
52
53 /*
54 * Physical storage for the per-CPU fall-back stack of the #VC handler.
55 * The fall-back stack is used when it is not safe to switch back to the
56 * interrupted stack in the #VC entry code.
57 */
58 char fallback_stack[EXCEPTION_STKSZ] __aligned(PAGE_SIZE);
59
60 /*
61 * Reserve one page per CPU as backup storage for the unencrypted GHCB.
62 * It is needed when an NMI happens while the #VC handler uses the real
63 * GHCB, and the NMI handler itself is causing another #VC exception. In
64 * that case the GHCB content of the first handler needs to be backed up
65 * and restored.
66 */
67 struct ghcb backup_ghcb;
68
69 /*
70 * Mark the per-cpu GHCBs as in-use to detect nested #VC exceptions.
71 * There is no need for it to be atomic, because nothing is written to
72 * the GHCB between the read and the write of ghcb_active. So it is safe
73 * to use it when a nested #VC exception happens before the write.
74 *
75 * This is necessary for example in the #VC->NMI->#VC case when the NMI
76 * happens while the first #VC handler uses the GHCB. When the NMI code
77 * raises a second #VC handler it might overwrite the contents of the
78 * GHCB written by the first handler. To avoid this the content of the
79 * GHCB is saved and restored when the GHCB is detected to be in use
80 * already.
81 */
82 bool ghcb_active;
83 bool backup_ghcb_active;
84
85 /*
86 * Cached DR7 value - write it on DR7 writes and return it on reads.
87 * That value will never make it to the real hardware DR7 as debugging
88 * is currently unsupported in SEV-ES guests.
89 */
90 unsigned long dr7;
91 };
92
93 struct ghcb_state {
94 struct ghcb *ghcb;
95 };
96
97 static DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data);
98 DEFINE_STATIC_KEY_FALSE(sev_es_enable_key);
99
100 /* Needed in vc_early_forward_exception */
101 void do_early_exception(struct pt_regs *regs, int trapnr);
102
103 static void __init setup_vc_stacks(int cpu)
104 {
105 struct sev_es_runtime_data *data;
106 struct cpu_entry_area *cea;
107 unsigned long vaddr;
108 phys_addr_t pa;
109
110 data = per_cpu(runtime_data, cpu);
111 cea = get_cpu_entry_area(cpu);
112
113 /* Map #VC IST stack */
114 vaddr = CEA_ESTACK_BOT(&cea->estacks, VC);
115 pa = __pa(data->ist_stack);
116 cea_set_pte((void *)vaddr, pa, PAGE_KERNEL);
117
118 /* Map VC fall-back stack */
119 vaddr = CEA_ESTACK_BOT(&cea->estacks, VC2);
120 pa = __pa(data->fallback_stack);
121 cea_set_pte((void *)vaddr, pa, PAGE_KERNEL);
122 }
123
124 static __always_inline bool on_vc_stack(struct pt_regs *regs)
125 {
126 unsigned long sp = regs->sp;
127
128 /* User-mode RSP is not trusted */
129 if (user_mode(regs))
130 return false;
131
132 /* SYSCALL gap still has user-mode RSP */
133 if (ip_within_syscall_gap(regs))
134 return false;
135
136 return ((sp >= __this_cpu_ist_bottom_va(VC)) && (sp < __this_cpu_ist_top_va(VC)));
137 }
138
139 /*
140 * This function handles the case when an NMI is raised in the #VC exception
141 * handler entry code. In this case, the IST entry for #VC must be adjusted, so
142 * that any subsequent #VC exception will not overwrite the stack contents of the
143 * interrupted #VC handler.
144 *
145 * The IST entry is adjusted unconditionally so that it can be also be
146 * unconditionally adjusted back in sev_es_ist_exit(). Otherwise a nested
147 * sev_es_ist_exit() call may adjust back the IST entry too early.
148 */
149 void noinstr __sev_es_ist_enter(struct pt_regs *regs)
150 {
151 unsigned long old_ist, new_ist;
152
153 /* Read old IST entry */
154 old_ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);
155
156 /* Make room on the IST stack */
157 if (on_vc_stack(regs))
158 new_ist = ALIGN_DOWN(regs->sp, 8) - sizeof(old_ist);
159 else
160 new_ist = old_ist - sizeof(old_ist);
161
162 /* Store old IST entry */
163 *(unsigned long *)new_ist = old_ist;
164
165 /* Set new IST entry */
166 this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], new_ist);
167 }
168
169 void noinstr __sev_es_ist_exit(void)
170 {
171 unsigned long ist;
172
173 /* Read IST entry */
174 ist = __this_cpu_read(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC]);
175
176 if (WARN_ON(ist == __this_cpu_ist_top_va(VC)))
177 return;
178
179 /* Read back old IST entry and write it to the TSS */
180 this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], *(unsigned long *)ist);
181 }
182
183 static __always_inline struct ghcb *sev_es_get_ghcb(struct ghcb_state *state)
184 {
185 struct sev_es_runtime_data *data;
186 struct ghcb *ghcb;
187
188 data = this_cpu_read(runtime_data);
189 ghcb = &data->ghcb_page;
190
191 if (unlikely(data->ghcb_active)) {
192 /* GHCB is already in use - save its contents */
193
194 if (unlikely(data->backup_ghcb_active))
195 return NULL;
196
197 /* Mark backup_ghcb active before writing to it */
198 data->backup_ghcb_active = true;
199
200 state->ghcb = &data->backup_ghcb;
201
202 /* Backup GHCB content */
203 *state->ghcb = *ghcb;
204 } else {
205 state->ghcb = NULL;
206 data->ghcb_active = true;
207 }
208
209 return ghcb;
210 }
211
212 static __always_inline void sev_es_put_ghcb(struct ghcb_state *state)
213 {
214 struct sev_es_runtime_data *data;
215 struct ghcb *ghcb;
216
217 data = this_cpu_read(runtime_data);
218 ghcb = &data->ghcb_page;
219
220 if (state->ghcb) {
221 /* Restore GHCB from Backup */
222 *ghcb = *state->ghcb;
223 data->backup_ghcb_active = false;
224 state->ghcb = NULL;
225 } else {
226 data->ghcb_active = false;
227 }
228 }
229
230 /* Needed in vc_early_forward_exception */
231 void do_early_exception(struct pt_regs *regs, int trapnr);
232
233 static inline u64 sev_es_rd_ghcb_msr(void)
234 {
235 return __rdmsr(MSR_AMD64_SEV_ES_GHCB);
236 }
237
238 static __always_inline void sev_es_wr_ghcb_msr(u64 val)
239 {
240 u32 low, high;
241
242 low = (u32)(val);
243 high = (u32)(val >> 32);
244
245 native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
246 }
247
248 static int vc_fetch_insn_kernel(struct es_em_ctxt *ctxt,
249 unsigned char *buffer)
250 {
251 return copy_from_kernel_nofault(buffer, (unsigned char *)ctxt->regs->ip, MAX_INSN_SIZE);
252 }
253
254 static enum es_result vc_decode_insn(struct es_em_ctxt *ctxt)
255 {
256 char buffer[MAX_INSN_SIZE];
257 enum es_result ret;
258 int res;
259
260 if (user_mode(ctxt->regs)) {
261 res = insn_fetch_from_user_inatomic(ctxt->regs, buffer);
262 if (!res) {
263 ctxt->fi.vector = X86_TRAP_PF;
264 ctxt->fi.error_code = X86_PF_INSTR | X86_PF_USER;
265 ctxt->fi.cr2 = ctxt->regs->ip;
266 return ES_EXCEPTION;
267 }
268
269 if (!insn_decode(&ctxt->insn, ctxt->regs, buffer, res))
270 return ES_DECODE_FAILED;
271 } else {
272 res = vc_fetch_insn_kernel(ctxt, buffer);
273 if (res) {
274 ctxt->fi.vector = X86_TRAP_PF;
275 ctxt->fi.error_code = X86_PF_INSTR;
276 ctxt->fi.cr2 = ctxt->regs->ip;
277 return ES_EXCEPTION;
278 }
279
280 insn_init(&ctxt->insn, buffer, MAX_INSN_SIZE - res, 1);
281 insn_get_length(&ctxt->insn);
282 }
283
284 ret = ctxt->insn.immediate.got ? ES_OK : ES_DECODE_FAILED;
285
286 return ret;
287 }
288
289 static enum es_result vc_write_mem(struct es_em_ctxt *ctxt,
290 char *dst, char *buf, size_t size)
291 {
292 unsigned long error_code = X86_PF_PROT | X86_PF_WRITE;
293 char __user *target = (char __user *)dst;
294 u64 d8;
295 u32 d4;
296 u16 d2;
297 u8 d1;
298
299 /* If instruction ran in kernel mode and the I/O buffer is in kernel space */
300 if (!user_mode(ctxt->regs) && !access_ok(target, size)) {
301 memcpy(dst, buf, size);
302 return ES_OK;
303 }
304
305 switch (size) {
306 case 1:
307 memcpy(&d1, buf, 1);
308 if (put_user(d1, target))
309 goto fault;
310 break;
311 case 2:
312 memcpy(&d2, buf, 2);
313 if (put_user(d2, target))
314 goto fault;
315 break;
316 case 4:
317 memcpy(&d4, buf, 4);
318 if (put_user(d4, target))
319 goto fault;
320 break;
321 case 8:
322 memcpy(&d8, buf, 8);
323 if (put_user(d8, target))
324 goto fault;
325 break;
326 default:
327 WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size);
328 return ES_UNSUPPORTED;
329 }
330
331 return ES_OK;
332
333 fault:
334 if (user_mode(ctxt->regs))
335 error_code |= X86_PF_USER;
336
337 ctxt->fi.vector = X86_TRAP_PF;
338 ctxt->fi.error_code = error_code;
339 ctxt->fi.cr2 = (unsigned long)dst;
340
341 return ES_EXCEPTION;
342 }
343
344 static enum es_result vc_read_mem(struct es_em_ctxt *ctxt,
345 char *src, char *buf, size_t size)
346 {
347 unsigned long error_code = X86_PF_PROT;
348 char __user *s = (char __user *)src;
349 u64 d8;
350 u32 d4;
351 u16 d2;
352 u8 d1;
353
354 /* If instruction ran in kernel mode and the I/O buffer is in kernel space */
355 if (!user_mode(ctxt->regs) && !access_ok(s, size)) {
356 memcpy(buf, src, size);
357 return ES_OK;
358 }
359
360 switch (size) {
361 case 1:
362 if (get_user(d1, s))
363 goto fault;
364 memcpy(buf, &d1, 1);
365 break;
366 case 2:
367 if (get_user(d2, s))
368 goto fault;
369 memcpy(buf, &d2, 2);
370 break;
371 case 4:
372 if (get_user(d4, s))
373 goto fault;
374 memcpy(buf, &d4, 4);
375 break;
376 case 8:
377 if (get_user(d8, s))
378 goto fault;
379 memcpy(buf, &d8, 8);
380 break;
381 default:
382 WARN_ONCE(1, "%s: Invalid size: %zu\n", __func__, size);
383 return ES_UNSUPPORTED;
384 }
385
386 return ES_OK;
387
388 fault:
389 if (user_mode(ctxt->regs))
390 error_code |= X86_PF_USER;
391
392 ctxt->fi.vector = X86_TRAP_PF;
393 ctxt->fi.error_code = error_code;
394 ctxt->fi.cr2 = (unsigned long)src;
395
396 return ES_EXCEPTION;
397 }
398
399 static enum es_result vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
400 unsigned long vaddr, phys_addr_t *paddr)
401 {
402 unsigned long va = (unsigned long)vaddr;
403 unsigned int level;
404 phys_addr_t pa;
405 pgd_t *pgd;
406 pte_t *pte;
407
408 pgd = __va(read_cr3_pa());
409 pgd = &pgd[pgd_index(va)];
410 pte = lookup_address_in_pgd(pgd, va, &level);
411 if (!pte) {
412 ctxt->fi.vector = X86_TRAP_PF;
413 ctxt->fi.cr2 = vaddr;
414 ctxt->fi.error_code = 0;
415
416 if (user_mode(ctxt->regs))
417 ctxt->fi.error_code |= X86_PF_USER;
418
419 return ES_EXCEPTION;
420 }
421
422 if (WARN_ON_ONCE(pte_val(*pte) & _PAGE_ENC))
423 /* Emulated MMIO to/from encrypted memory not supported */
424 return ES_UNSUPPORTED;
425
426 pa = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
427 pa |= va & ~page_level_mask(level);
428
429 *paddr = pa;
430
431 return ES_OK;
432 }
433
434 /* Include code shared with pre-decompression boot stage */
435 #include "sev-es-shared.c"
436
437 void noinstr __sev_es_nmi_complete(void)
438 {
439 struct ghcb_state state;
440 struct ghcb *ghcb;
441
442 ghcb = sev_es_get_ghcb(&state);
443
444 vc_ghcb_invalidate(ghcb);
445 ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_NMI_COMPLETE);
446 ghcb_set_sw_exit_info_1(ghcb, 0);
447 ghcb_set_sw_exit_info_2(ghcb, 0);
448
449 sev_es_wr_ghcb_msr(__pa_nodebug(ghcb));
450 VMGEXIT();
451
452 sev_es_put_ghcb(&state);
453 }
454
455 static u64 get_jump_table_addr(void)
456 {
457 struct ghcb_state state;
458 unsigned long flags;
459 struct ghcb *ghcb;
460 u64 ret = 0;
461
462 local_irq_save(flags);
463
464 ghcb = sev_es_get_ghcb(&state);
465
466 vc_ghcb_invalidate(ghcb);
467 ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_JUMP_TABLE);
468 ghcb_set_sw_exit_info_1(ghcb, SVM_VMGEXIT_GET_AP_JUMP_TABLE);
469 ghcb_set_sw_exit_info_2(ghcb, 0);
470
471 sev_es_wr_ghcb_msr(__pa(ghcb));
472 VMGEXIT();
473
474 if (ghcb_sw_exit_info_1_is_valid(ghcb) &&
475 ghcb_sw_exit_info_2_is_valid(ghcb))
476 ret = ghcb->save.sw_exit_info_2;
477
478 sev_es_put_ghcb(&state);
479
480 local_irq_restore(flags);
481
482 return ret;
483 }
484
485 int sev_es_setup_ap_jump_table(struct real_mode_header *rmh)
486 {
487 u16 startup_cs, startup_ip;
488 phys_addr_t jump_table_pa;
489 u64 jump_table_addr;
490 u16 __iomem *jump_table;
491
492 jump_table_addr = get_jump_table_addr();
493
494 /* On UP guests there is no jump table so this is not a failure */
495 if (!jump_table_addr)
496 return 0;
497
498 /* Check if AP Jump Table is page-aligned */
499 if (jump_table_addr & ~PAGE_MASK)
500 return -EINVAL;
501
502 jump_table_pa = jump_table_addr & PAGE_MASK;
503
504 startup_cs = (u16)(rmh->trampoline_start >> 4);
505 startup_ip = (u16)(rmh->sev_es_trampoline_start -
506 rmh->trampoline_start);
507
508 jump_table = ioremap_encrypted(jump_table_pa, PAGE_SIZE);
509 if (!jump_table)
510 return -EIO;
511
512 writew(startup_ip, &jump_table[0]);
513 writew(startup_cs, &jump_table[1]);
514
515 iounmap(jump_table);
516
517 return 0;
518 }
519
520 /*
521 * This is needed by the OVMF UEFI firmware which will use whatever it finds in
522 * the GHCB MSR as its GHCB to talk to the hypervisor. So make sure the per-cpu
523 * runtime GHCBs used by the kernel are also mapped in the EFI page-table.
524 */
525 int __init sev_es_efi_map_ghcbs(pgd_t *pgd)
526 {
527 struct sev_es_runtime_data *data;
528 unsigned long address, pflags;
529 int cpu;
530 u64 pfn;
531
532 if (!sev_es_active())
533 return 0;
534
535 pflags = _PAGE_NX | _PAGE_RW;
536
537 for_each_possible_cpu(cpu) {
538 data = per_cpu(runtime_data, cpu);
539
540 address = __pa(&data->ghcb_page);
541 pfn = address >> PAGE_SHIFT;
542
543 if (kernel_map_pages_in_pgd(pgd, pfn, address, 1, pflags))
544 return 1;
545 }
546
547 return 0;
548 }
549
550 static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
551 {
552 struct pt_regs *regs = ctxt->regs;
553 enum es_result ret;
554 u64 exit_info_1;
555
556 /* Is it a WRMSR? */
557 exit_info_1 = (ctxt->insn.opcode.bytes[1] == 0x30) ? 1 : 0;
558
559 ghcb_set_rcx(ghcb, regs->cx);
560 if (exit_info_1) {
561 ghcb_set_rax(ghcb, regs->ax);
562 ghcb_set_rdx(ghcb, regs->dx);
563 }
564
565 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, exit_info_1, 0);
566
567 if ((ret == ES_OK) && (!exit_info_1)) {
568 regs->ax = ghcb->save.rax;
569 regs->dx = ghcb->save.rdx;
570 }
571
572 return ret;
573 }
574
575 /*
576 * This function runs on the first #VC exception after the kernel
577 * switched to virtual addresses.
578 */
579 static bool __init sev_es_setup_ghcb(void)
580 {
581 /* First make sure the hypervisor talks a supported protocol. */
582 if (!sev_es_negotiate_protocol())
583 return false;
584
585 /*
586 * Clear the boot_ghcb. The first exception comes in before the bss
587 * section is cleared.
588 */
589 memset(&boot_ghcb_page, 0, PAGE_SIZE);
590
591 /* Alright - Make the boot-ghcb public */
592 boot_ghcb = &boot_ghcb_page;
593
594 return true;
595 }
596
597 #ifdef CONFIG_HOTPLUG_CPU
598 static void sev_es_ap_hlt_loop(void)
599 {
600 struct ghcb_state state;
601 struct ghcb *ghcb;
602
603 ghcb = sev_es_get_ghcb(&state);
604
605 while (true) {
606 vc_ghcb_invalidate(ghcb);
607 ghcb_set_sw_exit_code(ghcb, SVM_VMGEXIT_AP_HLT_LOOP);
608 ghcb_set_sw_exit_info_1(ghcb, 0);
609 ghcb_set_sw_exit_info_2(ghcb, 0);
610
611 sev_es_wr_ghcb_msr(__pa(ghcb));
612 VMGEXIT();
613
614 /* Wakeup signal? */
615 if (ghcb_sw_exit_info_2_is_valid(ghcb) &&
616 ghcb->save.sw_exit_info_2)
617 break;
618 }
619
620 sev_es_put_ghcb(&state);
621 }
622
623 /*
624 * Play_dead handler when running under SEV-ES. This is needed because
625 * the hypervisor can't deliver an SIPI request to restart the AP.
626 * Instead the kernel has to issue a VMGEXIT to halt the VCPU until the
627 * hypervisor wakes it up again.
628 */
629 static void sev_es_play_dead(void)
630 {
631 play_dead_common();
632
633 /* IRQs now disabled */
634
635 sev_es_ap_hlt_loop();
636
637 /*
638 * If we get here, the VCPU was woken up again. Jump to CPU
639 * startup code to get it back online.
640 */
641 start_cpu0();
642 }
643 #else /* CONFIG_HOTPLUG_CPU */
644 #define sev_es_play_dead native_play_dead
645 #endif /* CONFIG_HOTPLUG_CPU */
646
647 #ifdef CONFIG_SMP
648 static void __init sev_es_setup_play_dead(void)
649 {
650 smp_ops.play_dead = sev_es_play_dead;
651 }
652 #else
653 static inline void sev_es_setup_play_dead(void) { }
654 #endif
655
656 static void __init alloc_runtime_data(int cpu)
657 {
658 struct sev_es_runtime_data *data;
659
660 data = memblock_alloc(sizeof(*data), PAGE_SIZE);
661 if (!data)
662 panic("Can't allocate SEV-ES runtime data");
663
664 per_cpu(runtime_data, cpu) = data;
665 }
666
667 static void __init init_ghcb(int cpu)
668 {
669 struct sev_es_runtime_data *data;
670 int err;
671
672 data = per_cpu(runtime_data, cpu);
673
674 err = early_set_memory_decrypted((unsigned long)&data->ghcb_page,
675 sizeof(data->ghcb_page));
676 if (err)
677 panic("Can't map GHCBs unencrypted");
678
679 memset(&data->ghcb_page, 0, sizeof(data->ghcb_page));
680
681 data->ghcb_active = false;
682 data->backup_ghcb_active = false;
683 }
684
685 void __init sev_es_init_vc_handling(void)
686 {
687 int cpu;
688
689 BUILD_BUG_ON(offsetof(struct sev_es_runtime_data, ghcb_page) % PAGE_SIZE);
690
691 if (!sev_es_active())
692 return;
693
694 if (!sev_es_check_cpu_features())
695 panic("SEV-ES CPU Features missing");
696
697 /* Enable SEV-ES special handling */
698 static_branch_enable(&sev_es_enable_key);
699
700 /* Initialize per-cpu GHCB pages */
701 for_each_possible_cpu(cpu) {
702 alloc_runtime_data(cpu);
703 init_ghcb(cpu);
704 setup_vc_stacks(cpu);
705 }
706
707 sev_es_setup_play_dead();
708
709 /* Secondary CPUs use the runtime #VC handler */
710 initial_vc_handler = (unsigned long)safe_stack_exc_vmm_communication;
711 }
712
713 static void __init vc_early_forward_exception(struct es_em_ctxt *ctxt)
714 {
715 int trapnr = ctxt->fi.vector;
716
717 if (trapnr == X86_TRAP_PF)
718 native_write_cr2(ctxt->fi.cr2);
719
720 ctxt->regs->orig_ax = ctxt->fi.error_code;
721 do_early_exception(ctxt->regs, trapnr);
722 }
723
724 static long *vc_insn_get_reg(struct es_em_ctxt *ctxt)
725 {
726 long *reg_array;
727 int offset;
728
729 reg_array = (long *)ctxt->regs;
730 offset = insn_get_modrm_reg_off(&ctxt->insn, ctxt->regs);
731
732 if (offset < 0)
733 return NULL;
734
735 offset /= sizeof(long);
736
737 return reg_array + offset;
738 }
739
740 static long *vc_insn_get_rm(struct es_em_ctxt *ctxt)
741 {
742 long *reg_array;
743 int offset;
744
745 reg_array = (long *)ctxt->regs;
746 offset = insn_get_modrm_rm_off(&ctxt->insn, ctxt->regs);
747
748 if (offset < 0)
749 return NULL;
750
751 offset /= sizeof(long);
752
753 return reg_array + offset;
754 }
755 static enum es_result vc_do_mmio(struct ghcb *ghcb, struct es_em_ctxt *ctxt,
756 unsigned int bytes, bool read)
757 {
758 u64 exit_code, exit_info_1, exit_info_2;
759 unsigned long ghcb_pa = __pa(ghcb);
760 enum es_result res;
761 phys_addr_t paddr;
762 void __user *ref;
763
764 ref = insn_get_addr_ref(&ctxt->insn, ctxt->regs);
765 if (ref == (void __user *)-1L)
766 return ES_UNSUPPORTED;
767
768 exit_code = read ? SVM_VMGEXIT_MMIO_READ : SVM_VMGEXIT_MMIO_WRITE;
769
770 res = vc_slow_virt_to_phys(ghcb, ctxt, (unsigned long)ref, &paddr);
771 if (res != ES_OK) {
772 if (res == ES_EXCEPTION && !read)
773 ctxt->fi.error_code |= X86_PF_WRITE;
774
775 return res;
776 }
777
778 exit_info_1 = paddr;
779 /* Can never be greater than 8 */
780 exit_info_2 = bytes;
781
782 ghcb_set_sw_scratch(ghcb, ghcb_pa + offsetof(struct ghcb, shared_buffer));
783
784 return sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, exit_info_1, exit_info_2);
785 }
786
787 static enum es_result vc_handle_mmio_twobyte_ops(struct ghcb *ghcb,
788 struct es_em_ctxt *ctxt)
789 {
790 struct insn *insn = &ctxt->insn;
791 unsigned int bytes = 0;
792 enum es_result ret;
793 int sign_byte;
794 long *reg_data;
795
796 switch (insn->opcode.bytes[1]) {
797 /* MMIO Read w/ zero-extension */
798 case 0xb6:
799 bytes = 1;
800 fallthrough;
801 case 0xb7:
802 if (!bytes)
803 bytes = 2;
804
805 ret = vc_do_mmio(ghcb, ctxt, bytes, true);
806 if (ret)
807 break;
808
809 /* Zero extend based on operand size */
810 reg_data = vc_insn_get_reg(ctxt);
811 if (!reg_data)
812 return ES_DECODE_FAILED;
813
814 memset(reg_data, 0, insn->opnd_bytes);
815
816 memcpy(reg_data, ghcb->shared_buffer, bytes);
817 break;
818
819 /* MMIO Read w/ sign-extension */
820 case 0xbe:
821 bytes = 1;
822 fallthrough;
823 case 0xbf:
824 if (!bytes)
825 bytes = 2;
826
827 ret = vc_do_mmio(ghcb, ctxt, bytes, true);
828 if (ret)
829 break;
830
831 /* Sign extend based on operand size */
832 reg_data = vc_insn_get_reg(ctxt);
833 if (!reg_data)
834 return ES_DECODE_FAILED;
835
836 if (bytes == 1) {
837 u8 *val = (u8 *)ghcb->shared_buffer;
838
839 sign_byte = (*val & 0x80) ? 0xff : 0x00;
840 } else {
841 u16 *val = (u16 *)ghcb->shared_buffer;
842
843 sign_byte = (*val & 0x8000) ? 0xff : 0x00;
844 }
845 memset(reg_data, sign_byte, insn->opnd_bytes);
846
847 memcpy(reg_data, ghcb->shared_buffer, bytes);
848 break;
849
850 default:
851 ret = ES_UNSUPPORTED;
852 }
853
854 return ret;
855 }
856
857 /*
858 * The MOVS instruction has two memory operands, which raises the
859 * problem that it is not known whether the access to the source or the
860 * destination caused the #VC exception (and hence whether an MMIO read
861 * or write operation needs to be emulated).
862 *
863 * Instead of playing games with walking page-tables and trying to guess
864 * whether the source or destination is an MMIO range, split the move
865 * into two operations, a read and a write with only one memory operand.
866 * This will cause a nested #VC exception on the MMIO address which can
867 * then be handled.
868 *
869 * This implementation has the benefit that it also supports MOVS where
870 * source _and_ destination are MMIO regions.
871 *
872 * It will slow MOVS on MMIO down a lot, but in SEV-ES guests it is a
873 * rare operation. If it turns out to be a performance problem the split
874 * operations can be moved to memcpy_fromio() and memcpy_toio().
875 */
876 static enum es_result vc_handle_mmio_movs(struct es_em_ctxt *ctxt,
877 unsigned int bytes)
878 {
879 unsigned long ds_base, es_base;
880 unsigned char *src, *dst;
881 unsigned char buffer[8];
882 enum es_result ret;
883 bool rep;
884 int off;
885
886 ds_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_DS);
887 es_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_ES);
888
889 if (ds_base == -1L || es_base == -1L) {
890 ctxt->fi.vector = X86_TRAP_GP;
891 ctxt->fi.error_code = 0;
892 return ES_EXCEPTION;
893 }
894
895 src = ds_base + (unsigned char *)ctxt->regs->si;
896 dst = es_base + (unsigned char *)ctxt->regs->di;
897
898 ret = vc_read_mem(ctxt, src, buffer, bytes);
899 if (ret != ES_OK)
900 return ret;
901
902 ret = vc_write_mem(ctxt, dst, buffer, bytes);
903 if (ret != ES_OK)
904 return ret;
905
906 if (ctxt->regs->flags & X86_EFLAGS_DF)
907 off = -bytes;
908 else
909 off = bytes;
910
911 ctxt->regs->si += off;
912 ctxt->regs->di += off;
913
914 rep = insn_has_rep_prefix(&ctxt->insn);
915 if (rep)
916 ctxt->regs->cx -= 1;
917
918 if (!rep || ctxt->regs->cx == 0)
919 return ES_OK;
920 else
921 return ES_RETRY;
922 }
923
924 static enum es_result vc_handle_mmio(struct ghcb *ghcb,
925 struct es_em_ctxt *ctxt)
926 {
927 struct insn *insn = &ctxt->insn;
928 unsigned int bytes = 0;
929 enum es_result ret;
930 long *reg_data;
931
932 switch (insn->opcode.bytes[0]) {
933 /* MMIO Write */
934 case 0x88:
935 bytes = 1;
936 fallthrough;
937 case 0x89:
938 if (!bytes)
939 bytes = insn->opnd_bytes;
940
941 reg_data = vc_insn_get_reg(ctxt);
942 if (!reg_data)
943 return ES_DECODE_FAILED;
944
945 memcpy(ghcb->shared_buffer, reg_data, bytes);
946
947 ret = vc_do_mmio(ghcb, ctxt, bytes, false);
948 break;
949
950 case 0xc6:
951 bytes = 1;
952 fallthrough;
953 case 0xc7:
954 if (!bytes)
955 bytes = insn->opnd_bytes;
956
957 memcpy(ghcb->shared_buffer, insn->immediate1.bytes, bytes);
958
959 ret = vc_do_mmio(ghcb, ctxt, bytes, false);
960 break;
961
962 /* MMIO Read */
963 case 0x8a:
964 bytes = 1;
965 fallthrough;
966 case 0x8b:
967 if (!bytes)
968 bytes = insn->opnd_bytes;
969
970 ret = vc_do_mmio(ghcb, ctxt, bytes, true);
971 if (ret)
972 break;
973
974 reg_data = vc_insn_get_reg(ctxt);
975 if (!reg_data)
976 return ES_DECODE_FAILED;
977
978 /* Zero-extend for 32-bit operation */
979 if (bytes == 4)
980 *reg_data = 0;
981
982 memcpy(reg_data, ghcb->shared_buffer, bytes);
983 break;
984
985 /* MOVS instruction */
986 case 0xa4:
987 bytes = 1;
988 fallthrough;
989 case 0xa5:
990 if (!bytes)
991 bytes = insn->opnd_bytes;
992
993 ret = vc_handle_mmio_movs(ctxt, bytes);
994 break;
995 /* Two-Byte Opcodes */
996 case 0x0f:
997 ret = vc_handle_mmio_twobyte_ops(ghcb, ctxt);
998 break;
999 default:
1000 ret = ES_UNSUPPORTED;
1001 }
1002
1003 return ret;
1004 }
1005
1006 static enum es_result vc_handle_dr7_write(struct ghcb *ghcb,
1007 struct es_em_ctxt *ctxt)
1008 {
1009 struct sev_es_runtime_data *data = this_cpu_read(runtime_data);
1010 long val, *reg = vc_insn_get_rm(ctxt);
1011 enum es_result ret;
1012
1013 if (!reg)
1014 return ES_DECODE_FAILED;
1015
1016 val = *reg;
1017
1018 /* Upper 32 bits must be written as zeroes */
1019 if (val >> 32) {
1020 ctxt->fi.vector = X86_TRAP_GP;
1021 ctxt->fi.error_code = 0;
1022 return ES_EXCEPTION;
1023 }
1024
1025 /* Clear out other reserved bits and set bit 10 */
1026 val = (val & 0xffff23ffL) | BIT(10);
1027
1028 /* Early non-zero writes to DR7 are not supported */
1029 if (!data && (val & ~DR7_RESET_VALUE))
1030 return ES_UNSUPPORTED;
1031
1032 /* Using a value of 0 for ExitInfo1 means RAX holds the value */
1033 ghcb_set_rax(ghcb, val);
1034 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WRITE_DR7, 0, 0);
1035 if (ret != ES_OK)
1036 return ret;
1037
1038 if (data)
1039 data->dr7 = val;
1040
1041 return ES_OK;
1042 }
1043
1044 static enum es_result vc_handle_dr7_read(struct ghcb *ghcb,
1045 struct es_em_ctxt *ctxt)
1046 {
1047 struct sev_es_runtime_data *data = this_cpu_read(runtime_data);
1048 long *reg = vc_insn_get_rm(ctxt);
1049
1050 if (!reg)
1051 return ES_DECODE_FAILED;
1052
1053 if (data)
1054 *reg = data->dr7;
1055 else
1056 *reg = DR7_RESET_VALUE;
1057
1058 return ES_OK;
1059 }
1060
1061 static enum es_result vc_handle_wbinvd(struct ghcb *ghcb,
1062 struct es_em_ctxt *ctxt)
1063 {
1064 return sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_WBINVD, 0, 0);
1065 }
1066
1067 static enum es_result vc_handle_rdpmc(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
1068 {
1069 enum es_result ret;
1070
1071 ghcb_set_rcx(ghcb, ctxt->regs->cx);
1072
1073 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_RDPMC, 0, 0);
1074 if (ret != ES_OK)
1075 return ret;
1076
1077 if (!(ghcb_rax_is_valid(ghcb) && ghcb_rdx_is_valid(ghcb)))
1078 return ES_VMM_ERROR;
1079
1080 ctxt->regs->ax = ghcb->save.rax;
1081 ctxt->regs->dx = ghcb->save.rdx;
1082
1083 return ES_OK;
1084 }
1085
1086 static enum es_result vc_handle_monitor(struct ghcb *ghcb,
1087 struct es_em_ctxt *ctxt)
1088 {
1089 /*
1090 * Treat it as a NOP and do not leak a physical address to the
1091 * hypervisor.
1092 */
1093 return ES_OK;
1094 }
1095
1096 static enum es_result vc_handle_mwait(struct ghcb *ghcb,
1097 struct es_em_ctxt *ctxt)
1098 {
1099 /* Treat the same as MONITOR/MONITORX */
1100 return ES_OK;
1101 }
1102
1103 static enum es_result vc_handle_vmmcall(struct ghcb *ghcb,
1104 struct es_em_ctxt *ctxt)
1105 {
1106 enum es_result ret;
1107
1108 ghcb_set_rax(ghcb, ctxt->regs->ax);
1109 ghcb_set_cpl(ghcb, user_mode(ctxt->regs) ? 3 : 0);
1110
1111 if (x86_platform.hyper.sev_es_hcall_prepare)
1112 x86_platform.hyper.sev_es_hcall_prepare(ghcb, ctxt->regs);
1113
1114 ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_VMMCALL, 0, 0);
1115 if (ret != ES_OK)
1116 return ret;
1117
1118 if (!ghcb_rax_is_valid(ghcb))
1119 return ES_VMM_ERROR;
1120
1121 ctxt->regs->ax = ghcb->save.rax;
1122
1123 /*
1124 * Call sev_es_hcall_finish() after regs->ax is already set.
1125 * This allows the hypervisor handler to overwrite it again if
1126 * necessary.
1127 */
1128 if (x86_platform.hyper.sev_es_hcall_finish &&
1129 !x86_platform.hyper.sev_es_hcall_finish(ghcb, ctxt->regs))
1130 return ES_VMM_ERROR;
1131
1132 return ES_OK;
1133 }
1134
1135 static enum es_result vc_handle_trap_ac(struct ghcb *ghcb,
1136 struct es_em_ctxt *ctxt)
1137 {
1138 /*
1139 * Calling ecx_alignment_check() directly does not work, because it
1140 * enables IRQs and the GHCB is active. Forward the exception and call
1141 * it later from vc_forward_exception().
1142 */
1143 ctxt->fi.vector = X86_TRAP_AC;
1144 ctxt->fi.error_code = 0;
1145 return ES_EXCEPTION;
1146 }
1147
1148 static __always_inline void vc_handle_trap_db(struct pt_regs *regs)
1149 {
1150 if (user_mode(regs))
1151 noist_exc_debug(regs);
1152 else
1153 exc_debug(regs);
1154 }
1155
1156 static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt,
1157 struct ghcb *ghcb,
1158 unsigned long exit_code)
1159 {
1160 enum es_result result;
1161
1162 switch (exit_code) {
1163 case SVM_EXIT_READ_DR7:
1164 result = vc_handle_dr7_read(ghcb, ctxt);
1165 break;
1166 case SVM_EXIT_WRITE_DR7:
1167 result = vc_handle_dr7_write(ghcb, ctxt);
1168 break;
1169 case SVM_EXIT_EXCP_BASE + X86_TRAP_AC:
1170 result = vc_handle_trap_ac(ghcb, ctxt);
1171 break;
1172 case SVM_EXIT_RDTSC:
1173 case SVM_EXIT_RDTSCP:
1174 result = vc_handle_rdtsc(ghcb, ctxt, exit_code);
1175 break;
1176 case SVM_EXIT_RDPMC:
1177 result = vc_handle_rdpmc(ghcb, ctxt);
1178 break;
1179 case SVM_EXIT_INVD:
1180 pr_err_ratelimited("#VC exception for INVD??? Seriously???\n");
1181 result = ES_UNSUPPORTED;
1182 break;
1183 case SVM_EXIT_CPUID:
1184 result = vc_handle_cpuid(ghcb, ctxt);
1185 break;
1186 case SVM_EXIT_IOIO:
1187 result = vc_handle_ioio(ghcb, ctxt);
1188 break;
1189 case SVM_EXIT_MSR:
1190 result = vc_handle_msr(ghcb, ctxt);
1191 break;
1192 case SVM_EXIT_VMMCALL:
1193 result = vc_handle_vmmcall(ghcb, ctxt);
1194 break;
1195 case SVM_EXIT_WBINVD:
1196 result = vc_handle_wbinvd(ghcb, ctxt);
1197 break;
1198 case SVM_EXIT_MONITOR:
1199 result = vc_handle_monitor(ghcb, ctxt);
1200 break;
1201 case SVM_EXIT_MWAIT:
1202 result = vc_handle_mwait(ghcb, ctxt);
1203 break;
1204 case SVM_EXIT_NPF:
1205 result = vc_handle_mmio(ghcb, ctxt);
1206 break;
1207 default:
1208 /*
1209 * Unexpected #VC exception
1210 */
1211 result = ES_UNSUPPORTED;
1212 }
1213
1214 return result;
1215 }
1216
1217 static __always_inline void vc_forward_exception(struct es_em_ctxt *ctxt)
1218 {
1219 long error_code = ctxt->fi.error_code;
1220 int trapnr = ctxt->fi.vector;
1221
1222 ctxt->regs->orig_ax = ctxt->fi.error_code;
1223
1224 switch (trapnr) {
1225 case X86_TRAP_GP:
1226 exc_general_protection(ctxt->regs, error_code);
1227 break;
1228 case X86_TRAP_UD:
1229 exc_invalid_op(ctxt->regs);
1230 break;
1231 case X86_TRAP_AC:
1232 exc_alignment_check(ctxt->regs, error_code);
1233 break;
1234 default:
1235 pr_emerg("Unsupported exception in #VC instruction emulation - can't continue\n");
1236 BUG();
1237 }
1238 }
1239
1240 static __always_inline bool on_vc_fallback_stack(struct pt_regs *regs)
1241 {
1242 unsigned long sp = (unsigned long)regs;
1243
1244 return (sp >= __this_cpu_ist_bottom_va(VC2) && sp < __this_cpu_ist_top_va(VC2));
1245 }
1246
1247 /*
1248 * Main #VC exception handler. It is called when the entry code was able to
1249 * switch off the IST to a safe kernel stack.
1250 *
1251 * With the current implementation it is always possible to switch to a safe
1252 * stack because #VC exceptions only happen at known places, like intercepted
1253 * instructions or accesses to MMIO areas/IO ports. They can also happen with
1254 * code instrumentation when the hypervisor intercepts #DB, but the critical
1255 * paths are forbidden to be instrumented, so #DB exceptions currently also
1256 * only happen in safe places.
1257 */
1258 DEFINE_IDTENTRY_VC_SAFE_STACK(exc_vmm_communication)
1259 {
1260 struct sev_es_runtime_data *data = this_cpu_read(runtime_data);
1261 irqentry_state_t irq_state;
1262 struct ghcb_state state;
1263 struct es_em_ctxt ctxt;
1264 enum es_result result;
1265 struct ghcb *ghcb;
1266
1267 /*
1268 * Handle #DB before calling into !noinstr code to avoid recursive #DB.
1269 */
1270 if (error_code == SVM_EXIT_EXCP_BASE + X86_TRAP_DB) {
1271 vc_handle_trap_db(regs);
1272 return;
1273 }
1274
1275 irq_state = irqentry_nmi_enter(regs);
1276 lockdep_assert_irqs_disabled();
1277 instrumentation_begin();
1278
1279 /*
1280 * This is invoked through an interrupt gate, so IRQs are disabled. The
1281 * code below might walk page-tables for user or kernel addresses, so
1282 * keep the IRQs disabled to protect us against concurrent TLB flushes.
1283 */
1284
1285 ghcb = sev_es_get_ghcb(&state);
1286 if (!ghcb) {
1287 /*
1288 * Mark GHCBs inactive so that panic() is able to print the
1289 * message.
1290 */
1291 data->ghcb_active = false;
1292 data->backup_ghcb_active = false;
1293
1294 panic("Unable to handle #VC exception! GHCB and Backup GHCB are already in use");
1295 }
1296
1297 vc_ghcb_invalidate(ghcb);
1298 result = vc_init_em_ctxt(&ctxt, regs, error_code);
1299
1300 if (result == ES_OK)
1301 result = vc_handle_exitcode(&ctxt, ghcb, error_code);
1302
1303 sev_es_put_ghcb(&state);
1304
1305 /* Done - now check the result */
1306 switch (result) {
1307 case ES_OK:
1308 vc_finish_insn(&ctxt);
1309 break;
1310 case ES_UNSUPPORTED:
1311 pr_err_ratelimited("Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n",
1312 error_code, regs->ip);
1313 goto fail;
1314 case ES_VMM_ERROR:
1315 pr_err_ratelimited("Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",
1316 error_code, regs->ip);
1317 goto fail;
1318 case ES_DECODE_FAILED:
1319 pr_err_ratelimited("Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",
1320 error_code, regs->ip);
1321 goto fail;
1322 case ES_EXCEPTION:
1323 vc_forward_exception(&ctxt);
1324 break;
1325 case ES_RETRY:
1326 /* Nothing to do */
1327 break;
1328 default:
1329 pr_emerg("Unknown result in %s():%d\n", __func__, result);
1330 /*
1331 * Emulating the instruction which caused the #VC exception
1332 * failed - can't continue so print debug information
1333 */
1334 BUG();
1335 }
1336
1337 out:
1338 instrumentation_end();
1339 irqentry_nmi_exit(regs, irq_state);
1340
1341 return;
1342
1343 fail:
1344 if (user_mode(regs)) {
1345 /*
1346 * Do not kill the machine if user-space triggered the
1347 * exception. Send SIGBUS instead and let user-space deal with
1348 * it.
1349 */
1350 force_sig_fault(SIGBUS, BUS_OBJERR, (void __user *)0);
1351 } else {
1352 pr_emerg("PANIC: Unhandled #VC exception in kernel space (result=%d)\n",
1353 result);
1354
1355 /* Show some debug info */
1356 show_regs(regs);
1357
1358 /* Ask hypervisor to sev_es_terminate */
1359 sev_es_terminate(GHCB_SEV_ES_REASON_GENERAL_REQUEST);
1360
1361 /* If that fails and we get here - just panic */
1362 panic("Returned from Terminate-Request to Hypervisor\n");
1363 }
1364
1365 goto out;
1366 }
1367
1368 /* This handler runs on the #VC fall-back stack. It can cause further #VC exceptions */
1369 DEFINE_IDTENTRY_VC_IST(exc_vmm_communication)
1370 {
1371 instrumentation_begin();
1372 panic("Can't handle #VC exception from unsupported context\n");
1373 instrumentation_end();
1374 }
1375
1376 DEFINE_IDTENTRY_VC(exc_vmm_communication)
1377 {
1378 if (likely(!on_vc_fallback_stack(regs)))
1379 safe_stack_exc_vmm_communication(regs, error_code);
1380 else
1381 ist_exc_vmm_communication(regs, error_code);
1382 }
1383
1384 bool __init handle_vc_boot_ghcb(struct pt_regs *regs)
1385 {
1386 unsigned long exit_code = regs->orig_ax;
1387 struct es_em_ctxt ctxt;
1388 enum es_result result;
1389
1390 /* Do initial setup or terminate the guest */
1391 if (unlikely(boot_ghcb == NULL && !sev_es_setup_ghcb()))
1392 sev_es_terminate(GHCB_SEV_ES_REASON_GENERAL_REQUEST);
1393
1394 vc_ghcb_invalidate(boot_ghcb);
1395
1396 result = vc_init_em_ctxt(&ctxt, regs, exit_code);
1397 if (result == ES_OK)
1398 result = vc_handle_exitcode(&ctxt, boot_ghcb, exit_code);
1399
1400 /* Done - now check the result */
1401 switch (result) {
1402 case ES_OK:
1403 vc_finish_insn(&ctxt);
1404 break;
1405 case ES_UNSUPPORTED:
1406 early_printk("PANIC: Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n",
1407 exit_code, regs->ip);
1408 goto fail;
1409 case ES_VMM_ERROR:
1410 early_printk("PANIC: Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",
1411 exit_code, regs->ip);
1412 goto fail;
1413 case ES_DECODE_FAILED:
1414 early_printk("PANIC: Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",
1415 exit_code, regs->ip);
1416 goto fail;
1417 case ES_EXCEPTION:
1418 vc_early_forward_exception(&ctxt);
1419 break;
1420 case ES_RETRY:
1421 /* Nothing to do */
1422 break;
1423 default:
1424 BUG();
1425 }
1426
1427 return true;
1428
1429 fail:
1430 show_regs(regs);
1431
1432 while (true)
1433 halt();
1434 }