2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
5 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
50 #include <linux/tboot.h>
51 #include <linux/stackprotector.h>
52 #include <linux/gfp.h>
59 #include <asm/trampoline.h>
62 #include <asm/pgtable.h>
63 #include <asm/tlbflush.h>
65 #include <asm/mwait.h>
67 #include <asm/io_apic.h>
68 #include <asm/setup.h>
69 #include <asm/uv/uv.h>
70 #include <linux/mc146818rtc.h>
72 #include <asm/smpboot_hooks.h>
73 #include <asm/i8259.h>
75 /* State of each CPU */
76 DEFINE_PER_CPU(int, cpu_state
) = { 0 };
78 /* Store all idle threads, this can be reused instead of creating
79 * a new thread. Also avoids complicated thread destroy functionality
82 #ifdef CONFIG_HOTPLUG_CPU
84 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
85 * removed after init for !CONFIG_HOTPLUG_CPU.
87 static DEFINE_PER_CPU(struct task_struct
*, idle_thread_array
);
88 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
89 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
92 * We need this for trampoline_base protection from concurrent accesses when
93 * off- and onlining cores wildly.
95 static DEFINE_MUTEX(x86_cpu_hotplug_driver_mutex
);
97 void cpu_hotplug_driver_lock(void)
99 mutex_lock(&x86_cpu_hotplug_driver_mutex
);
102 void cpu_hotplug_driver_unlock(void)
104 mutex_unlock(&x86_cpu_hotplug_driver_mutex
);
107 ssize_t
arch_cpu_probe(const char *buf
, size_t count
) { return -1; }
108 ssize_t
arch_cpu_release(const char *buf
, size_t count
) { return -1; }
110 static struct task_struct
*idle_thread_array
[NR_CPUS
] __cpuinitdata
;
111 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
112 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
115 /* Number of siblings per CPU package */
116 int smp_num_siblings
= 1;
117 EXPORT_SYMBOL(smp_num_siblings
);
119 /* Last level cache ID of each logical CPU */
120 DEFINE_PER_CPU(u16
, cpu_llc_id
) = BAD_APICID
;
122 /* representing HT siblings of each logical CPU */
123 DEFINE_PER_CPU(cpumask_var_t
, cpu_sibling_map
);
124 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map
);
126 /* representing HT and core siblings of each logical CPU */
127 DEFINE_PER_CPU(cpumask_var_t
, cpu_core_map
);
128 EXPORT_PER_CPU_SYMBOL(cpu_core_map
);
130 DEFINE_PER_CPU(cpumask_var_t
, cpu_llc_shared_map
);
132 /* Per CPU bogomips and other parameters */
133 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86
, cpu_info
);
134 EXPORT_PER_CPU_SYMBOL(cpu_info
);
136 atomic_t init_deasserted
;
139 * Report back to the Boot Processor.
142 static void __cpuinit
smp_callin(void)
145 unsigned long timeout
;
148 * If waken up by an INIT in an 82489DX configuration
149 * we may get here before an INIT-deassert IPI reaches
150 * our local APIC. We have to wait for the IPI or we'll
151 * lock up on an APIC access.
153 if (apic
->wait_for_init_deassert
)
154 apic
->wait_for_init_deassert(&init_deasserted
);
157 * (This works even if the APIC is not enabled.)
159 phys_id
= read_apic_id();
160 cpuid
= smp_processor_id();
161 if (cpumask_test_cpu(cpuid
, cpu_callin_mask
)) {
162 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__
,
165 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid
, phys_id
);
168 * STARTUP IPIs are fragile beasts as they might sometimes
169 * trigger some glue motherboard logic. Complete APIC bus
170 * silence for 1 second, this overestimates the time the
171 * boot CPU is spending to send the up to 2 STARTUP IPIs
172 * by a factor of two. This should be enough.
176 * Waiting 2s total for startup (udelay is not yet working)
178 timeout
= jiffies
+ 2*HZ
;
179 while (time_before(jiffies
, timeout
)) {
181 * Has the boot CPU finished it's STARTUP sequence?
183 if (cpumask_test_cpu(cpuid
, cpu_callout_mask
))
188 if (!time_before(jiffies
, timeout
)) {
189 panic("%s: CPU%d started up but did not get a callout!\n",
194 * the boot CPU has finished the init stage and is spinning
195 * on callin_map until we finish. We are free to set up this
196 * CPU, first the APIC. (this is probably redundant on most
200 pr_debug("CALLIN, before setup_local_APIC().\n");
201 if (apic
->smp_callin_clear_local_apic
)
202 apic
->smp_callin_clear_local_apic();
204 end_local_APIC_setup();
207 * Need to setup vector mappings before we enable interrupts.
209 setup_vector_irq(smp_processor_id());
212 * Save our processor parameters. Note: this information
213 * is needed for clock calibration.
215 smp_store_cpu_info(cpuid
);
219 * Update loops_per_jiffy in cpu_data. Previous call to
220 * smp_store_cpu_info() stored a value that is close but not as
221 * accurate as the value just calculated.
223 * Need to enable IRQs because it can take longer and then
224 * the NMI watchdog might kill us.
228 cpu_data(cpuid
).loops_per_jiffy
= loops_per_jiffy
;
230 pr_debug("Stack at about %p\n", &cpuid
);
233 * This must be done before setting cpu_online_mask
234 * or calling notify_cpu_starting.
236 set_cpu_sibling_map(raw_smp_processor_id());
239 notify_cpu_starting(cpuid
);
242 * Allow the master to continue.
244 cpumask_set_cpu(cpuid
, cpu_callin_mask
);
248 * Activate a secondary processor.
250 notrace
static void __cpuinit
start_secondary(void *unused
)
253 * Don't put *anything* before cpu_init(), SMP booting is too
254 * fragile that we want to limit the things done here to the
255 * most necessary things.
262 /* switch away from the initial page table */
263 load_cr3(swapper_pg_dir
);
267 /* otherwise gcc will move up smp_processor_id before the cpu_init */
270 * Check TSC synchronization with the BP:
272 check_tsc_sync_target();
275 * We need to hold call_lock, so there is no inconsistency
276 * between the time smp_call_function() determines number of
277 * IPI recipients, and the time when the determination is made
278 * for which cpus receive the IPI. Holding this
279 * lock helps us to not include this cpu in a currently in progress
280 * smp_call_function().
282 * We need to hold vector_lock so there the set of online cpus
283 * does not change while we are assigning vectors to cpus. Holding
284 * this lock ensures we don't half assign or remove an irq from a cpu.
288 set_cpu_online(smp_processor_id(), true);
289 unlock_vector_lock();
291 per_cpu(cpu_state
, smp_processor_id()) = CPU_ONLINE
;
292 x86_platform
.nmi_init();
294 /* enable local interrupts */
297 /* to prevent fake stack check failure in clock setup */
298 boot_init_stack_canary();
300 x86_cpuinit
.setup_percpu_clockev();
307 * The bootstrap kernel entry code has set these up. Save them for
311 void __cpuinit
smp_store_cpu_info(int id
)
313 struct cpuinfo_x86
*c
= &cpu_data(id
);
318 identify_secondary_cpu(c
);
321 static void __cpuinit
link_thread_siblings(int cpu1
, int cpu2
)
323 cpumask_set_cpu(cpu1
, cpu_sibling_mask(cpu2
));
324 cpumask_set_cpu(cpu2
, cpu_sibling_mask(cpu1
));
325 cpumask_set_cpu(cpu1
, cpu_core_mask(cpu2
));
326 cpumask_set_cpu(cpu2
, cpu_core_mask(cpu1
));
327 cpumask_set_cpu(cpu1
, cpu_llc_shared_mask(cpu2
));
328 cpumask_set_cpu(cpu2
, cpu_llc_shared_mask(cpu1
));
332 void __cpuinit
set_cpu_sibling_map(int cpu
)
335 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
337 cpumask_set_cpu(cpu
, cpu_sibling_setup_mask
);
339 if (smp_num_siblings
> 1) {
340 for_each_cpu(i
, cpu_sibling_setup_mask
) {
341 struct cpuinfo_x86
*o
= &cpu_data(i
);
343 if (cpu_has(c
, X86_FEATURE_TOPOEXT
)) {
344 if (c
->phys_proc_id
== o
->phys_proc_id
&&
345 per_cpu(cpu_llc_id
, cpu
) == per_cpu(cpu_llc_id
, i
) &&
346 c
->compute_unit_id
== o
->compute_unit_id
)
347 link_thread_siblings(cpu
, i
);
348 } else if (c
->phys_proc_id
== o
->phys_proc_id
&&
349 c
->cpu_core_id
== o
->cpu_core_id
) {
350 link_thread_siblings(cpu
, i
);
354 cpumask_set_cpu(cpu
, cpu_sibling_mask(cpu
));
357 cpumask_set_cpu(cpu
, cpu_llc_shared_mask(cpu
));
359 if (__this_cpu_read(cpu_info
.x86_max_cores
) == 1) {
360 cpumask_copy(cpu_core_mask(cpu
), cpu_sibling_mask(cpu
));
365 for_each_cpu(i
, cpu_sibling_setup_mask
) {
366 if (per_cpu(cpu_llc_id
, cpu
) != BAD_APICID
&&
367 per_cpu(cpu_llc_id
, cpu
) == per_cpu(cpu_llc_id
, i
)) {
368 cpumask_set_cpu(i
, cpu_llc_shared_mask(cpu
));
369 cpumask_set_cpu(cpu
, cpu_llc_shared_mask(i
));
371 if (c
->phys_proc_id
== cpu_data(i
).phys_proc_id
) {
372 cpumask_set_cpu(i
, cpu_core_mask(cpu
));
373 cpumask_set_cpu(cpu
, cpu_core_mask(i
));
375 * Does this new cpu bringup a new core?
377 if (cpumask_weight(cpu_sibling_mask(cpu
)) == 1) {
379 * for each core in package, increment
380 * the booted_cores for this new cpu
382 if (cpumask_first(cpu_sibling_mask(i
)) == i
)
385 * increment the core count for all
386 * the other cpus in this package
389 cpu_data(i
).booted_cores
++;
390 } else if (i
!= cpu
&& !c
->booted_cores
)
391 c
->booted_cores
= cpu_data(i
).booted_cores
;
396 /* maps the cpu to the sched domain representing multi-core */
397 const struct cpumask
*cpu_coregroup_mask(int cpu
)
399 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
401 * For perf, we return last level cache shared map.
402 * And for power savings, we return cpu_core_map
404 if ((sched_mc_power_savings
|| sched_smt_power_savings
) &&
405 !(cpu_has(c
, X86_FEATURE_AMD_DCM
)))
406 return cpu_core_mask(cpu
);
408 return cpu_llc_shared_mask(cpu
);
411 static void impress_friends(void)
414 unsigned long bogosum
= 0;
416 * Allow the user to impress friends.
418 pr_debug("Before bogomips.\n");
419 for_each_possible_cpu(cpu
)
420 if (cpumask_test_cpu(cpu
, cpu_callout_mask
))
421 bogosum
+= cpu_data(cpu
).loops_per_jiffy
;
423 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
426 (bogosum
/(5000/HZ
))%100);
428 pr_debug("Before bogocount - setting activated=1.\n");
431 void __inquire_remote_apic(int apicid
)
433 unsigned i
, regs
[] = { APIC_ID
>> 4, APIC_LVR
>> 4, APIC_SPIV
>> 4 };
434 const char * const names
[] = { "ID", "VERSION", "SPIV" };
438 printk(KERN_INFO
"Inquiring remote APIC 0x%x...\n", apicid
);
440 for (i
= 0; i
< ARRAY_SIZE(regs
); i
++) {
441 printk(KERN_INFO
"... APIC 0x%x %s: ", apicid
, names
[i
]);
446 status
= safe_apic_wait_icr_idle();
449 "a previous APIC delivery may have failed\n");
451 apic_icr_write(APIC_DM_REMRD
| regs
[i
], apicid
);
456 status
= apic_read(APIC_ICR
) & APIC_ICR_RR_MASK
;
457 } while (status
== APIC_ICR_RR_INPROG
&& timeout
++ < 1000);
460 case APIC_ICR_RR_VALID
:
461 status
= apic_read(APIC_RRR
);
462 printk(KERN_CONT
"%08x\n", status
);
465 printk(KERN_CONT
"failed\n");
471 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
472 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
473 * won't ... remember to clear down the APIC, etc later.
476 wakeup_secondary_cpu_via_nmi(int logical_apicid
, unsigned long start_eip
)
478 unsigned long send_status
, accept_status
= 0;
482 /* Boot on the stack */
483 /* Kick the second */
484 apic_icr_write(APIC_DM_NMI
| apic
->dest_logical
, logical_apicid
);
486 pr_debug("Waiting for send to finish...\n");
487 send_status
= safe_apic_wait_icr_idle();
490 * Give the other CPU some time to accept the IPI.
493 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
])) {
494 maxlvt
= lapic_get_maxlvt();
495 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
496 apic_write(APIC_ESR
, 0);
497 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
499 pr_debug("NMI sent.\n");
502 printk(KERN_ERR
"APIC never delivered???\n");
504 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
506 return (send_status
| accept_status
);
510 wakeup_secondary_cpu_via_init(int phys_apicid
, unsigned long start_eip
)
512 unsigned long send_status
, accept_status
= 0;
513 int maxlvt
, num_starts
, j
;
515 maxlvt
= lapic_get_maxlvt();
518 * Be paranoid about clearing APIC errors.
520 if (APIC_INTEGRATED(apic_version
[phys_apicid
])) {
521 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
522 apic_write(APIC_ESR
, 0);
526 pr_debug("Asserting INIT.\n");
529 * Turn INIT on target chip
534 apic_icr_write(APIC_INT_LEVELTRIG
| APIC_INT_ASSERT
| APIC_DM_INIT
,
537 pr_debug("Waiting for send to finish...\n");
538 send_status
= safe_apic_wait_icr_idle();
542 pr_debug("Deasserting INIT.\n");
546 apic_icr_write(APIC_INT_LEVELTRIG
| APIC_DM_INIT
, phys_apicid
);
548 pr_debug("Waiting for send to finish...\n");
549 send_status
= safe_apic_wait_icr_idle();
552 atomic_set(&init_deasserted
, 1);
555 * Should we send STARTUP IPIs ?
557 * Determine this based on the APIC version.
558 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
560 if (APIC_INTEGRATED(apic_version
[phys_apicid
]))
566 * Paravirt / VMI wants a startup IPI hook here to set up the
567 * target processor state.
569 startup_ipi_hook(phys_apicid
, (unsigned long) start_secondary
,
573 * Run STARTUP IPI loop.
575 pr_debug("#startup loops: %d.\n", num_starts
);
577 for (j
= 1; j
<= num_starts
; j
++) {
578 pr_debug("Sending STARTUP #%d.\n", j
);
579 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
580 apic_write(APIC_ESR
, 0);
582 pr_debug("After apic_write.\n");
589 /* Boot on the stack */
590 /* Kick the second */
591 apic_icr_write(APIC_DM_STARTUP
| (start_eip
>> 12),
595 * Give the other CPU some time to accept the IPI.
599 pr_debug("Startup point 1.\n");
601 pr_debug("Waiting for send to finish...\n");
602 send_status
= safe_apic_wait_icr_idle();
605 * Give the other CPU some time to accept the IPI.
608 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
609 apic_write(APIC_ESR
, 0);
610 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
611 if (send_status
|| accept_status
)
614 pr_debug("After Startup.\n");
617 printk(KERN_ERR
"APIC never delivered???\n");
619 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
621 return (send_status
| accept_status
);
625 struct work_struct work
;
626 struct task_struct
*idle
;
627 struct completion done
;
631 static void __cpuinit
do_fork_idle(struct work_struct
*work
)
633 struct create_idle
*c_idle
=
634 container_of(work
, struct create_idle
, work
);
636 c_idle
->idle
= fork_idle(c_idle
->cpu
);
637 complete(&c_idle
->done
);
640 /* reduce the number of lines printed when booting a large cpu count system */
641 static void __cpuinit
announce_cpu(int cpu
, int apicid
)
643 static int current_node
= -1;
644 int node
= early_cpu_to_node(cpu
);
646 if (system_state
== SYSTEM_BOOTING
) {
647 if (node
!= current_node
) {
648 if (current_node
> (-1))
651 pr_info("Booting Node %3d, Processors ", node
);
653 pr_cont(" #%d%s", cpu
, cpu
== (nr_cpu_ids
- 1) ? " Ok.\n" : "");
656 pr_info("Booting Node %d Processor %d APIC 0x%x\n",
661 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
662 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
663 * Returns zero if CPU booted OK, else error code from
664 * ->wakeup_secondary_cpu.
666 static int __cpuinit
do_boot_cpu(int apicid
, int cpu
)
668 unsigned long boot_error
= 0;
669 unsigned long start_ip
;
671 struct create_idle c_idle
= {
673 .done
= COMPLETION_INITIALIZER_ONSTACK(c_idle
.done
),
676 INIT_WORK_ONSTACK(&c_idle
.work
, do_fork_idle
);
678 alternatives_smp_switch(1);
680 c_idle
.idle
= get_idle_for_cpu(cpu
);
683 * We can't use kernel_thread since we must avoid to
684 * reschedule the child.
687 c_idle
.idle
->thread
.sp
= (unsigned long) (((struct pt_regs
*)
688 (THREAD_SIZE
+ task_stack_page(c_idle
.idle
))) - 1);
689 init_idle(c_idle
.idle
, cpu
);
693 schedule_work(&c_idle
.work
);
694 wait_for_completion(&c_idle
.done
);
696 if (IS_ERR(c_idle
.idle
)) {
697 printk("failed fork for CPU %d\n", cpu
);
698 destroy_work_on_stack(&c_idle
.work
);
699 return PTR_ERR(c_idle
.idle
);
702 set_idle_for_cpu(cpu
, c_idle
.idle
);
704 per_cpu(current_task
, cpu
) = c_idle
.idle
;
706 /* Stack for startup_32 can be just as for start_secondary onwards */
709 clear_tsk_thread_flag(c_idle
.idle
, TIF_FORK
);
710 initial_gs
= per_cpu_offset(cpu
);
711 per_cpu(kernel_stack
, cpu
) =
712 (unsigned long)task_stack_page(c_idle
.idle
) -
713 KERNEL_STACK_OFFSET
+ THREAD_SIZE
;
715 early_gdt_descr
.address
= (unsigned long)get_cpu_gdt_table(cpu
);
716 initial_code
= (unsigned long)start_secondary
;
717 stack_start
= c_idle
.idle
->thread
.sp
;
719 /* start_ip had better be page-aligned! */
720 start_ip
= trampoline_address();
722 /* So we see what's up */
723 announce_cpu(cpu
, apicid
);
726 * This grunge runs the startup process for
727 * the targeted processor.
730 atomic_set(&init_deasserted
, 0);
732 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
) {
734 pr_debug("Setting warm reset code and vector.\n");
736 smpboot_setup_warm_reset_vector(start_ip
);
738 * Be paranoid about clearing APIC errors.
740 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
])) {
741 apic_write(APIC_ESR
, 0);
747 * Kick the secondary CPU. Use the method in the APIC driver
748 * if it's defined - or use an INIT boot APIC message otherwise:
750 if (apic
->wakeup_secondary_cpu
)
751 boot_error
= apic
->wakeup_secondary_cpu(apicid
, start_ip
);
753 boot_error
= wakeup_secondary_cpu_via_init(apicid
, start_ip
);
757 * allow APs to start initializing.
759 pr_debug("Before Callout %d.\n", cpu
);
760 cpumask_set_cpu(cpu
, cpu_callout_mask
);
761 pr_debug("After Callout %d.\n", cpu
);
764 * Wait 5s total for a response
766 for (timeout
= 0; timeout
< 50000; timeout
++) {
767 if (cpumask_test_cpu(cpu
, cpu_callin_mask
))
768 break; /* It has booted */
771 * Allow other tasks to run while we wait for the
772 * AP to come online. This also gives a chance
773 * for the MTRR work(triggered by the AP coming online)
774 * to be completed in the stop machine context.
779 if (cpumask_test_cpu(cpu
, cpu_callin_mask
))
780 pr_debug("CPU%d: has booted.\n", cpu
);
783 if (*(volatile u32
*)TRAMPOLINE_SYM(trampoline_status
)
785 /* trampoline started but...? */
786 pr_err("CPU%d: Stuck ??\n", cpu
);
788 /* trampoline code not run */
789 pr_err("CPU%d: Not responding.\n", cpu
);
790 if (apic
->inquire_remote_apic
)
791 apic
->inquire_remote_apic(apicid
);
796 /* Try to put things back the way they were before ... */
797 numa_remove_cpu(cpu
); /* was set by numa_add_cpu */
799 /* was set by do_boot_cpu() */
800 cpumask_clear_cpu(cpu
, cpu_callout_mask
);
802 /* was set by cpu_init() */
803 cpumask_clear_cpu(cpu
, cpu_initialized_mask
);
805 set_cpu_present(cpu
, false);
806 per_cpu(x86_cpu_to_apicid
, cpu
) = BAD_APICID
;
809 /* mark "stuck" area as not stuck */
810 *(volatile u32
*)TRAMPOLINE_SYM(trampoline_status
) = 0;
812 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
) {
814 * Cleanup possible dangling ends...
816 smpboot_restore_warm_reset_vector();
819 destroy_work_on_stack(&c_idle
.work
);
823 int __cpuinit
native_cpu_up(unsigned int cpu
)
825 int apicid
= apic
->cpu_present_to_apicid(cpu
);
829 WARN_ON(irqs_disabled());
831 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu
);
833 if (apicid
== BAD_APICID
|| apicid
== boot_cpu_physical_apicid
||
834 !physid_isset(apicid
, phys_cpu_present_map
) ||
835 (!x2apic_mode
&& apicid
>= 255)) {
836 printk(KERN_ERR
"%s: bad cpu %d\n", __func__
, cpu
);
841 * Already booted CPU?
843 if (cpumask_test_cpu(cpu
, cpu_callin_mask
)) {
844 pr_debug("do_boot_cpu %d Already started\n", cpu
);
849 * Save current MTRR state in case it was changed since early boot
850 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
854 per_cpu(cpu_state
, cpu
) = CPU_UP_PREPARE
;
856 err
= do_boot_cpu(apicid
, cpu
);
858 pr_debug("do_boot_cpu failed %d\n", err
);
863 * Check TSC synchronization with the AP (keep irqs disabled
866 local_irq_save(flags
);
867 check_tsc_sync_source(cpu
);
868 local_irq_restore(flags
);
870 while (!cpu_online(cpu
)) {
872 touch_nmi_watchdog();
879 * arch_disable_smp_support() - disables SMP support for x86 at runtime
881 void arch_disable_smp_support(void)
883 disable_ioapic_support();
887 * Fall back to non SMP mode after errors.
889 * RED-PEN audit/test this more. I bet there is more state messed up here.
891 static __init
void disable_smp(void)
893 init_cpu_present(cpumask_of(0));
894 init_cpu_possible(cpumask_of(0));
895 smpboot_clear_io_apic_irqs();
897 if (smp_found_config
)
898 physid_set_mask_of_physid(boot_cpu_physical_apicid
, &phys_cpu_present_map
);
900 physid_set_mask_of_physid(0, &phys_cpu_present_map
);
901 cpumask_set_cpu(0, cpu_sibling_mask(0));
902 cpumask_set_cpu(0, cpu_core_mask(0));
906 * Various sanity checks.
908 static int __init
smp_sanity_check(unsigned max_cpus
)
912 #if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
913 if (def_to_bigsmp
&& nr_cpu_ids
> 8) {
918 "More than 8 CPUs detected - skipping them.\n"
919 "Use CONFIG_X86_BIGSMP.\n");
922 for_each_present_cpu(cpu
) {
924 set_cpu_present(cpu
, false);
929 for_each_possible_cpu(cpu
) {
931 set_cpu_possible(cpu
, false);
939 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map
)) {
941 "weird, boot CPU (#%d) not listed by the BIOS.\n",
942 hard_smp_processor_id());
944 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
948 * If we couldn't find an SMP configuration at boot time,
949 * get out of here now!
951 if (!smp_found_config
&& !acpi_lapic
) {
953 printk(KERN_NOTICE
"SMP motherboard not detected.\n");
955 if (APIC_init_uniprocessor())
956 printk(KERN_NOTICE
"Local APIC not detected."
957 " Using dummy APIC emulation.\n");
962 * Should not be necessary because the MP table should list the boot
963 * CPU too, but we do it for the sake of robustness anyway.
965 if (!apic
->check_phys_apicid_present(boot_cpu_physical_apicid
)) {
967 "weird, boot CPU (#%d) not listed by the BIOS.\n",
968 boot_cpu_physical_apicid
);
969 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
974 * If we couldn't find a local APIC, then get out of here now!
976 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
]) &&
979 pr_err("BIOS bug, local APIC #%d not detected!...\n",
980 boot_cpu_physical_apicid
);
981 pr_err("... forcing use of dummy APIC emulation."
982 "(tell your hw vendor)\n");
984 smpboot_clear_io_apic();
985 disable_ioapic_support();
992 * If SMP should be disabled, then really disable it!
995 printk(KERN_INFO
"SMP mode deactivated.\n");
996 smpboot_clear_io_apic();
1000 bsp_end_local_APIC_setup();
1007 static void __init
smp_cpu_index_default(void)
1010 struct cpuinfo_x86
*c
;
1012 for_each_possible_cpu(i
) {
1014 /* mark all to hotplug */
1015 c
->cpu_index
= nr_cpu_ids
;
1020 * Prepare for SMP bootup. The MP table or ACPI has been read
1021 * earlier. Just do some sanity checking here and enable APIC mode.
1023 void __init
native_smp_prepare_cpus(unsigned int max_cpus
)
1028 smp_cpu_index_default();
1031 * Setup boot CPU information
1033 smp_store_cpu_info(0); /* Final full version of the data */
1034 cpumask_copy(cpu_callin_mask
, cpumask_of(0));
1037 current_thread_info()->cpu
= 0; /* needed? */
1038 for_each_possible_cpu(i
) {
1039 zalloc_cpumask_var(&per_cpu(cpu_sibling_map
, i
), GFP_KERNEL
);
1040 zalloc_cpumask_var(&per_cpu(cpu_core_map
, i
), GFP_KERNEL
);
1041 zalloc_cpumask_var(&per_cpu(cpu_llc_shared_map
, i
), GFP_KERNEL
);
1043 set_cpu_sibling_map(0);
1046 if (smp_sanity_check(max_cpus
) < 0) {
1047 printk(KERN_INFO
"SMP disabled\n");
1052 default_setup_apic_routing();
1055 if (read_apic_id() != boot_cpu_physical_apicid
) {
1056 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1057 read_apic_id(), boot_cpu_physical_apicid
);
1058 /* Or can we switch back to PIC here? */
1065 * Switch from PIC to APIC mode.
1070 * Enable IO APIC before setting up error vector
1072 if (!skip_ioapic_setup
&& nr_ioapics
)
1075 bsp_end_local_APIC_setup();
1077 if (apic
->setup_portio_remap
)
1078 apic
->setup_portio_remap();
1080 smpboot_setup_io_apic();
1082 * Set up local APIC timer on boot CPU.
1085 printk(KERN_INFO
"CPU%d: ", 0);
1086 print_cpu_info(&cpu_data(0));
1087 x86_init
.timers
.setup_percpu_clockev();
1092 set_mtrr_aps_delayed_init();
1097 void arch_disable_nonboot_cpus_begin(void)
1100 * Avoid the smp alternatives switch during the disable_nonboot_cpus().
1101 * In the suspend path, we will be back in the SMP mode shortly anyways.
1103 skip_smp_alternatives
= true;
1106 void arch_disable_nonboot_cpus_end(void)
1108 skip_smp_alternatives
= false;
1111 void arch_enable_nonboot_cpus_begin(void)
1113 set_mtrr_aps_delayed_init();
1116 void arch_enable_nonboot_cpus_end(void)
1122 * Early setup to make printk work.
1124 void __init
native_smp_prepare_boot_cpu(void)
1126 int me
= smp_processor_id();
1127 switch_to_new_gdt(me
);
1128 /* already set me in cpu_online_mask in boot_cpu_init() */
1129 cpumask_set_cpu(me
, cpu_callout_mask
);
1130 per_cpu(cpu_state
, me
) = CPU_ONLINE
;
1133 void __init
native_smp_cpus_done(unsigned int max_cpus
)
1135 pr_debug("Boot done.\n");
1139 #ifdef CONFIG_X86_IO_APIC
1140 setup_ioapic_dest();
1145 static int __initdata setup_possible_cpus
= -1;
1146 static int __init
_setup_possible_cpus(char *str
)
1148 get_option(&str
, &setup_possible_cpus
);
1151 early_param("possible_cpus", _setup_possible_cpus
);
1155 * cpu_possible_mask should be static, it cannot change as cpu's
1156 * are onlined, or offlined. The reason is per-cpu data-structures
1157 * are allocated by some modules at init time, and dont expect to
1158 * do this dynamically on cpu arrival/departure.
1159 * cpu_present_mask on the other hand can change dynamically.
1160 * In case when cpu_hotplug is not compiled, then we resort to current
1161 * behaviour, which is cpu_possible == cpu_present.
1164 * Three ways to find out the number of additional hotplug CPUs:
1165 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1166 * - The user can overwrite it with possible_cpus=NUM
1167 * - Otherwise don't reserve additional CPUs.
1168 * We do this because additional CPUs waste a lot of memory.
1171 __init
void prefill_possible_map(void)
1175 /* no processor from mptable or madt */
1176 if (!num_processors
)
1179 i
= setup_max_cpus
?: 1;
1180 if (setup_possible_cpus
== -1) {
1181 possible
= num_processors
;
1182 #ifdef CONFIG_HOTPLUG_CPU
1184 possible
+= disabled_cpus
;
1190 possible
= setup_possible_cpus
;
1192 total_cpus
= max_t(int, possible
, num_processors
+ disabled_cpus
);
1194 /* nr_cpu_ids could be reduced via nr_cpus= */
1195 if (possible
> nr_cpu_ids
) {
1197 "%d Processors exceeds NR_CPUS limit of %d\n",
1198 possible
, nr_cpu_ids
);
1199 possible
= nr_cpu_ids
;
1202 #ifdef CONFIG_HOTPLUG_CPU
1203 if (!setup_max_cpus
)
1207 "%d Processors exceeds max_cpus limit of %u\n",
1208 possible
, setup_max_cpus
);
1212 printk(KERN_INFO
"SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1213 possible
, max_t(int, possible
- num_processors
, 0));
1215 for (i
= 0; i
< possible
; i
++)
1216 set_cpu_possible(i
, true);
1217 for (; i
< NR_CPUS
; i
++)
1218 set_cpu_possible(i
, false);
1220 nr_cpu_ids
= possible
;
1223 #ifdef CONFIG_HOTPLUG_CPU
1225 static void remove_siblinginfo(int cpu
)
1228 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
1230 for_each_cpu(sibling
, cpu_core_mask(cpu
)) {
1231 cpumask_clear_cpu(cpu
, cpu_core_mask(sibling
));
1233 * last thread sibling in this cpu core going down
1235 if (cpumask_weight(cpu_sibling_mask(cpu
)) == 1)
1236 cpu_data(sibling
).booted_cores
--;
1239 for_each_cpu(sibling
, cpu_sibling_mask(cpu
))
1240 cpumask_clear_cpu(cpu
, cpu_sibling_mask(sibling
));
1241 cpumask_clear(cpu_sibling_mask(cpu
));
1242 cpumask_clear(cpu_core_mask(cpu
));
1243 c
->phys_proc_id
= 0;
1245 cpumask_clear_cpu(cpu
, cpu_sibling_setup_mask
);
1248 static void __ref
remove_cpu_from_maps(int cpu
)
1250 set_cpu_online(cpu
, false);
1251 cpumask_clear_cpu(cpu
, cpu_callout_mask
);
1252 cpumask_clear_cpu(cpu
, cpu_callin_mask
);
1253 /* was set by cpu_init() */
1254 cpumask_clear_cpu(cpu
, cpu_initialized_mask
);
1255 numa_remove_cpu(cpu
);
1258 void cpu_disable_common(void)
1260 int cpu
= smp_processor_id();
1262 remove_siblinginfo(cpu
);
1264 /* It's now safe to remove this processor from the online map */
1266 remove_cpu_from_maps(cpu
);
1267 unlock_vector_lock();
1271 int native_cpu_disable(void)
1273 int cpu
= smp_processor_id();
1276 * Perhaps use cpufreq to drop frequency, but that could go
1277 * into generic code.
1279 * We won't take down the boot processor on i386 due to some
1280 * interrupts only being able to be serviced by the BSP.
1281 * Especially so if we're not using an IOAPIC -zwane
1288 cpu_disable_common();
1292 void native_cpu_die(unsigned int cpu
)
1294 /* We don't do anything here: idle task is faking death itself. */
1297 for (i
= 0; i
< 10; i
++) {
1298 /* They ack this in play_dead by setting CPU_DEAD */
1299 if (per_cpu(cpu_state
, cpu
) == CPU_DEAD
) {
1300 if (system_state
== SYSTEM_RUNNING
)
1301 pr_info("CPU %u is now offline\n", cpu
);
1303 if (1 == num_online_cpus())
1304 alternatives_smp_switch(0);
1309 pr_err("CPU %u didn't die...\n", cpu
);
1312 void play_dead_common(void)
1315 reset_lazy_tlbstate();
1316 amd_e400_remove_cpu(raw_smp_processor_id());
1320 __this_cpu_write(cpu_state
, CPU_DEAD
);
1323 * With physical CPU hotplug, we should halt the cpu
1325 local_irq_disable();
1329 * We need to flush the caches before going to sleep, lest we have
1330 * dirty data in our caches when we come back up.
1332 static inline void mwait_play_dead(void)
1334 unsigned int eax
, ebx
, ecx
, edx
;
1335 unsigned int highest_cstate
= 0;
1336 unsigned int highest_subcstate
= 0;
1339 struct cpuinfo_x86
*c
= __this_cpu_ptr(&cpu_info
);
1341 if (!(this_cpu_has(X86_FEATURE_MWAIT
) && mwait_usable(c
)))
1343 if (!this_cpu_has(X86_FEATURE_CLFLSH
))
1345 if (__this_cpu_read(cpu_info
.cpuid_level
) < CPUID_MWAIT_LEAF
)
1348 eax
= CPUID_MWAIT_LEAF
;
1350 native_cpuid(&eax
, &ebx
, &ecx
, &edx
);
1353 * eax will be 0 if EDX enumeration is not valid.
1354 * Initialized below to cstate, sub_cstate value when EDX is valid.
1356 if (!(ecx
& CPUID5_ECX_EXTENSIONS_SUPPORTED
)) {
1359 edx
>>= MWAIT_SUBSTATE_SIZE
;
1360 for (i
= 0; i
< 7 && edx
; i
++, edx
>>= MWAIT_SUBSTATE_SIZE
) {
1361 if (edx
& MWAIT_SUBSTATE_MASK
) {
1363 highest_subcstate
= edx
& MWAIT_SUBSTATE_MASK
;
1366 eax
= (highest_cstate
<< MWAIT_SUBSTATE_SIZE
) |
1367 (highest_subcstate
- 1);
1371 * This should be a memory location in a cache line which is
1372 * unlikely to be touched by other processors. The actual
1373 * content is immaterial as it is not actually modified in any way.
1375 mwait_ptr
= ¤t_thread_info()->flags
;
1381 * The CLFLUSH is a workaround for erratum AAI65 for
1382 * the Xeon 7400 series. It's not clear it is actually
1383 * needed, but it should be harmless in either case.
1384 * The WBINVD is insufficient due to the spurious-wakeup
1385 * case where we return around the loop.
1388 __monitor(mwait_ptr
, 0, 0);
1394 static inline void hlt_play_dead(void)
1396 if (__this_cpu_read(cpu_info
.x86
) >= 4)
1404 void native_play_dead(void)
1407 tboot_shutdown(TB_SHUTDOWN_WFS
);
1409 mwait_play_dead(); /* Only returns on failure */
1413 #else /* ... !CONFIG_HOTPLUG_CPU */
1414 int native_cpu_disable(void)
1419 void native_cpu_die(unsigned int cpu
)
1421 /* We said "no" in __cpu_disable */
1425 void native_play_dead(void)