2 * x86 SMP booting functions
4 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
5 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
6 * Copyright 2001 Andi Kleen, SuSE Labs.
8 * Much of the core SMP work is based on previous work by Thomas Radke, to
9 * whom a great many thanks are extended.
11 * Thanks to Intel for making available several different Pentium,
12 * Pentium Pro and Pentium-II/Xeon MP machines.
13 * Original development of Linux SMP code supported by Caldera.
15 * This code is released under the GNU General Public License version 2 or
19 * Felix Koop : NR_CPUS used properly
20 * Jose Renau : Handle single CPU case.
21 * Alan Cox : By repeated request 8) - Total BogoMIPS report.
22 * Greg Wright : Fix for kernel stacks panic.
23 * Erich Boleyn : MP v1.4 and additional changes.
24 * Matthias Sattler : Changes for 2.1 kernel map.
25 * Michel Lespinasse : Changes for 2.1 kernel map.
26 * Michael Chastain : Change trampoline.S to gnu as.
27 * Alan Cox : Dumb bug: 'B' step PPro's are fine
28 * Ingo Molnar : Added APIC timers, based on code
30 * Ingo Molnar : various cleanups and rewrites
31 * Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
32 * Maciej W. Rozycki : Bits for genuine 82489DX APICs
33 * Andi Kleen : Changed for SMP boot into long mode.
34 * Martin J. Bligh : Added support for multi-quad systems
35 * Dave Jones : Report invalid combinations of Athlon CPUs.
36 * Rusty Russell : Hacked into shape for new "hotplug" boot process.
37 * Andi Kleen : Converted to new state machine.
38 * Ashok Raj : CPU hotplug support
39 * Glauber Costa : i386 and x86_64 integration
42 #include <linux/init.h>
43 #include <linux/smp.h>
44 #include <linux/module.h>
45 #include <linux/sched.h>
46 #include <linux/percpu.h>
47 #include <linux/bootmem.h>
48 #include <linux/err.h>
49 #include <linux/nmi.h>
50 #include <linux/tboot.h>
57 #include <asm/trampoline.h>
60 #include <asm/pgtable.h>
61 #include <asm/tlbflush.h>
65 #include <asm/setup.h>
66 #include <asm/uv/uv.h>
67 #include <linux/mc146818rtc.h>
69 #include <asm/smpboot_hooks.h>
72 u8 apicid_2_node
[MAX_APICID
];
73 static int low_mappings
;
76 /* State of each CPU */
77 DEFINE_PER_CPU(int, cpu_state
) = { 0 };
79 /* Store all idle threads, this can be reused instead of creating
80 * a new thread. Also avoids complicated thread destroy functionality
83 #ifdef CONFIG_HOTPLUG_CPU
85 * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
86 * removed after init for !CONFIG_HOTPLUG_CPU.
88 static DEFINE_PER_CPU(struct task_struct
*, idle_thread_array
);
89 #define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
90 #define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
92 static struct task_struct
*idle_thread_array
[NR_CPUS
] __cpuinitdata
;
93 #define get_idle_for_cpu(x) (idle_thread_array[(x)])
94 #define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
97 /* Number of siblings per CPU package */
98 int smp_num_siblings
= 1;
99 EXPORT_SYMBOL(smp_num_siblings
);
101 /* Last level cache ID of each logical CPU */
102 DEFINE_PER_CPU(u16
, cpu_llc_id
) = BAD_APICID
;
104 /* representing HT siblings of each logical CPU */
105 DEFINE_PER_CPU(cpumask_var_t
, cpu_sibling_map
);
106 EXPORT_PER_CPU_SYMBOL(cpu_sibling_map
);
108 /* representing HT and core siblings of each logical CPU */
109 DEFINE_PER_CPU(cpumask_var_t
, cpu_core_map
);
110 EXPORT_PER_CPU_SYMBOL(cpu_core_map
);
112 /* Per CPU bogomips and other parameters */
113 DEFINE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86
, cpu_info
);
114 EXPORT_PER_CPU_SYMBOL(cpu_info
);
116 atomic_t init_deasserted
;
118 #if defined(CONFIG_NUMA) && defined(CONFIG_X86_32)
119 /* which node each logical CPU is on */
120 int cpu_to_node_map
[NR_CPUS
] __read_mostly
= { [0 ... NR_CPUS
-1] = 0 };
121 EXPORT_SYMBOL(cpu_to_node_map
);
123 /* set up a mapping between cpu and node. */
124 static void map_cpu_to_node(int cpu
, int node
)
126 printk(KERN_INFO
"Mapping cpu %d to node %d\n", cpu
, node
);
127 cpumask_set_cpu(cpu
, node_to_cpumask_map
[node
]);
128 cpu_to_node_map
[cpu
] = node
;
131 /* undo a mapping between cpu and node. */
132 static void unmap_cpu_to_node(int cpu
)
136 printk(KERN_INFO
"Unmapping cpu %d from all nodes\n", cpu
);
137 for (node
= 0; node
< MAX_NUMNODES
; node
++)
138 cpumask_clear_cpu(cpu
, node_to_cpumask_map
[node
]);
139 cpu_to_node_map
[cpu
] = 0;
141 #else /* !(CONFIG_NUMA && CONFIG_X86_32) */
142 #define map_cpu_to_node(cpu, node) ({})
143 #define unmap_cpu_to_node(cpu) ({})
147 static int boot_cpu_logical_apicid
;
149 u8 cpu_2_logical_apicid
[NR_CPUS
] __read_mostly
=
150 { [0 ... NR_CPUS
-1] = BAD_APICID
};
152 static void map_cpu_to_logical_apicid(void)
154 int cpu
= smp_processor_id();
155 int apicid
= logical_smp_processor_id();
156 int node
= apic
->apicid_to_node(apicid
);
158 if (!node_online(node
))
159 node
= first_online_node
;
161 cpu_2_logical_apicid
[cpu
] = apicid
;
162 map_cpu_to_node(cpu
, node
);
165 void numa_remove_cpu(int cpu
)
167 cpu_2_logical_apicid
[cpu
] = BAD_APICID
;
168 unmap_cpu_to_node(cpu
);
171 #define map_cpu_to_logical_apicid() do {} while (0)
175 * Report back to the Boot Processor.
178 static void __cpuinit
smp_callin(void)
181 unsigned long timeout
;
184 * If waken up by an INIT in an 82489DX configuration
185 * we may get here before an INIT-deassert IPI reaches
186 * our local APIC. We have to wait for the IPI or we'll
187 * lock up on an APIC access.
189 if (apic
->wait_for_init_deassert
)
190 apic
->wait_for_init_deassert(&init_deasserted
);
193 * (This works even if the APIC is not enabled.)
195 phys_id
= read_apic_id();
196 cpuid
= smp_processor_id();
197 if (cpumask_test_cpu(cpuid
, cpu_callin_mask
)) {
198 panic("%s: phys CPU#%d, CPU#%d already present??\n", __func__
,
201 pr_debug("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid
, phys_id
);
204 * STARTUP IPIs are fragile beasts as they might sometimes
205 * trigger some glue motherboard logic. Complete APIC bus
206 * silence for 1 second, this overestimates the time the
207 * boot CPU is spending to send the up to 2 STARTUP IPIs
208 * by a factor of two. This should be enough.
212 * Waiting 2s total for startup (udelay is not yet working)
214 timeout
= jiffies
+ 2*HZ
;
215 while (time_before(jiffies
, timeout
)) {
217 * Has the boot CPU finished it's STARTUP sequence?
219 if (cpumask_test_cpu(cpuid
, cpu_callout_mask
))
224 if (!time_before(jiffies
, timeout
)) {
225 panic("%s: CPU%d started up but did not get a callout!\n",
230 * the boot CPU has finished the init stage and is spinning
231 * on callin_map until we finish. We are free to set up this
232 * CPU, first the APIC. (this is probably redundant on most
236 pr_debug("CALLIN, before setup_local_APIC().\n");
237 if (apic
->smp_callin_clear_local_apic
)
238 apic
->smp_callin_clear_local_apic();
240 end_local_APIC_setup();
241 map_cpu_to_logical_apicid();
243 notify_cpu_starting(cpuid
);
247 * Need to enable IRQs because it can take longer and then
248 * the NMI watchdog might kill us.
253 pr_debug("Stack at about %p\n", &cpuid
);
256 * Save our processor parameters
258 smp_store_cpu_info(cpuid
);
261 * Allow the master to continue.
263 cpumask_set_cpu(cpuid
, cpu_callin_mask
);
267 * Activate a secondary processor.
269 notrace
static void __cpuinit
start_secondary(void *unused
)
272 * Don't put *anything* before cpu_init(), SMP booting is too
273 * fragile that we want to limit the things done here to the
274 * most necessary things.
281 /* otherwise gcc will move up smp_processor_id before the cpu_init */
284 * Check TSC synchronization with the BP:
286 check_tsc_sync_target();
288 if (nmi_watchdog
== NMI_IO_APIC
) {
289 disable_8259A_irq(0);
290 enable_NMI_through_LVT0();
300 /* This must be done before setting cpu_online_mask */
301 set_cpu_sibling_map(raw_smp_processor_id());
305 * We need to hold call_lock, so there is no inconsistency
306 * between the time smp_call_function() determines number of
307 * IPI recipients, and the time when the determination is made
308 * for which cpus receive the IPI. Holding this
309 * lock helps us to not include this cpu in a currently in progress
310 * smp_call_function().
312 * We need to hold vector_lock so there the set of online cpus
313 * does not change while we are assigning vectors to cpus. Holding
314 * this lock ensures we don't half assign or remove an irq from a cpu.
318 __setup_vector_irq(smp_processor_id());
319 set_cpu_online(smp_processor_id(), true);
320 unlock_vector_lock();
322 per_cpu(cpu_state
, smp_processor_id()) = CPU_ONLINE
;
323 x86_platform
.nmi_init();
325 /* enable local interrupts */
328 x86_cpuinit
.setup_percpu_clockev();
334 #ifdef CONFIG_CPUMASK_OFFSTACK
335 /* In this case, llc_shared_map is a pointer to a cpumask. */
336 static inline void copy_cpuinfo_x86(struct cpuinfo_x86
*dst
,
337 const struct cpuinfo_x86
*src
)
339 struct cpumask
*llc
= dst
->llc_shared_map
;
341 dst
->llc_shared_map
= llc
;
344 static inline void copy_cpuinfo_x86(struct cpuinfo_x86
*dst
,
345 const struct cpuinfo_x86
*src
)
349 #endif /* CONFIG_CPUMASK_OFFSTACK */
352 * The bootstrap kernel entry code has set these up. Save them for
356 void __cpuinit
smp_store_cpu_info(int id
)
358 struct cpuinfo_x86
*c
= &cpu_data(id
);
360 copy_cpuinfo_x86(c
, &boot_cpu_data
);
363 identify_secondary_cpu(c
);
367 void __cpuinit
set_cpu_sibling_map(int cpu
)
370 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
372 cpumask_set_cpu(cpu
, cpu_sibling_setup_mask
);
374 if (smp_num_siblings
> 1) {
375 for_each_cpu(i
, cpu_sibling_setup_mask
) {
376 struct cpuinfo_x86
*o
= &cpu_data(i
);
378 if (c
->phys_proc_id
== o
->phys_proc_id
&&
379 c
->cpu_core_id
== o
->cpu_core_id
) {
380 cpumask_set_cpu(i
, cpu_sibling_mask(cpu
));
381 cpumask_set_cpu(cpu
, cpu_sibling_mask(i
));
382 cpumask_set_cpu(i
, cpu_core_mask(cpu
));
383 cpumask_set_cpu(cpu
, cpu_core_mask(i
));
384 cpumask_set_cpu(i
, c
->llc_shared_map
);
385 cpumask_set_cpu(cpu
, o
->llc_shared_map
);
389 cpumask_set_cpu(cpu
, cpu_sibling_mask(cpu
));
392 cpumask_set_cpu(cpu
, c
->llc_shared_map
);
394 if (current_cpu_data
.x86_max_cores
== 1) {
395 cpumask_copy(cpu_core_mask(cpu
), cpu_sibling_mask(cpu
));
400 for_each_cpu(i
, cpu_sibling_setup_mask
) {
401 if (per_cpu(cpu_llc_id
, cpu
) != BAD_APICID
&&
402 per_cpu(cpu_llc_id
, cpu
) == per_cpu(cpu_llc_id
, i
)) {
403 cpumask_set_cpu(i
, c
->llc_shared_map
);
404 cpumask_set_cpu(cpu
, cpu_data(i
).llc_shared_map
);
406 if (c
->phys_proc_id
== cpu_data(i
).phys_proc_id
) {
407 cpumask_set_cpu(i
, cpu_core_mask(cpu
));
408 cpumask_set_cpu(cpu
, cpu_core_mask(i
));
410 * Does this new cpu bringup a new core?
412 if (cpumask_weight(cpu_sibling_mask(cpu
)) == 1) {
414 * for each core in package, increment
415 * the booted_cores for this new cpu
417 if (cpumask_first(cpu_sibling_mask(i
)) == i
)
420 * increment the core count for all
421 * the other cpus in this package
424 cpu_data(i
).booted_cores
++;
425 } else if (i
!= cpu
&& !c
->booted_cores
)
426 c
->booted_cores
= cpu_data(i
).booted_cores
;
431 /* maps the cpu to the sched domain representing multi-core */
432 const struct cpumask
*cpu_coregroup_mask(int cpu
)
434 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
436 * For perf, we return last level cache shared map.
437 * And for power savings, we return cpu_core_map
439 if ((sched_mc_power_savings
|| sched_smt_power_savings
) &&
440 !(cpu_has(c
, X86_FEATURE_AMD_DCM
)))
441 return cpu_core_mask(cpu
);
443 return c
->llc_shared_map
;
446 static void impress_friends(void)
449 unsigned long bogosum
= 0;
451 * Allow the user to impress friends.
453 pr_debug("Before bogomips.\n");
454 for_each_possible_cpu(cpu
)
455 if (cpumask_test_cpu(cpu
, cpu_callout_mask
))
456 bogosum
+= cpu_data(cpu
).loops_per_jiffy
;
458 "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
461 (bogosum
/(5000/HZ
))%100);
463 pr_debug("Before bogocount - setting activated=1.\n");
466 void __inquire_remote_apic(int apicid
)
468 unsigned i
, regs
[] = { APIC_ID
>> 4, APIC_LVR
>> 4, APIC_SPIV
>> 4 };
469 char *names
[] = { "ID", "VERSION", "SPIV" };
473 printk(KERN_INFO
"Inquiring remote APIC 0x%x...\n", apicid
);
475 for (i
= 0; i
< ARRAY_SIZE(regs
); i
++) {
476 printk(KERN_INFO
"... APIC 0x%x %s: ", apicid
, names
[i
]);
481 status
= safe_apic_wait_icr_idle();
484 "a previous APIC delivery may have failed\n");
486 apic_icr_write(APIC_DM_REMRD
| regs
[i
], apicid
);
491 status
= apic_read(APIC_ICR
) & APIC_ICR_RR_MASK
;
492 } while (status
== APIC_ICR_RR_INPROG
&& timeout
++ < 1000);
495 case APIC_ICR_RR_VALID
:
496 status
= apic_read(APIC_RRR
);
497 printk(KERN_CONT
"%08x\n", status
);
500 printk(KERN_CONT
"failed\n");
506 * Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
507 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
508 * won't ... remember to clear down the APIC, etc later.
511 wakeup_secondary_cpu_via_nmi(int logical_apicid
, unsigned long start_eip
)
513 unsigned long send_status
, accept_status
= 0;
517 /* Boot on the stack */
518 /* Kick the second */
519 apic_icr_write(APIC_DM_NMI
| apic
->dest_logical
, logical_apicid
);
521 pr_debug("Waiting for send to finish...\n");
522 send_status
= safe_apic_wait_icr_idle();
525 * Give the other CPU some time to accept the IPI.
528 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
])) {
529 maxlvt
= lapic_get_maxlvt();
530 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
531 apic_write(APIC_ESR
, 0);
532 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
534 pr_debug("NMI sent.\n");
537 printk(KERN_ERR
"APIC never delivered???\n");
539 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
541 return (send_status
| accept_status
);
545 wakeup_secondary_cpu_via_init(int phys_apicid
, unsigned long start_eip
)
547 unsigned long send_status
, accept_status
= 0;
548 int maxlvt
, num_starts
, j
;
550 maxlvt
= lapic_get_maxlvt();
553 * Be paranoid about clearing APIC errors.
555 if (APIC_INTEGRATED(apic_version
[phys_apicid
])) {
556 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
557 apic_write(APIC_ESR
, 0);
561 pr_debug("Asserting INIT.\n");
564 * Turn INIT on target chip
569 apic_icr_write(APIC_INT_LEVELTRIG
| APIC_INT_ASSERT
| APIC_DM_INIT
,
572 pr_debug("Waiting for send to finish...\n");
573 send_status
= safe_apic_wait_icr_idle();
577 pr_debug("Deasserting INIT.\n");
581 apic_icr_write(APIC_INT_LEVELTRIG
| APIC_DM_INIT
, phys_apicid
);
583 pr_debug("Waiting for send to finish...\n");
584 send_status
= safe_apic_wait_icr_idle();
587 atomic_set(&init_deasserted
, 1);
590 * Should we send STARTUP IPIs ?
592 * Determine this based on the APIC version.
593 * If we don't have an integrated APIC, don't send the STARTUP IPIs.
595 if (APIC_INTEGRATED(apic_version
[phys_apicid
]))
601 * Paravirt / VMI wants a startup IPI hook here to set up the
602 * target processor state.
604 startup_ipi_hook(phys_apicid
, (unsigned long) start_secondary
,
605 (unsigned long)stack_start
.sp
);
608 * Run STARTUP IPI loop.
610 pr_debug("#startup loops: %d.\n", num_starts
);
612 for (j
= 1; j
<= num_starts
; j
++) {
613 pr_debug("Sending STARTUP #%d.\n", j
);
614 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
615 apic_write(APIC_ESR
, 0);
617 pr_debug("After apic_write.\n");
624 /* Boot on the stack */
625 /* Kick the second */
626 apic_icr_write(APIC_DM_STARTUP
| (start_eip
>> 12),
630 * Give the other CPU some time to accept the IPI.
634 pr_debug("Startup point 1.\n");
636 pr_debug("Waiting for send to finish...\n");
637 send_status
= safe_apic_wait_icr_idle();
640 * Give the other CPU some time to accept the IPI.
643 if (maxlvt
> 3) /* Due to the Pentium erratum 3AP. */
644 apic_write(APIC_ESR
, 0);
645 accept_status
= (apic_read(APIC_ESR
) & 0xEF);
646 if (send_status
|| accept_status
)
649 pr_debug("After Startup.\n");
652 printk(KERN_ERR
"APIC never delivered???\n");
654 printk(KERN_ERR
"APIC delivery error (%lx).\n", accept_status
);
656 return (send_status
| accept_status
);
660 struct work_struct work
;
661 struct task_struct
*idle
;
662 struct completion done
;
666 static void __cpuinit
do_fork_idle(struct work_struct
*work
)
668 struct create_idle
*c_idle
=
669 container_of(work
, struct create_idle
, work
);
671 c_idle
->idle
= fork_idle(c_idle
->cpu
);
672 complete(&c_idle
->done
);
675 /* reduce the number of lines printed when booting a large cpu count system */
676 static void __cpuinit
announce_cpu(int cpu
, int apicid
)
678 static int current_node
= -1;
679 int node
= cpu_to_node(cpu
);
681 if (system_state
== SYSTEM_BOOTING
) {
682 if (node
!= current_node
) {
683 if (current_node
> (-1))
686 pr_info("Booting Node %3d, Processors ", node
);
688 pr_cont(" #%d%s", cpu
, cpu
== (nr_cpu_ids
- 1) ? " Ok.\n" : "");
691 pr_info("Booting Node %d Processor %d APIC 0x%x\n",
696 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
697 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.
698 * Returns zero if CPU booted OK, else error code from
699 * ->wakeup_secondary_cpu.
701 static int __cpuinit
do_boot_cpu(int apicid
, int cpu
)
703 unsigned long boot_error
= 0;
704 unsigned long start_ip
;
706 struct create_idle c_idle
= {
708 .done
= COMPLETION_INITIALIZER_ONSTACK(c_idle
.done
),
711 INIT_WORK_ON_STACK(&c_idle
.work
, do_fork_idle
);
713 alternatives_smp_switch(1);
715 c_idle
.idle
= get_idle_for_cpu(cpu
);
718 * We can't use kernel_thread since we must avoid to
719 * reschedule the child.
722 c_idle
.idle
->thread
.sp
= (unsigned long) (((struct pt_regs
*)
723 (THREAD_SIZE
+ task_stack_page(c_idle
.idle
))) - 1);
724 init_idle(c_idle
.idle
, cpu
);
728 if (!keventd_up() || current_is_keventd())
729 c_idle
.work
.func(&c_idle
.work
);
731 schedule_work(&c_idle
.work
);
732 wait_for_completion(&c_idle
.done
);
735 if (IS_ERR(c_idle
.idle
)) {
736 printk("failed fork for CPU %d\n", cpu
);
737 destroy_work_on_stack(&c_idle
.work
);
738 return PTR_ERR(c_idle
.idle
);
741 set_idle_for_cpu(cpu
, c_idle
.idle
);
743 per_cpu(current_task
, cpu
) = c_idle
.idle
;
745 /* Stack for startup_32 can be just as for start_secondary onwards */
748 clear_tsk_thread_flag(c_idle
.idle
, TIF_FORK
);
749 initial_gs
= per_cpu_offset(cpu
);
750 per_cpu(kernel_stack
, cpu
) =
751 (unsigned long)task_stack_page(c_idle
.idle
) -
752 KERNEL_STACK_OFFSET
+ THREAD_SIZE
;
754 early_gdt_descr
.address
= (unsigned long)get_cpu_gdt_table(cpu
);
755 initial_code
= (unsigned long)start_secondary
;
756 stack_start
.sp
= (void *) c_idle
.idle
->thread
.sp
;
758 /* start_ip had better be page-aligned! */
759 start_ip
= setup_trampoline();
761 /* So we see what's up */
762 announce_cpu(cpu
, apicid
);
765 * This grunge runs the startup process for
766 * the targeted processor.
769 atomic_set(&init_deasserted
, 0);
771 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
) {
773 pr_debug("Setting warm reset code and vector.\n");
775 smpboot_setup_warm_reset_vector(start_ip
);
777 * Be paranoid about clearing APIC errors.
779 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
])) {
780 apic_write(APIC_ESR
, 0);
786 * Kick the secondary CPU. Use the method in the APIC driver
787 * if it's defined - or use an INIT boot APIC message otherwise:
789 if (apic
->wakeup_secondary_cpu
)
790 boot_error
= apic
->wakeup_secondary_cpu(apicid
, start_ip
);
792 boot_error
= wakeup_secondary_cpu_via_init(apicid
, start_ip
);
796 * allow APs to start initializing.
798 pr_debug("Before Callout %d.\n", cpu
);
799 cpumask_set_cpu(cpu
, cpu_callout_mask
);
800 pr_debug("After Callout %d.\n", cpu
);
803 * Wait 5s total for a response
805 for (timeout
= 0; timeout
< 50000; timeout
++) {
806 if (cpumask_test_cpu(cpu
, cpu_callin_mask
))
807 break; /* It has booted */
811 if (cpumask_test_cpu(cpu
, cpu_callin_mask
))
812 pr_debug("CPU%d: has booted.\n", cpu
);
815 if (*((volatile unsigned char *)trampoline_base
)
817 /* trampoline started but...? */
818 pr_err("CPU%d: Stuck ??\n", cpu
);
820 /* trampoline code not run */
821 pr_err("CPU%d: Not responding.\n", cpu
);
822 if (apic
->inquire_remote_apic
)
823 apic
->inquire_remote_apic(apicid
);
828 /* Try to put things back the way they were before ... */
829 numa_remove_cpu(cpu
); /* was set by numa_add_cpu */
831 /* was set by do_boot_cpu() */
832 cpumask_clear_cpu(cpu
, cpu_callout_mask
);
834 /* was set by cpu_init() */
835 cpumask_clear_cpu(cpu
, cpu_initialized_mask
);
837 set_cpu_present(cpu
, false);
838 per_cpu(x86_cpu_to_apicid
, cpu
) = BAD_APICID
;
841 /* mark "stuck" area as not stuck */
842 *((volatile unsigned long *)trampoline_base
) = 0;
844 if (get_uv_system_type() != UV_NON_UNIQUE_APIC
) {
846 * Cleanup possible dangling ends...
848 smpboot_restore_warm_reset_vector();
851 destroy_work_on_stack(&c_idle
.work
);
855 int __cpuinit
native_cpu_up(unsigned int cpu
)
857 int apicid
= apic
->cpu_present_to_apicid(cpu
);
861 WARN_ON(irqs_disabled());
863 pr_debug("++++++++++++++++++++=_---CPU UP %u\n", cpu
);
865 if (apicid
== BAD_APICID
|| apicid
== boot_cpu_physical_apicid
||
866 !physid_isset(apicid
, phys_cpu_present_map
)) {
867 printk(KERN_ERR
"%s: bad cpu %d\n", __func__
, cpu
);
872 * Already booted CPU?
874 if (cpumask_test_cpu(cpu
, cpu_callin_mask
)) {
875 pr_debug("do_boot_cpu %d Already started\n", cpu
);
880 * Save current MTRR state in case it was changed since early boot
881 * (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
885 per_cpu(cpu_state
, cpu
) = CPU_UP_PREPARE
;
888 /* init low mem mapping */
889 clone_pgd_range(swapper_pg_dir
, swapper_pg_dir
+ KERNEL_PGD_BOUNDARY
,
890 min_t(unsigned long, KERNEL_PGD_PTRS
, KERNEL_PGD_BOUNDARY
));
894 err
= do_boot_cpu(apicid
, cpu
);
896 zap_low_mappings(false);
899 err
= do_boot_cpu(apicid
, cpu
);
902 pr_debug("do_boot_cpu failed %d\n", err
);
907 * Check TSC synchronization with the AP (keep irqs disabled
910 local_irq_save(flags
);
911 check_tsc_sync_source(cpu
);
912 local_irq_restore(flags
);
914 while (!cpu_online(cpu
)) {
916 touch_nmi_watchdog();
923 * Fall back to non SMP mode after errors.
925 * RED-PEN audit/test this more. I bet there is more state messed up here.
927 static __init
void disable_smp(void)
929 init_cpu_present(cpumask_of(0));
930 init_cpu_possible(cpumask_of(0));
931 smpboot_clear_io_apic_irqs();
933 if (smp_found_config
)
934 physid_set_mask_of_physid(boot_cpu_physical_apicid
, &phys_cpu_present_map
);
936 physid_set_mask_of_physid(0, &phys_cpu_present_map
);
937 map_cpu_to_logical_apicid();
938 cpumask_set_cpu(0, cpu_sibling_mask(0));
939 cpumask_set_cpu(0, cpu_core_mask(0));
943 * Various sanity checks.
945 static int __init
smp_sanity_check(unsigned max_cpus
)
949 #if !defined(CONFIG_X86_BIGSMP) && defined(CONFIG_X86_32)
950 if (def_to_bigsmp
&& nr_cpu_ids
> 8) {
955 "More than 8 CPUs detected - skipping them.\n"
956 "Use CONFIG_X86_BIGSMP.\n");
959 for_each_present_cpu(cpu
) {
961 set_cpu_present(cpu
, false);
966 for_each_possible_cpu(cpu
) {
968 set_cpu_possible(cpu
, false);
976 if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map
)) {
978 "weird, boot CPU (#%d) not listed by the BIOS.\n",
979 hard_smp_processor_id());
981 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
985 * If we couldn't find an SMP configuration at boot time,
986 * get out of here now!
988 if (!smp_found_config
&& !acpi_lapic
) {
990 printk(KERN_NOTICE
"SMP motherboard not detected.\n");
992 if (APIC_init_uniprocessor())
993 printk(KERN_NOTICE
"Local APIC not detected."
994 " Using dummy APIC emulation.\n");
999 * Should not be necessary because the MP table should list the boot
1000 * CPU too, but we do it for the sake of robustness anyway.
1002 if (!apic
->check_phys_apicid_present(boot_cpu_physical_apicid
)) {
1004 "weird, boot CPU (#%d) not listed by the BIOS.\n",
1005 boot_cpu_physical_apicid
);
1006 physid_set(hard_smp_processor_id(), phys_cpu_present_map
);
1011 * If we couldn't find a local APIC, then get out of here now!
1013 if (APIC_INTEGRATED(apic_version
[boot_cpu_physical_apicid
]) &&
1015 if (!disable_apic
) {
1016 pr_err("BIOS bug, local APIC #%d not detected!...\n",
1017 boot_cpu_physical_apicid
);
1018 pr_err("... forcing use of dummy APIC emulation."
1019 "(tell your hw vendor)\n");
1021 smpboot_clear_io_apic();
1022 arch_disable_smp_support();
1026 verify_local_APIC();
1029 * If SMP should be disabled, then really disable it!
1032 printk(KERN_INFO
"SMP mode deactivated.\n");
1033 smpboot_clear_io_apic();
1035 localise_nmi_watchdog();
1039 end_local_APIC_setup();
1046 static void __init
smp_cpu_index_default(void)
1049 struct cpuinfo_x86
*c
;
1051 for_each_possible_cpu(i
) {
1053 /* mark all to hotplug */
1054 c
->cpu_index
= nr_cpu_ids
;
1059 * Prepare for SMP bootup. The MP table or ACPI has been read
1060 * earlier. Just do some sanity checking here and enable APIC mode.
1062 void __init
native_smp_prepare_cpus(unsigned int max_cpus
)
1067 smp_cpu_index_default();
1068 current_cpu_data
= boot_cpu_data
;
1069 cpumask_copy(cpu_callin_mask
, cpumask_of(0));
1072 * Setup boot CPU information
1074 smp_store_cpu_info(0); /* Final full version of the data */
1075 #ifdef CONFIG_X86_32
1076 boot_cpu_logical_apicid
= logical_smp_processor_id();
1078 current_thread_info()->cpu
= 0; /* needed? */
1079 for_each_possible_cpu(i
) {
1080 zalloc_cpumask_var(&per_cpu(cpu_sibling_map
, i
), GFP_KERNEL
);
1081 zalloc_cpumask_var(&per_cpu(cpu_core_map
, i
), GFP_KERNEL
);
1082 zalloc_cpumask_var(&cpu_data(i
).llc_shared_map
, GFP_KERNEL
);
1084 set_cpu_sibling_map(0);
1087 #ifdef CONFIG_X86_64
1088 default_setup_apic_routing();
1091 if (smp_sanity_check(max_cpus
) < 0) {
1092 printk(KERN_INFO
"SMP disabled\n");
1098 if (read_apic_id() != boot_cpu_physical_apicid
) {
1099 panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
1100 read_apic_id(), boot_cpu_physical_apicid
);
1101 /* Or can we switch back to PIC here? */
1108 * Switch from PIC to APIC mode.
1113 * Enable IO APIC before setting up error vector
1115 if (!skip_ioapic_setup
&& nr_ioapics
)
1118 end_local_APIC_setup();
1120 map_cpu_to_logical_apicid();
1122 if (apic
->setup_portio_remap
)
1123 apic
->setup_portio_remap();
1125 smpboot_setup_io_apic();
1127 * Set up local APIC timer on boot CPU.
1130 printk(KERN_INFO
"CPU%d: ", 0);
1131 print_cpu_info(&cpu_data(0));
1132 x86_init
.timers
.setup_percpu_clockev();
1137 set_mtrr_aps_delayed_init();
1142 void arch_enable_nonboot_cpus_begin(void)
1144 set_mtrr_aps_delayed_init();
1147 void arch_enable_nonboot_cpus_end(void)
1153 * Early setup to make printk work.
1155 void __init
native_smp_prepare_boot_cpu(void)
1157 int me
= smp_processor_id();
1158 switch_to_new_gdt(me
);
1159 /* already set me in cpu_online_mask in boot_cpu_init() */
1160 cpumask_set_cpu(me
, cpu_callout_mask
);
1161 per_cpu(cpu_state
, me
) = CPU_ONLINE
;
1164 void __init
native_smp_cpus_done(unsigned int max_cpus
)
1166 pr_debug("Boot done.\n");
1169 #ifdef CONFIG_X86_IO_APIC
1170 setup_ioapic_dest();
1172 check_nmi_watchdog();
1176 static int __initdata setup_possible_cpus
= -1;
1177 static int __init
_setup_possible_cpus(char *str
)
1179 get_option(&str
, &setup_possible_cpus
);
1182 early_param("possible_cpus", _setup_possible_cpus
);
1186 * cpu_possible_mask should be static, it cannot change as cpu's
1187 * are onlined, or offlined. The reason is per-cpu data-structures
1188 * are allocated by some modules at init time, and dont expect to
1189 * do this dynamically on cpu arrival/departure.
1190 * cpu_present_mask on the other hand can change dynamically.
1191 * In case when cpu_hotplug is not compiled, then we resort to current
1192 * behaviour, which is cpu_possible == cpu_present.
1195 * Three ways to find out the number of additional hotplug CPUs:
1196 * - If the BIOS specified disabled CPUs in ACPI/mptables use that.
1197 * - The user can overwrite it with possible_cpus=NUM
1198 * - Otherwise don't reserve additional CPUs.
1199 * We do this because additional CPUs waste a lot of memory.
1202 __init
void prefill_possible_map(void)
1206 /* no processor from mptable or madt */
1207 if (!num_processors
)
1210 if (setup_possible_cpus
== -1)
1211 possible
= num_processors
+ disabled_cpus
;
1213 possible
= setup_possible_cpus
;
1215 total_cpus
= max_t(int, possible
, num_processors
+ disabled_cpus
);
1217 if (possible
> CONFIG_NR_CPUS
) {
1219 "%d Processors exceeds NR_CPUS limit of %d\n",
1220 possible
, CONFIG_NR_CPUS
);
1221 possible
= CONFIG_NR_CPUS
;
1224 printk(KERN_INFO
"SMP: Allowing %d CPUs, %d hotplug CPUs\n",
1225 possible
, max_t(int, possible
- num_processors
, 0));
1227 for (i
= 0; i
< possible
; i
++)
1228 set_cpu_possible(i
, true);
1230 nr_cpu_ids
= possible
;
1233 #ifdef CONFIG_HOTPLUG_CPU
1235 static void remove_siblinginfo(int cpu
)
1238 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
1240 for_each_cpu(sibling
, cpu_core_mask(cpu
)) {
1241 cpumask_clear_cpu(cpu
, cpu_core_mask(sibling
));
1243 * last thread sibling in this cpu core going down
1245 if (cpumask_weight(cpu_sibling_mask(cpu
)) == 1)
1246 cpu_data(sibling
).booted_cores
--;
1249 for_each_cpu(sibling
, cpu_sibling_mask(cpu
))
1250 cpumask_clear_cpu(cpu
, cpu_sibling_mask(sibling
));
1251 cpumask_clear(cpu_sibling_mask(cpu
));
1252 cpumask_clear(cpu_core_mask(cpu
));
1253 c
->phys_proc_id
= 0;
1255 cpumask_clear_cpu(cpu
, cpu_sibling_setup_mask
);
1258 static void __ref
remove_cpu_from_maps(int cpu
)
1260 set_cpu_online(cpu
, false);
1261 cpumask_clear_cpu(cpu
, cpu_callout_mask
);
1262 cpumask_clear_cpu(cpu
, cpu_callin_mask
);
1263 /* was set by cpu_init() */
1264 cpumask_clear_cpu(cpu
, cpu_initialized_mask
);
1265 numa_remove_cpu(cpu
);
1268 void cpu_disable_common(void)
1270 int cpu
= smp_processor_id();
1272 remove_siblinginfo(cpu
);
1274 /* It's now safe to remove this processor from the online map */
1276 remove_cpu_from_maps(cpu
);
1277 unlock_vector_lock();
1281 int native_cpu_disable(void)
1283 int cpu
= smp_processor_id();
1286 * Perhaps use cpufreq to drop frequency, but that could go
1287 * into generic code.
1289 * We won't take down the boot processor on i386 due to some
1290 * interrupts only being able to be serviced by the BSP.
1291 * Especially so if we're not using an IOAPIC -zwane
1296 if (nmi_watchdog
== NMI_LOCAL_APIC
)
1297 stop_apic_nmi_watchdog(NULL
);
1300 cpu_disable_common();
1304 void native_cpu_die(unsigned int cpu
)
1306 /* We don't do anything here: idle task is faking death itself. */
1309 for (i
= 0; i
< 10; i
++) {
1310 /* They ack this in play_dead by setting CPU_DEAD */
1311 if (per_cpu(cpu_state
, cpu
) == CPU_DEAD
) {
1312 if (system_state
== SYSTEM_RUNNING
)
1313 pr_info("CPU %u is now offline\n", cpu
);
1315 if (1 == num_online_cpus())
1316 alternatives_smp_switch(0);
1321 pr_err("CPU %u didn't die...\n", cpu
);
1324 void play_dead_common(void)
1327 reset_lazy_tlbstate();
1328 irq_ctx_exit(raw_smp_processor_id());
1329 c1e_remove_cpu(raw_smp_processor_id());
1333 __get_cpu_var(cpu_state
) = CPU_DEAD
;
1336 * With physical CPU hotplug, we should halt the cpu
1338 local_irq_disable();
1341 void native_play_dead(void)
1344 tboot_shutdown(TB_SHUTDOWN_WFS
);
1348 #else /* ... !CONFIG_HOTPLUG_CPU */
1349 int native_cpu_disable(void)
1354 void native_cpu_die(unsigned int cpu
)
1356 /* We said "no" in __cpu_disable */
1360 void native_play_dead(void)